Adding the motUtil debugfs in /d/dri/0/debug to provide a tool for
developer/tester to interface with the Display driver framework
Port from: 11cb128
Change-Id: I5a385f9f789b56f7a36bde865234325039ec5e36
Signed-off-by: Bang Nguyen <bangnguyen@motorola.com>
Reviewed-on: https://gerrit.mot.com/1444397
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1509799
Reviewed-by: Hua Tan <tanhua1@motorola.com>
After the ESD detection and recovery keep trying to recover panel, but
after 5 times, unsuccessfully recovery the panel, then cal BUG to reboot
the phone.
Port from: 9a4d104
Change-Id: Ibd1aa3e4d83638c029c163fe1de88d7ef4ba5fe2
Signed-off-by: Bang Nguyen <bangnguyen@motorola.com>
Reviewed-on: https://gerrit.mot.com/1444396
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1509798
Reviewed-by: Hua Tan <tanhua1@motorola.com>
Check display turns on during the display resume. If it doesn't, then
trigger the ESD to restart the panel, instead waiting until the ESD
thread starts, detects, and perform ESD recovery.
Port from: f1cfef0
Change-Id: Ib7c0f2451b5e5cf1630b6335ac1d7ce1ff332d22
Signed-off-by: Bang Nguyen <bangnguyen@motorola.com>
Reviewed-on: https://gerrit.mot.com/1444395
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1509797
Reviewed-by: Hua Tan <tanhua1@motorola.com>
Check the panel's power_mode after it turns on, to see if the panel can turn
on correctly. If it doesn't not, then trigger the ESD recovery to fix it.
Port from: 0301a79
Change-Id: I7e6cdb099dd50559f570e201568479ba00aa0e66
Signed-off-by: Bang Nguyen <bangnguyen@motorola.com>
Reviewed-on: https://gerrit.mot.com/1444394
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1509796
Reviewed-by: Hua Tan <tanhua1@motorola.com>
After the Boot Loader (BL) detects the panel information, or reading
the ESD UTAG setting, the BL will write these information to the DTS.
The display driver from kernel and parse and save these setting.
Port from: 61c3e44
Change-Id: I3759b73c2e1eff01269a42dfa11d20807affa17a
Signed-off-by: Bang Nguyen <bangnguyen@motorola.com>
Reviewed-on: https://gerrit.mot.com/1444393
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1509795
Reviewed-by: Hua Tan <tanhua1@motorola.com>
Change the ESD detection and recovery interval to 8 second
Port from: 1318dae
Change-Id: I530c74592941ff2cd68362224179d38df3ef8f60
Signed-off-by: Bang Nguyen <bangnguyen@motorola.com>
Reviewed-on: https://gerrit.mot.com/1444392
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1509794
Reviewed-by: Hua Tan <tanhua1@motorola.com>
Add a new display's backlight type "bl_ctrl_dummy". With this
backlight type, the panel backlight driver will ignore any backlight
requests. This new backlight type will be used with a bare_board or
no-display configuration and the display driver doesn't need to have
any communication with panel.
Port from: cfb2acd
Change-Id: I2108d7477009d06ac350ca49c380b64c9d004f65
Signed-off-by: Bang Nguyen <bangnguyen@motorola.com>
Reviewed-on: https://gerrit.mot.com/1442424
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1509792
Reviewed-by: Hua Tan <tanhua1@motorola.com>
Normal, there is a brightness level from 0-255 (1 byte), but some
panels are support 2 bytes for brightness, (0-1023).
Port from 68e0c10
Change-Id: Id948d3d97fb3611e458b18a3345cec6a64e5c034
Signed-off-by: Bang Nguyen <bangnguyen@motorola.com>
Reviewed-on: https://gerrit.mot.com/1410291
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1509791
Reviewed-by: Hua Tan <tanhua1@motorola.com>
Power on reset value of DPTX_CONFIGURATION_CTRL.ASSR (alternate scrambler
seed reset) is high. This fails link training 2 with TPS4 pattern.
Change disables this before link training starts.
Change-Id: Iee95de04625658254b242afdcbba6db24a52606d
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Navjyot SINGH <quic_navjsing@quicinc.com>
Currently the panel esd_recovery_pending flag is cleared for every mode
set. The ESD recovery completes only after the suspend and resume. Clear
the flag only during power on commit.
Change-Id: I97e370feba0aad34558e4675168b4bcb7f5901ca
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Correct DSC 1.1 rate control parameter related to
8 bpc 8 bpp configuration according to VESA DSC
specification.
Change-Id: I4b17c61f79ea2b497cbf243a2b99c9b40a9b7ea8
Signed-off-by: Raghavendra Ambadas <quic_c_rambad@quicinc.com>
adjust aux channel by dts setting.
support max resolution cfg by dts.
Change-Id: I13e48630cf62edc6353f13d0f42cadb2cbd9423d
Signed-off-by: xiangxuy <quic_xiangxuy@quicinc.com>
Large allocations using kzalloc can lead to timeouts. This updates
the allocation calls accordingly to use vzalloc to remove
requirements on contiguous memory.
Change-Id: Ica54483787509ed0e9283289fc9d523e8cde9238
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
In RSC disabled targets during display bootup with continuous
splash constant ab and ib votes are set. Upon issuing first
commit these values gets updated and at the end of first commit
on release of splash resource the votes are removed using
sde_power_data_bus_set_quota API. On the very next commit if
bandwidth is changed from previous commit, new BW voting is
reflected else the disable splash vote exists and underruns are
seen. This patch removes the downvote and fixes the underruns
seen in video mode in targets for which rsc is disabled.
Change-Id: I628d426ad11c703dd972be89fa998588c53a57bb
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Currently we are enabling all the lanes irrespective of the
lanes we are actually going to use. Add support to enable
only those lanes that are required and thus save power.
Change-Id: I9aae76eeaa05a79337d4e4b1f2e36ea9842bd580
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
DCS commands triggered right after timing engine enable can conflict
with blanking period causing command transfer failures. Right after
timing engine enable poll for frame start and line count reaching
active region of display before any DCS commands.
Change-Id: Ia3967e01c3bb5bc82aa3549c300fa8335e00210c
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
With requirements to support an increased number of display modes,
the current size of sde_kms_info is insufficient. This change
increases the sde_kms_info max size.
Change-Id: Ie0f29003732870dad9ce31ee7d484e84f12ba542
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
In dual display usecase when both displays comes out of
idle following scenario will cause wr_ptr timeout.
1. Both displays goes to idle and RSCC enters Mode-2.
2. Primary display exit idle upon DRM commit N RSC
enters Solver State.
3. Secondary display exits idle upon DRM commit M and
waits on input fence after CTL_1_PREPARE is set.
RSC is still in CMD state.
4. Primary Commit N frame transfer got successful and
commit N+1 is queued in primary display when RSC
in solver state which leads to timeout in primary.
This is because RSCC will not generate a wakeup in sync with
primary timelines leading to timeout. This is because RSCC
still sees idle low thinking frame transfer is taking long
time. This change will switch the rsc state to AMC mode
before CTL_PREPARE is set which resolves such issue.
Change-Id: Ic32e48b4febbbcc54d94876194d38fe6ef3d0981
Signed-off-by: Mahadevan <mahap@codeaurora.org>
Signed-off-by: Raghavendra Ambadas <quic_c_rambad@quicinc.com>
This change handles partial update use case transitions. Rounded
corner should be programmed to full ROI when transitioning out of
partial update use case.
This change also clear cached ROIs when rounded corner feature is
disabled to ensure full frame ROI for first frame when feature
is enabled again. This change depends on HAL change to disable PU
for one frame when RC mask config is set.
This change also moves cached rectangles from crtc state to crtc
structure to avoid cached rectangles being incorrect due to race
conditions between updating cached rectangles in crtc state and
duplicating crtc state when next commit starts.
Change-Id: I4c48ccd3f64409d1b0fa19f0e6f92eab5f86d069
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
Add logic in DP driver to parse "label" dt property.
This info will be useful to configure DP as primary
or secondary.
Change-Id: I708179c5940c82256034bc6c8338b01ee52f2f79
Signed-off-by: Narender Ankam <nankam@codeaurora.org>
This change handles partial update use case transitions. Rounded
corner should be programmed to full ROI when transitioning out of
partial update use case.
This change also clear cached ROIs when rounded corner feature is
disabled to ensure full frame ROI for first frame when feature
is enabled again. This change depends on HAL change to disable PU
for one frame when RC mask config is set.
This change also moves cached rectangles from crtc state to crtc
structure to avoid cached rectangles being incorrect due to race
conditions between updating cached rectangles in crtc state and
duplicating crtc state when next commit starts.
Change-Id: I4c48ccd3f64409d1b0fa19f0e6f92eab5f86d099
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
This change handles partial update use case transitions. Rounded
corner should be programmed to full ROI when transitioning out of
partial update use case.
This change also clear cached ROIs when rounded corner feature is
disabled to ensure full frame ROI for first frame when feature
is enabled again.
Change-Id: I4c48ccd3f64409d1b0fa19f0e6f92eab5f86d099
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
Clear partial update mask during last close to avoid
rounded corner to be programmed without valid mask during
shell stop/start operations.
Change-Id: I378adc62b5bc5913abfc32fa3528c8e28ea273d4
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
Currently, driver expects usermode to set RC blob flags based on
the RC PU use case, which causes issue when commits are staggered
and is unnecessarily reprogramming RC mask data on every PU frame.
This change uses existing driver logic to internally determine the
RC PU use case and programs the RC region enable bits accordingly.
It also adds essential logging in RC functions to help debugging.
Change-Id: I19ae59a79dbee20f357b384c12acd7d2a6a93fb4
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
Clear partial update mask during last close to avoid
rounded corner to be programmed without valid mask during
shell stop/start operations.
Change-Id: I378adc62b5bc5913abfc32fa3528c8e28ea273d4
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
For the targets not having slave pll, "slave pll unavailable"
warning gets logged on suspend, resume and idle power collapse.
Change pr_warn to pr_debug to avoid extra logging.
Change-Id: I2f06d88f3ea8ceb03e30095439c24a6729daae97
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
Bang Nguyen