Revert (CR): power: smb5: Clear HDC AICL

High duty cycleused for AICL/adaptive algorithm
Qcom default is enable, if disable perhaps cause
remain voltage while remove USB cable

Mot-CRs-fixed: (CR)

Change-Id: I686e503a44de890250b95a1ff0dc7c86c1081979
Signed-off-by: xuwei9 <xuwei9@lenovo.com>
Reviewed-on: https://gerrit.mot.com/1553135
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Lu Chai <chailu1@motorola.com>
Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
chailu1 authored and Gilberto Gambugge committed 2023-06-01 00:47:11 -03:00
1 parent 81eec63dad
commit a75a2aa78f
2 files changed
+2 -3

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+2 -2
View File
@@ -3439,8 +3439,8 @@ static int smb5_init_hw(struct smb5 *chip)
* configuration enable/disable ADB based AICL and Suspend on collapse.
*/
mask = USBIN_AICL_PERIODIC_RERUN_EN_BIT | USBIN_AICL_ADC_EN_BIT
| USBIN_AICL_EN_BIT | SUSPEND_ON_COLLAPSE_USBIN_BIT
| USBIN_AICL_HDC_EN_BIT;
| USBIN_AICL_EN_BIT | SUSPEND_ON_COLLAPSE_USBIN_BIT;
val = USBIN_AICL_PERIODIC_RERUN_EN_BIT | USBIN_AICL_EN_BIT;
if (!chip->dt.disable_suspend_on_collapse)
val |= SUSPEND_ON_COLLAPSE_USBIN_BIT;
-1
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@@ -320,7 +320,6 @@ enum {
#define USBIN_AICL_OPTIONS_CFG_REG (USBIN_BASE + 0x80)
#define SUSPEND_ON_COLLAPSE_USBIN_BIT BIT(7)
#define USBIN_AICL_HDC_EN_BIT BIT(6)
#define USBIN_AICL_PERIODIC_RERUN_EN_BIT BIT(4)
#define USBIN_AICL_ADC_EN_BIT BIT(3)
#define USBIN_AICL_EN_BIT BIT(2)