From a75a2aa78f437833bfd33f282ec3d50a6f6721f8 Mon Sep 17 00:00:00 2001 From: chailu1 Date: Wed, 13 May 2020 13:07:52 +0800 Subject: [PATCH] Revert (CR): power: smb5: Clear HDC AICL High duty cycleused for AICL/adaptive algorithm Qcom default is enable, if disable perhaps cause remain voltage while remove USB cable Mot-CRs-fixed: (CR) Change-Id: I686e503a44de890250b95a1ff0dc7c86c1081979 Signed-off-by: xuwei9 Reviewed-on: https://gerrit.mot.com/1553135 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Lu Chai Reviewed-by: Xiangpo Zhao Submit-Approved: Jira Key --- drivers/power/supply/qcom/qpnp-smb5.c | 4 ++-- drivers/power/supply/qcom/smb5-reg.h | 1 - 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/power/supply/qcom/qpnp-smb5.c b/drivers/power/supply/qcom/qpnp-smb5.c index 826a84ab8793..e85028b3f769 100644 --- a/drivers/power/supply/qcom/qpnp-smb5.c +++ b/drivers/power/supply/qcom/qpnp-smb5.c @@ -3439,8 +3439,8 @@ static int smb5_init_hw(struct smb5 *chip) * configuration enable/disable ADB based AICL and Suspend on collapse. */ mask = USBIN_AICL_PERIODIC_RERUN_EN_BIT | USBIN_AICL_ADC_EN_BIT - | USBIN_AICL_EN_BIT | SUSPEND_ON_COLLAPSE_USBIN_BIT - | USBIN_AICL_HDC_EN_BIT; + | USBIN_AICL_EN_BIT | SUSPEND_ON_COLLAPSE_USBIN_BIT; + val = USBIN_AICL_PERIODIC_RERUN_EN_BIT | USBIN_AICL_EN_BIT; if (!chip->dt.disable_suspend_on_collapse) val |= SUSPEND_ON_COLLAPSE_USBIN_BIT; diff --git a/drivers/power/supply/qcom/smb5-reg.h b/drivers/power/supply/qcom/smb5-reg.h index 4c52a431c259..192808f7bd50 100644 --- a/drivers/power/supply/qcom/smb5-reg.h +++ b/drivers/power/supply/qcom/smb5-reg.h @@ -320,7 +320,6 @@ enum { #define USBIN_AICL_OPTIONS_CFG_REG (USBIN_BASE + 0x80) #define SUSPEND_ON_COLLAPSE_USBIN_BIT BIT(7) -#define USBIN_AICL_HDC_EN_BIT BIT(6) #define USBIN_AICL_PERIODIC_RERUN_EN_BIT BIT(4) #define USBIN_AICL_ADC_EN_BIT BIT(3) #define USBIN_AICL_EN_BIT BIT(2)