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arm/dts: panel: add OD code for tianma nt37701 6.55 inch panel

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add OD code for tianma nt37701 6.55 inch panel
for rhode

Change-Id: I72358d4818cac782128228a92e10aa48e7a7e845
Signed-off-by: tanhua1 <tanhua1@motorola.com>
Reviewed-on: https://gerrit.mot.com/2198626
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com>
Submit-Approved: Lu Lu <lulu2@lenovo.com>
This commit is contained in:
tanhua1 authored and Carlos Pinho committed 2023-05-31 17:01:05 -03:00
1 parent 30235db10b
commit 78b5b12f0e
2 files changed
+123 -12
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qcom/dsi-panel-mot-tianma-nt37701-655-1080x2400-dsc-cmd-common-v1.dtsi
-6
View File
@@ -140,8 +140,6 @@ qcom,mdss-dsi-display-timings {
15 01 00 00 00 00 02 58 00 //DC off
39 00 00 00 00 00 06 F0 55 AA 52 08 00
15 00 00 00 00 00 02 6F 02
39 01 00 00 00 00 03 C1 00 60
15 00 00 00 00 00 02 6F 08
15 00 00 00 00 00 02 C3 04
39 00 00 00 00 00 06 F0 55 AA 52 08 03
@@ -236,8 +234,6 @@ qcom,mdss-dsi-display-timings {
15 01 00 00 00 00 02 58 00 //DC off
39 00 00 00 00 00 06 F0 55 AA 52 08 00
15 00 00 00 00 00 02 6F 02
39 01 00 00 00 00 03 C1 00 60
15 00 00 00 00 00 02 6F 08
15 00 00 00 00 00 02 C3 04
39 00 00 00 00 00 06 F0 55 AA 52 08 03
@@ -332,8 +328,6 @@ qcom,mdss-dsi-display-timings {
15 01 00 00 00 00 02 58 00 //DC off
39 00 00 00 00 00 06 F0 55 AA 52 08 00
15 00 00 00 00 00 02 6F 02
39 01 00 00 00 00 03 C1 00 60
15 00 00 00 00 00 02 6F 08
15 00 00 00 00 00 02 C3 04
39 00 00 00 00 00 06 F0 55 AA 52 08 03
qcom/dsi-panel-mot-tianma-nt37701-655-1080x2400-dsc-cmd-common-v2.dtsi
+123 -6
View File
@@ -121,6 +121,25 @@
qcom,mdss-dsi-panel-jitter = <0x20 0xa>; /* 90fps +/- 2 */
qcom,mdss-dsi-timing-switch-command = [
15 01 00 00 14 00 02 2F 08 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
// FFD2.0 RGB OFS CTRL
39 00 00 00 00 00 06 F0 55 AA 52 08 08
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 14 E3 C0 0E F3 5D 00 00 00 00 00 00 00 00 00 00 00 00 00 00 98
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E5 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
//FFD SPR Pixel Type Setting
15 00 00 00 00 00 02 6F 04
15 00 00 00 00 00 02 C1 00
//FFD RAM Setting, RAMOFF_IDLE_DMR
39 00 00 00 00 00 06 F0 55 AA 52 08 00
39 00 00 00 00 00 04 C0 0E B3 21
//ODS part
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 6F 03
15 00 00 00 00 00 02 C1 02
39 01 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
];
qcom,mdss-dsi-on-command = [
@@ -140,8 +159,6 @@
15 01 00 00 00 00 02 58 00 //DC off
39 00 00 00 00 00 06 F0 55 AA 52 08 00
15 00 00 00 00 00 02 6F 02
39 01 00 00 00 00 03 C1 00 60
15 00 00 00 00 00 02 6F 08
15 00 00 00 00 00 02 C3 04
39 00 00 00 00 00 06 F0 55 AA 52 08 03
@@ -174,8 +191,30 @@
39 01 00 00 00 00 05 2B 00 00 09 5F
15 01 00 00 00 00 02 2F 08 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
// FFD2.0 RGB OFS CTRL
39 00 00 00 00 00 06 F0 55 AA 52 08 08
39 00 00 00 00 00 06 E1 00 03 03 03 00
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 14 E3 C0 0E F3 5D 00 00 00 00 00 00 00 00 00 00 00 00 00 00 98
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E5 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
//FFD SPR Pixel Type Setting
15 00 00 00 00 00 02 6F 04
15 00 00 00 00 00 02 C1 00
//FFD RAM Setting, RAMOFF_IDLE_DMR
39 00 00 00 00 00 06 F0 55 AA 52 08 00
39 00 00 00 00 00 04 C0 0E B3 21
//ODS part
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 6F 03
15 00 00 00 00 00 02 C1 02
39 01 00 00 00 00 1C CE 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
05 01 00 00 78 00 01 11
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 E1 63
05 01 00 00 00 00 01 29]; /* display on */
qcom,mdss-dsi-off-command = [
05 01 00 00 00 00 01 28 /* display_off */
@@ -217,6 +256,25 @@
qcom,mdss-dsi-panel-jitter = <0x20 0xa>; /* 90fps +/- 2 */
qcom,mdss-dsi-timing-switch-command = [
15 01 00 00 10 00 02 2F 03 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
// FFD2.0 RGB OFS CTRL
39 00 00 00 00 00 06 F0 55 AA 52 08 08
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 14 E3 46 CC 11 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F0
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E5 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
//FFD SPR Pixel Type Setting
15 00 00 00 00 00 02 6F 04
15 00 00 00 00 00 02 C1 00
//FFD RAM Setting, RAMOFF_IDLE_DMR
39 00 00 00 00 00 06 F0 55 AA 52 08 00
39 00 00 00 00 00 04 C0 0E B3 21
//ODS part
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 6F 03
15 00 00 00 00 00 02 C1 03
39 01 00 00 00 00 1C CE 22 00 00 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
];
qcom,mdss-dsi-on-command = [
@@ -236,8 +294,6 @@
15 01 00 00 00 00 02 58 00 //DC off
39 00 00 00 00 00 06 F0 55 AA 52 08 00
15 00 00 00 00 00 02 6F 02
39 01 00 00 00 00 03 C1 00 60
15 00 00 00 00 00 02 6F 08
15 00 00 00 00 00 02 C3 04
39 00 00 00 00 00 06 F0 55 AA 52 08 03
@@ -270,8 +326,30 @@
39 01 00 00 00 00 05 2B 00 00 09 5F
15 01 00 00 00 00 02 2F 03 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
// FFD2.0 RGB OFS CTRL
39 00 00 00 00 00 06 F0 55 AA 52 08 08
39 00 00 00 00 00 06 E1 00 03 03 03 00
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 14 E3 46 CC 11 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F0
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E5 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
//FFD SPR Pixel Type Setting
15 00 00 00 00 00 02 6F 04
15 00 00 00 00 00 02 C1 00
//FFD RAM Setting, RAMOFF_IDLE_DMR
39 00 00 00 00 00 06 F0 55 AA 52 08 00
39 00 00 00 00 00 04 C0 0E B3 21
//ODS part
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 6F 03
15 00 00 00 00 00 02 C1 03
39 00 00 00 00 00 1C CE 22 00 00 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
05 01 00 00 78 00 01 11
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 E1 63
05 01 00 00 00 00 01 29]; /* display on */
qcom,mdss-dsi-off-command = [
05 01 00 00 00 00 01 28 /* display_off */
@@ -313,6 +391,25 @@
qcom,mdss-dsi-panel-jitter = <0x20 0xa>; /* 90fps +/- 2 */
qcom,mdss-dsi-timing-switch-command = [
15 01 00 00 0b 00 02 2F 07 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
// FFD2.0 RGB OFS CTRL
39 00 00 00 00 00 06 F0 55 AA 52 08 08
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 14 E3 25 FE E1 4F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 92
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E5 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
//FFD SPR Pixel Type Setting
15 00 00 00 00 00 02 6F 04
15 00 00 00 00 00 02 C1 00
//FFD RAM Setting, RAMOFF_IDLE_DMR
39 00 00 00 00 00 06 F0 55 AA 52 08 00
39 00 00 00 00 00 04 C0 0E B3 21
//ODS part
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 6F 03
15 00 00 00 00 00 02 C1 03
39 01 00 00 00 00 1C CE 22 00 00 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
];
qcom,mdss-dsi-on-command = [
@@ -332,8 +429,6 @@
15 01 00 00 00 00 02 58 00 //DC off
39 00 00 00 00 00 06 F0 55 AA 52 08 00
15 00 00 00 00 00 02 6F 02
39 01 00 00 00 00 03 C1 00 60
15 00 00 00 00 00 02 6F 08
15 00 00 00 00 00 02 C3 04
39 00 00 00 00 00 06 F0 55 AA 52 08 03
@@ -366,8 +461,30 @@
39 01 00 00 00 00 05 2B 00 00 09 5F
15 01 00 00 00 00 02 2F 07 //08:48Hz 03:60Hz 07:90Hz 02:120Hz 04:144Hz
// FFD2.0 RGB OFS CTRL
39 00 00 00 00 00 06 F0 55 AA 52 08 08
39 00 00 00 00 00 06 E1 00 03 03 03 00
39 00 00 00 00 00 14 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 14 E3 25 FE E1 4F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 92
39 00 00 00 00 00 14 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E5 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 00 00 00 00 13 E7 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
//FFD SPR Pixel Type Setting
15 00 00 00 00 00 02 6F 04
15 00 00 00 00 00 02 C1 00
//FFD RAM Setting, RAMOFF_IDLE_DMR
39 00 00 00 00 00 06 F0 55 AA 52 08 00
39 00 00 00 00 00 04 C0 0E B3 21
//ODS part
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 6F 03
15 00 00 00 00 00 02 C1 03
39 00 00 00 00 00 1C CE 22 00 00 22 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
05 01 00 00 78 00 01 11
39 00 00 00 00 00 06 F0 55 AA 52 08 08
15 00 00 00 00 00 02 E1 63
05 01 00 00 00 00 01 29]; /* display on */
qcom,mdss-dsi-off-command = [
05 01 00 00 00 00 01 28 /* display_off */