longc101
ab1eb8e884
device tree setting for devon nfc. disable pm8008 dtsi. Change-Id: I981dbd97e5055c279a4c878c9acc513389e7abd7 Signed-off-by: longc101 <longc101@motorola.com> Reviewed-on: https://gerrit.mot.com/2213606 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Submit-Approved: Jira Key Tested-by: Jira Key Reviewed-by: Zhenghai Pan <panzh2@lenovo.com> (cherry picked from commit 3a584c1ec41d36ca2ac7474c3357f9f171ce3507) Reviewed-on: https://gerrit.mot.com/2217608 Reviewed-by: Wang Wang <wangwang1@lenovo.com>
173 lines
3.2 KiB
Devicetree
173 lines
3.2 KiB
Devicetree
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&tlmm {
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins{
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qupv3_se1_i2c_act: qupv3_se1_i2c_active {
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mux {
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pins = "gpio4", "gpio5";
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function = "qup1";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se1_i2c_sle: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio4", "gpio5";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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input-enable;
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};
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};
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};
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nfc {
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nfc_enable_active: nfc_enable_active {
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/* active state */
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mux {
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/* 69: Enable */
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pins = "gpio69";
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function = "gpio";
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};
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config {
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pins = "gpio69";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_enable_suspend: nfc_enable_suspend{
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/* sleep state */
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mux {
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/* 69: Enable */
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pins = "gpio69";
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function = "gpio";
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};
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config {
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pins = "gpio69";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_int_active: nfc_int_active {
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/* active state */
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mux {
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/* GPIO 70 NFC Read Interrupt */
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pins = "gpio70";
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function = "gpio";
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};
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config {
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pins = "gpio70";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_int_suspend: nfc_int_suspend {
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/* sleep state */
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mux {
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/* GPIO 70 NFC Read Interrupt */
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pins = "gpio70";
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function = "gpio";
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};
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config {
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pins = "gpio70";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_clk_req_active {
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/* active state */
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mux {
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/* GPIO 71: NFC CLOCK REQUEST */
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pins = "gpio71";
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function = "gpio";
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};
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config {
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pins = "gpio71";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_clk_req_suspend {
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/* sleep state */
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mux {
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/* GPIO 71: NFC CLOCK REQUEST */
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pins = "gpio71";
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function = "gpio";
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};
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config {
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pins = "gpio71";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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};
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};
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&qupv3_se1_i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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pinctrl-0 = <&qupv3_se1_i2c_act>;
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pinctrl-1 = <&qupv3_se1_i2c_sle>;
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/*
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sec-nfc@27 {
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compatible = "sec-nfc";
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reg = <0x27>;
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sec-nfc,ven-gpio = <&tlmm 69 0x00>;
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sec-nfc,firm-gpio = <&tlmm 31 0x00>;
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sec-nfc,irq-gpio = <&tlmm 70 0x00>;
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sec-nfc,clk_req-gpio = <&tlmm 71 0x00>;
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interrupt-parent = <&tlmm>;
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interrupts = <70 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>;
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clock-names = "OSC_NFC";
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}; */
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st21nfc@08 {
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compatible = "st,st21nfc";
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status = "ok"
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reg = <0x08>;
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interrupt-parent = <&tlmm>;
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interrupts = <70 0>;
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st,reset_gpio = <&tlmm 69 0x00>;
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st,irq_gpio = <&tlmm 70 0x00>;
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st,clkreq_gpio = <&tlmm 71 0x00>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>;
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};
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};
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&pm8008_8 {
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status = "disabled";
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};
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&pm8008_9 {
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status = "disabled";
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};
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