a7301c 873665656a Revert "Revert "disp: msm: sde: update splash resource allocation for dual display""
Which causes dsi errors and white display:
+++Backtrace as below++++
01-01 00:48:06.812     0     0 I         : clk_branch_toggle+0x138/0x180
01-01 00:48:06.812     0     0 I         : clk_branch2_enable+0x28/0x38
01-01 00:48:06.812     0     0 I         : clk_core_enable+0x154/0x378
01-01 00:48:06.812     0     0 I         : clk_enable+0x2c/0x98
01-01 00:48:06.812     0     0 I         :
dsi_link_hs_clk_start+0x190/0x2b0
01-01 00:48:06.812     0     0 I         :
dsi_display_link_clk_enable+0x80/0x1f8
01-01 00:48:06.812     0     0 I         :
dsi_clk_update_link_clk_state+0x108/0x2c0
01-01 00:48:06.812     0     0 I         :
dsi_recheck_clk_state+0x238/0x4b8
01-01 00:48:06.812     0     0 I         : dsi_clk_req_state+0x1e8/0x260
01-01 00:48:06.812     0     0 I         :
dsi_display_clk_ctrl+0x44/0xa8
01-01 00:48:06.812     0     0 I         :
dsi_display_prepare+0x86c/0xba0
01-01 00:48:06.812     0     0 I         :
dsi_bridge_pre_enable+0x234/0x818
01-01 00:48:06.812     0     0 I         :
drm_bridge_pre_enable+0x34/0x40
01-01 00:48:06.812     0     0 I         : complete_commit+0x468/0xc18
01-01 00:48:06.812     0     0 I         :
_msm_drm_commit_work_cb+0x17c/0x308
01-01 00:48:06.812     0     0 I         : kthread_worker_fn+0x114/0x1f8
01-01 00:48:06.812     0     0 I         : kthread+0x128/0x138
01-01 00:48:06.812     0     0 I         : ret_from_fork+0x10/0x1c
01-01 00:48:06.812     0     0 I         : irq event stamp: 0
01-01 00:48:06.812     0     0 I         : hardirqs last  enabled at
(0): [<0000000000000000>]           (null)
01-01 00:48:06.812     0     0 I         : hardirqs last disabled at
(0): [<ffffff98feab7234>] copy_process+0x5f4/0x1bf8
01-01 00:48:06.812     0     0 I         : softirqs last  enabled at
(0): [<ffffff98feab724c>] copy_process+0x60c/0x1bf8
01-01 00:48:06.812     0     0 I         : softirqs last disabled at
(0): [<0000000000000000>]           (null)
01-01 00:48:06.812     0     0 W         : ---[ end trace
c6c359a711660861 ]---
01-01 00:48:06.817     0     0 E         : [drm:dsi_link_hs_clk_start]
*ERROR* [msm-dsi-error]: Failed to enable dsi byte clk, rc=-16
01-01 00:48:06.826     0     0 E         : [drm:dsi_link_hs_clk_start]
*ERROR* [msm-dsi-error]: failed to enable link HS clks, rc = -16
01-01 00:48:06.836     0     0 E         :
[drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to
turn on master hs link clocks, rc=-16
01-01 00:48:06.847     0     0 E         :
[drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to
start link clk type 2 rc=-16
01-01 00:48:06.857     0     0 E         : [drm:dsi_recheck_clk_state]
*ERROR* [msm-dsi-error]: failed to update clock state, rc = -16
01-01 00:48:06.867     0     0 E         : [drm:dsi_clk_req_state]
*ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -16
01-01 00:48:06.876     0     0 E         : [drm:dsi_display_clk_ctrl]
*ERROR* [msm-dsi-error]: failed set clk state, rc = -16
01-01 00:48:06.885     0     0 E         : [drm:dsi_display_prepare]
*ERROR* [msm-dsi-error]: [qcom,mdss_dsi_mot_boe_269_800x600_cmd_v2]
failed to enable DSI link clocks, rc=-16
01-01 00:48:06.904     0     0 E dsi_pll_7nm_lock_status: DSI PLL(1)
lock failed, status=0x00000000
01-01 00:48:06.911     0     0 E dsi_pll_enable: PLL(1) lock failed
01-01 00:48:06.916     0     0 E vco_7nm_prepare: pll(1) enable failed,
rc=-110
01-01 00:48:06.921     0     0 E         : [drm:dsi_link_hs_clk_start]
*ERROR* [msm-dsi-error]: Failed to prepare dsi byte clk, rc=-110
01-01 00:48:06.931     0     0 E         : [drm:dsi_link_hs_clk_start]
*ERROR* [msm-dsi-error]: failed to prepare link HS clks, rc = -110
01-01 00:48:06.941     0     0 E         :
[drm:dsi_display_link_clk_enable] *ERROR* [msm-dsi-error]: failed to
turn on master hs link clocks, rc=-110
01-01 00:48:06.952     0     0 E         :
[drm:dsi_clk_update_link_clk_state] *ERROR* [msm-dsi-error]: failed to
start link clk type 2 rc=-110
01-01 00:48:06.963     0     0 E         : [drm:dsi_recheck_clk_state]
*ERROR* [msm-dsi-error]: failed to update clock state, rc = -110
01-01 00:48:06.972     0     0 E         : [drm:dsi_clk_req_state]
*ERROR* [msm-dsi-error]: Failed to adjust clock state rc = -110
01-01 00:48:06.982     0     0 E         : [drm:dsi_display_clk_ctrl]
*ERROR* [msm-dsi-error]: failed set clk state, rc = -110
01-01 00:48:06.991     0     0 I [drm:dsi_panel_post_unprepare]
[msm-dsi-info]: (mipi_mot_cmd_boe_800x600_269)+
+++
This reverts commit 1195a394b1.

Change-Id: I836e6496181c517c5995f53c68fd4856b00425b3
Signed-off-by: a7301c <a7301c@motorola.com>
Reviewed-on: https://gerrit.mot.com/1509821
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Hua Tan <tanhua1@motorola.com>
Submit-Approved: Jira Key
2023-06-01 00:43:20 -03:00
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Description
Android Kernel for Motorola Moto G52 (sm6225) — Nethunter Release
2 GiB
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