ARM: dts: msm: Add audio support for scuba
Add changes to support audio on scuba target. Change-Id: Id6e7d2e44af229508fec7dc2ea1f3e3aaca0bf69
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@@ -157,6 +157,9 @@ Example:
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wcd938x_tx_slave: wcd938x-tx-slave {
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compatible = "qcom,wcd938x-slave";
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};
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rouleur_tx_slave: rouleur-tx-slave {
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compatible = "qcom,rouleur-slave";
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};
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};
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};
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};
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@@ -174,6 +177,9 @@ Example:
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wcd937x_rx_slave: wcd937x-rx-slave {
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compatible = "qcom,wcd937x-slave";
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};
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rouleur_rx_slave: rouleur-rx-slave {
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compatible = "qcom,rouleur-slave";
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};
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};
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};
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};
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@@ -438,3 +444,110 @@ wsa883x_0221: wsa883x@02170221 {
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qcom,cdc-vdd-1p8-current = <20000>;
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qcom,cdc-static-supplies = "cdc-vdd-1p8";
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};
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PM2250 SPMI node
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pm2250_spmi: Child node of SPMI bus required for rouleur codec
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in order to access SPMI register to reset the peripheral.
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Required properties:
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-compatible: "qcom,pm2250-spmi";
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&spmi_bus {
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pm2250_spmi: qcom,pm2250-spmi {
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compatible = "qcom,pm2250-spmi";
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};
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};
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Rouleur Codec
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Required properties:
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- compatible: "qcom,rouleur-codec";
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- qcom,split-codec: Property to check on split codec support.
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- qcom,rx_swr_ch_map: mapping of swr rx slave port configuration to port_type and also
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corresponding master port type it need to attach.
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format: <port_id, slave_port_type, ch_mask, ch_rate, master_port_type>
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same port_id configurations have to be grouped, and in ascending order.
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- qcom,tx_swr_ch_map: mapping of swr tx slave port configuration to port_type and also
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corresponding master port type it need to attach.
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format: <port_id,slave_port_type, ch_mask, ch_rate, master_port_type>
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same port_id configurations have to be grouped, and in ascending order.
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- qcom,pmic-spmi-node: Phandle reference to the PMIC SPMI DT node.
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- qcom,wcd-reset-reg: Reset register address in PMIC for rouleur codec.
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- qcom,rx-slave: phandle reference of Soundwire Rx slave device.
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- qcom,tx-slave: phandle reference of Soundwire Tx slave device.
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Optional properties:
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- cdc-pa-vpos-supply: phandle of pa vpos supply's regulator device tree node.
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- qcom,cdc-pa-vpos-voltage: pa vpos supply's voltage level min and max in mV.
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- qcom,cdc-pa-vpos-current: pa vpos supply's max current in mA.
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- cdc-vdd-io-supply: phandle of io supply's regulator device tree node.
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- qcom,cdc-vdd-io-voltage: io supply's voltage level min and max in mV.
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- qcom,cdc-vdd-io-current: io supply's max current in mA.
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- cdc-vdd-cp-supply: phandle of vdd cp supply's regulator device tree node.
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- qcom,cdc-vdd-cp-voltage: vdd cp supply's voltage level min and max in mV.
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- qcom,cdc-vdd-cp-current: vdd cp supply's max current in mA.
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- cdc-vdd-mic-bias-supply: phandle of mic bias supply's regulator device tree node.
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- qcom,cdc-vdd-mic-bias-voltage: mic bias supply's voltage level min and max in mV.
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- qcom,cdc-vdd-mic-bias-current: mic bias supply's max current in mA.
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- qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
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hardware probe. Supplies in this list will be
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stay enabled.
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- qcom,cdc-on-demand-supplies: List of supplies which can be enabled
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dynamically.
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Supplies in this list are off by default.
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Example:
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rouleur_codec: rouleur-codec {
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compatible = "qcom,rouleur-codec";
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qcom,split-codec = <1>;
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qcom,pmic-spmi-node = <&pm2250_spmi>;
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qcom,wcd-reset-reg = <0x0000F3DB>;
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qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
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<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
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<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
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<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
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<4 DSD_R 0x2 0 DSD_R>;
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qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
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<0 ADC2 0x2 0 ADC2>, <0 DMIC0 0x4 0 ADC3>,
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<0 MBHC 0x8 0 ADC4>, <1 DMIC0 0x1 0 DMIC0>,
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<1 DMIC1 0x2 0 DMIC1>, <1 ADC1 0x4 0 DMIC2>,
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<1 MBHC 0x8 0 DMIC3>;
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qcom,rx-slave = <&rouleur_rx_slave>;
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qcom,tx-slave = <&rouleur_tx_slave>;
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cdc-vdd-io-supply = <&L15A>;
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qcom,cdc-vdd-io-voltage = <1800000 1800000>;
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qcom,cdc-vdd-io-current = <10000>;
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cdc-vdd-cp-supply = <&S4A>;
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qcom,cdc-vdd-cp-voltage = <2040000 2040000>;
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qcom,cdc-vdd-cp-current = <300000>;
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cdc-pa-vpos-supply = <&S4A>;
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qcom,cdc-pa-vpos-voltage = <2040000 2040000>;
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qcom,cdc-pa-vpos-current = <2400000>;
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cdc-vdd-mic-bias-supply = <&L22A>;
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qcom,cdc-vdd-mic-bias-voltage = <3304000 3304000>;
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qcom,cdc-vdd-mic-bias-current = <50000>;
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qcom,cdc-micbias1-mv = <1800>;
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qcom,cdc-micbias2-mv = <1800>;
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qcom,cdc-micbias3-mv = <1800>;
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qcom,cdc-static-supplies = "cdc-vdd-cp",
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"cdc-vdd-io";
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qcom,cdc-on-demand-supplies = "cdc-pa-vpos",
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"cdc-vdd-mic-bias";
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};
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};
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@@ -169,6 +169,10 @@
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compatible = "qcom,pm8941-rtc";
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interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
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};
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pm2250_spmi: qcom,pm2250-spmi {
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compatible = "qcom,pm2250-spmi";
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};
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};
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pm2250_1: qcom,pm2250@1 {
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@@ -0,0 +1,367 @@
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#include <dt-bindings/clock/qcom,audio-ext-clk.h>
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#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
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#include <dt-bindings/sound/audio-codec-port-types.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "scuba-lpi.dtsi"
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#include "pm2250.dtsi"
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&bolero {
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qcom,num-macros = <3>;
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qcom,bolero-version = <5>;
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bolero-clk-rsc-mngr {
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compatible = "qcom,bolero-clk-rsc-mngr";
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qcom,fs-gen-sequence = <0x3000 0x1>,
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<0x3004 0x1>, <0x3080 0x2>;
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qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
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qcom,va_mclk_mode_muxsel = <0x0a7a0000>;
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clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
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"va_core_clk", "va_npl_clk";
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clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
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<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
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<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
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};
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tx_macro: tx-macro@0a620000 {
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compatible = "qcom,tx-macro";
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reg = <0x0a620000 0x0>;
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clock-names = "tx_core_clk", "tx_npl_clk";
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clocks = <&clock_audio_tx_1 0>,
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<&clock_audio_tx_2 0>;
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qcom,tx-dmic-sample-rate = <2400000>;
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qcom,is-used-swr-gpio = <0>;
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};
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rx_macro: rx-macro@0a600000 {
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compatible = "qcom,rx-macro";
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reg = <0x0a600000 0x0>;
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clock-names = "rx_core_clk", "rx_npl_clk";
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clocks = <&clock_audio_rx_1 0>,
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<&clock_audio_rx_2 0>;
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qcom,rx-swr-gpios = <&rx_swr_gpios>;
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qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
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qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
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qcom,default-clk-id = <TX_CORE_CLK>;
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swr1: rx_swr_master {
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compatible = "qcom,swr-mstr";
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#address-cells = <2>;
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#size-cells = <0>;
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clock-names = "lpass_audio_hw_vote";
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clocks = <&lpass_audio_hw_vote 0>;
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qcom,swr_master_id = <2>;
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qcom,swrm-hctl-reg = <0x0a6a9098>;
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qcom,mipi-sdw-block-packing-mode = <1>;
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swrm-io-base = <0x0a610000 0x0>;
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interrupts = <0 297 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "swr_master_irq";
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qcom,swr-num-ports = <5>;
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qcom,swr-port-mapping = <1 HPH_L 0x1>,
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<1 HPH_R 0x2>, <2 CLSH 0x1>,
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<3 COMP_L 0x1>, <3 COMP_R 0x2>,
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<4 LO 0x1>, <5 DSD_L 0x1>,
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<5 DSD_R 0x2>;
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qcom,swr-num-dev = <1>;
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qcom,swr-clock-stop-mode0 = <1>;
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rouleur_rx_slave: rouleur-rx-slave {
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compatible = "qcom,rouleur-slave";
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reg = <0x0C 0x01170224>;
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};
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};
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};
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va_macro: va-macro@0a730000 {
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compatible = "qcom,va-macro";
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reg = <0x0a730000 0x0>;
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clock-names = "lpass_audio_hw_vote";
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clocks = <&lpass_audio_hw_vote 0>;
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qcom,va-dmic-sample-rate = <600000>;
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qcom,va-clk-mux-select = <1>;
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qcom,va-island-mode-muxsel = <0x0a7a0000>;
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qcom,default-clk-id = <TX_CORE_CLK>;
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qcom,is-used-swr-gpio = <1>;
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qcom,va-swr-gpios = <&va_swr_gpios>;
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swr0: va_swr_master {
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compatible = "qcom,swr-mstr";
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#address-cells = <2>;
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#size-cells = <0>;
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clock-names = "lpass_audio_hw_vote";
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clocks = <&lpass_audio_hw_vote 0>;
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qcom,swr_master_id = <3>;
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qcom,swrm-hctl-reg = <0x0a7ec100>;
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qcom,mipi-sdw-block-packing-mode = <1>;
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swrm-io-base = <0x0a740000 0x0>;
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interrupts =
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<0 296 IRQ_TYPE_LEVEL_HIGH>,
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<0 79 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "swr_master_irq", "swr_wake_irq";
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qcom,swr-wakeup-required = <1>;
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qcom,swr-num-ports = <3>;
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qcom,swr-port-mapping = <1 ADC1 0x1>, <1 ADC2 0x2>,
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<1 ADC3 0x4>, <1 ADC4 0x8>,
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<2 DMIC0 0x1>, <2 DMIC1 0x2>,
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<2 DMIC2 0x4>, <2 DMIC3 0x8>,
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<3 DMIC4 0x1>, <3 DMIC5 0x2>,
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<3 DMIC6 0x4>, <3 DMIC7 0x8>;
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qcom,swr-num-dev = <1>;
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qcom,swr-clock-stop-mode0 = <1>;
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qcom,swr-mstr-irq-wakeup-capable = <1>;
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rouleur_tx_slave: rouleur-tx-slave {
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compatible = "qcom,rouleur-slave";
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reg = <0x0C 0x01170223>;
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};
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};
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};
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rouleur_codec: rouleur-codec {
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compatible = "qcom,rouleur-codec";
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qcom,split-codec = <1>;
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qcom,pmic-spmi-node = <&pm2250_spmi>;
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qcom,wcd-reset-reg = <0x0000F3DB>;
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qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
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<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
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<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
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<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
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<4 DSD_R 0x2 0 DSD_R>;
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qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
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<0 ADC2 0x2 0 ADC2>, <0 DMIC0 0x4 0 ADC3>,
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<0 MBHC 0x8 0 ADC4>, <1 DMIC0 0x1 0 DMIC0>,
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<1 DMIC1 0x2 0 DMIC1>, <1 ADC1 0x4 0 DMIC2>,
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<1 MBHC 0x8 0 DMIC3>;
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qcom,rx-slave = <&rouleur_rx_slave>;
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qcom,tx-slave = <&rouleur_tx_slave>;
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cdc-vdd-io-supply = <&L15A>;
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qcom,cdc-vdd-io-voltage = <1800000 1800000>;
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qcom,cdc-vdd-io-current = <10000>;
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cdc-vdd-cp-supply = <&S4A>;
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qcom,cdc-vdd-cp-voltage = <2040000 2040000>;
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qcom,cdc-vdd-cp-current = <300000>;
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cdc-pa-vpos-supply = <&S4A>;
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qcom,cdc-pa-vpos-voltage = <2040000 2040000>;
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qcom,cdc-pa-vpos-current = <2400000>;
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cdc-vdd-mic-bias-supply = <&L22A>;
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qcom,cdc-vdd-mic-bias-voltage = <3304000 3304000>;
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qcom,cdc-vdd-mic-bias-current = <50000>;
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qcom,cdc-micbias1-mv = <1800>;
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qcom,cdc-micbias2-mv = <1800>;
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qcom,cdc-micbias3-mv = <1800>;
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qcom,cdc-static-supplies = "cdc-vdd-cp",
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"cdc-vdd-io";
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qcom,cdc-on-demand-supplies = "cdc-pa-vpos",
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"cdc-vdd-mic-bias";
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};
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};
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&scuba_snd {
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qcom,model = "bengal-scubaidp-snd-card";
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qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
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qcom,wcn-btfm = <1>;
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qcom,va-bolero-codec = <1>;
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qcom,rxtx-bolero-codec = <1>;
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qcom,audio-routing =
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"AMIC1", "MIC BIAS1",
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"MIC BIAS1", "Analog Mic1",
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"AMIC2", "MIC BIAS2",
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"MIC BIAS2", "Analog Mic2",
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"AMIC3", "MIC BIAS3",
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"MIC BIAS3", "Analog Mic3",
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"TX DMIC0", "MIC BIAS3",
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"MIC BIAS3", "Digital Mic0",
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"TX DMIC1", "MIC BIAS3",
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"MIC BIAS3", "Digital Mic1",
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"TX DMIC2", "MIC BIAS1",
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"MIC BIAS1", "Digital Mic2",
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"TX DMIC3", "MIC BIAS1",
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"MIC BIAS1", "Digital Mic3",
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"IN1_HPHL", "HPHL_OUT",
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"IN2_HPHR", "HPHR_OUT",
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"SpkrMono WSA_IN", "LO",
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"TX SWR_MIC0", "ADC1_OUTPUT",
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"TX SWR_MIC1", "ADC2_OUTPUT",
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"TX SWR_MIC2", "DMIC1_OUTPUT",
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"TX SWR_MIC5", "DMIC2_OUTPUT",
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"TX SWR_MIC0", "VA_TX_SWR_CLK",
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"TX SWR_MIC1", "VA_TX_SWR_CLK",
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"TX SWR_MIC2", "VA_TX_SWR_CLK",
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"TX SWR_MIC3", "VA_TX_SWR_CLK",
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"TX SWR_MIC4", "VA_TX_SWR_CLK",
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"TX SWR_MIC5", "VA_TX_SWR_CLK",
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"TX SWR_MIC6", "VA_TX_SWR_CLK",
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"TX SWR_MIC7", "VA_TX_SWR_CLK",
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"TX SWR_MIC8", "VA_TX_SWR_CLK",
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"TX SWR_MIC9", "VA_TX_SWR_CLK",
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"TX SWR_MIC10", "VA_TX_SWR_CLK",
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"TX SWR_MIC11", "VA_TX_SWR_CLK",
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"RX_TX DEC0_INP", "TX DEC0 MUX",
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"RX_TX DEC1_INP", "TX DEC1 MUX",
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"RX_TX DEC2_INP", "TX DEC2 MUX",
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"RX_TX DEC3_INP", "TX DEC3 MUX",
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"TX_AIF1 CAP", "VA_TX_SWR_CLK",
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"TX_AIF2 CAP", "VA_TX_SWR_CLK",
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"TX_AIF3 CAP", "VA_TX_SWR_CLK",
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"VA DMIC0", "VA MIC BIAS3",
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"VA DMIC1", "VA MIC BIAS3",
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"VA DMIC2", "VA MIC BIAS1",
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"VA DMIC3", "VA MIC BIAS1",
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"VA MIC BIAS3", "Digital Mic0",
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"VA MIC BIAS3", "Digital Mic1",
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"VA MIC BIAS1", "Digital Mic2",
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"VA MIC BIAS1", "Digital Mic3",
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"VA SWR_MIC0", "ADC1_OUTPUT",
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"VA SWR_MIC1", "ADC2_OUTPUT",
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"VA SWR_MIC2", "DMIC1_OUTPUT",
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"VA SWR_MIC5", "DMIC2_OUTPUT";
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qcom,msm-mbhc-hphl-swh = <1>;
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qcom,msm-mbhc-gnd-swh = <1>;
|
||||
qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
|
||||
qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>;
|
||||
|
||||
asoc-codec = <&stub_codec>, <&bolero>;
|
||||
asoc-codec-names = "msm-stub-codec.1", "bolero_codec";
|
||||
qcom,wsa-max-devs = <1>;
|
||||
qcom,wsa-devs = <&wsa881x_i2c_e>;
|
||||
qcom,wsa-aux-dev-prefix = "SpkrMono";
|
||||
qcom,codec-max-aux-devs = <1>;
|
||||
qcom,codec-aux-devs = <&rouleur_codec>;
|
||||
qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&bolero>,
|
||||
<&lpi_tlmm>;
|
||||
};
|
||||
|
||||
&qupv3_se1_i2c {
|
||||
wsa881x_i2c_e: wsa881x-i2c-codec@e {
|
||||
compatible = "qcom,wsa881x-i2c-codec";
|
||||
reg = <0x0e>;
|
||||
clock-names = "wsa_mclk";
|
||||
clocks = <&wsa881x_analog_clk 0>;
|
||||
qcom,wsa-analog-clk-gpio = <&wsa881x_analog_clk_gpio>;
|
||||
qcom,wsa-analog-reset-gpio = <&wsa881x_analog_reset_gpio>;
|
||||
};
|
||||
|
||||
wsa881x_i2c_44: wsa881x-i2c-codec@44 {
|
||||
compatible = "qcom,wsa881x-i2c-codec";
|
||||
reg = <0x044>;
|
||||
};
|
||||
};
|
||||
|
||||
&q6core {
|
||||
cdc_dmic01_gpios: cdc_dmic01_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
|
||||
pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
|
||||
cdc_dmic23_gpios: cdc_dmic23_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>;
|
||||
pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
|
||||
rx_swr_gpios: rx_swr_clk_data_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active
|
||||
&rx_swr_data1_active>;
|
||||
pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep
|
||||
&rx_swr_data1_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
|
||||
va_swr_gpios: va_swr_clk_data_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&tx_swr_clk_active &tx_swr_data1_active
|
||||
&tx_swr_data2_active>;
|
||||
pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data1_sleep
|
||||
&tx_swr_data2_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
qcom,chip-wakeup-reg = <0x003ca04c>;
|
||||
qcom,chip-wakeup-maskbit = <0>;
|
||||
qcom,chip-wakeup-default-val = <0x1>;
|
||||
};
|
||||
|
||||
wsa881x_analog_clk_gpio: msm_cdc_pinctrl@18 {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&wsa_mclk_active>;
|
||||
pinctrl-1 = <&wsa_mclk_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
wsa881x_analog_reset_gpio: msm_cdc_pinctrl@106 {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&spkr_1_sd_n_active>;
|
||||
pinctrl-1 = <&spkr_1_sd_n_sleep>;
|
||||
};
|
||||
|
||||
wsa881x_analog_clk: wsa_ana_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_2>;
|
||||
qcom,codec-lpass-ext-clk-freq = <9600000>;
|
||||
qcom,codec-lpass-clk-id = <0x301>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_rx_1: rx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30E>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_rx_2: rx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30F>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_1: tx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30C>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_2: tx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30D>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_1: va_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30B>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_2: va_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x310>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&va_cdc_dma_0_tx {
|
||||
qcom,msm-dai-is-island-supported = <1>;
|
||||
};
|
||||
@@ -0,0 +1,129 @@
|
||||
#include <dt-bindings/clock/qcom,audio-ext-clk.h>
|
||||
#include "msm-audio-lpass.dtsi"
|
||||
|
||||
&msm_audio_ion {
|
||||
iommus = <&apps_smmu 0x01c1 0x0>;
|
||||
qcom,smmu-sid-mask = /bits/ 64 <0xf>;
|
||||
};
|
||||
|
||||
&audio_apr {
|
||||
q6core: qcom,q6core-audio {
|
||||
compatible = "qcom,q6core-audio";
|
||||
|
||||
lpass_audio_hw_vote: vote_lpass_audio_hw {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
bolero: bolero-cdc {
|
||||
compatible = "qcom,bolero-codec";
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
bolero-clk-rsc-mngr {
|
||||
compatible = "qcom,bolero-clk-rsc-mngr";
|
||||
};
|
||||
|
||||
va_macro: va-macro@0a730000 {
|
||||
swr0: va_swr_master {
|
||||
};
|
||||
};
|
||||
|
||||
rx_macro: rx-macro@0a600000 {
|
||||
swr1: rx_swr_master {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&q6core {
|
||||
scuba_snd: sound {
|
||||
compatible = "qcom,bengal-asoc-snd";
|
||||
qcom,mi2s-audio-intf = <0>;
|
||||
qcom,auxpcm-audio-intf = <0>;
|
||||
qcom,tdm-audio-intf = <0>;
|
||||
qcom,wcn-btfm = <0>;
|
||||
qcom,afe-rxtx-lb = <0>;
|
||||
|
||||
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
|
||||
<&loopback>, <&compress>, <&hostless>,
|
||||
<&afe>, <&lsm>, <&routing>, <&compr>,
|
||||
<&pcm_noirq>;
|
||||
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
|
||||
"msm-pcm-dsp.2", "msm-voip-dsp",
|
||||
"msm-pcm-voice", "msm-pcm-loopback",
|
||||
"msm-compress-dsp", "msm-pcm-hostless",
|
||||
"msm-pcm-afe", "msm-lsm-client",
|
||||
"msm-pcm-routing", "msm-compr-dsp",
|
||||
"msm-pcm-dsp-noirq";
|
||||
asoc-cpu = <&dai_mi2s0>, <&dai_mi2s1>,
|
||||
<&dai_mi2s2>, <&dai_mi2s3>,
|
||||
<&dai_pri_auxpcm>,
|
||||
<&dai_sec_auxpcm>, <&dai_tert_auxpcm>,
|
||||
<&dai_quat_auxpcm>,
|
||||
<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
|
||||
<&afe_proxy_tx>, <&incall_record_rx>,
|
||||
<&incall_record_tx>, <&incall_music_rx>,
|
||||
<&incall_music_2_rx>,
|
||||
<&usb_audio_rx>, <&usb_audio_tx>,
|
||||
<&sb_7_rx>, <&sb_7_tx>, <&sb_8_tx>,
|
||||
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
|
||||
<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
|
||||
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
|
||||
<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
|
||||
<&va_cdc_dma_0_tx>, <&va_cdc_dma_1_tx>,
|
||||
<&va_cdc_dma_2_tx>,
|
||||
<&rx_cdc_dma_0_rx>, <&tx_cdc_dma_0_tx>,
|
||||
<&rx_cdc_dma_1_rx>, <&tx_cdc_dma_1_tx>,
|
||||
<&rx_cdc_dma_2_rx>, <&tx_cdc_dma_2_tx>,
|
||||
<&rx_cdc_dma_3_rx>, <&tx_cdc_dma_3_tx>,
|
||||
<&rx_cdc_dma_4_rx>, <&tx_cdc_dma_4_tx>,
|
||||
<&rx_cdc_dma_5_rx>, <&tx_cdc_dma_5_tx>,
|
||||
<&rx_cdc_dma_6_rx>, <&rx_cdc_dma_7_rx>,
|
||||
<&afe_loopback_tx>;
|
||||
asoc-cpu-names = "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
|
||||
"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
|
||||
"msm-dai-q6-auxpcm.1",
|
||||
"msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3",
|
||||
"msm-dai-q6-auxpcm.4", "msm-dai-q6-dev.224",
|
||||
"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
|
||||
"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
|
||||
"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
|
||||
"msm-dai-q6-dev.32770",
|
||||
"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
|
||||
"msm-dai-q6-dev.16398", "msm-dai-q6-dev.16399",
|
||||
"msm-dai-q6-dev.16401",
|
||||
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
|
||||
"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
|
||||
"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36897",
|
||||
"msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913",
|
||||
"msm-dai-cdc-dma-dev.45089",
|
||||
"msm-dai-cdc-dma-dev.45091",
|
||||
"msm-dai-cdc-dma-dev.45093",
|
||||
"msm-dai-cdc-dma-dev.45104",
|
||||
"msm-dai-cdc-dma-dev.45105",
|
||||
"msm-dai-cdc-dma-dev.45106",
|
||||
"msm-dai-cdc-dma-dev.45107",
|
||||
"msm-dai-cdc-dma-dev.45108",
|
||||
"msm-dai-cdc-dma-dev.45109",
|
||||
"msm-dai-cdc-dma-dev.45110",
|
||||
"msm-dai-cdc-dma-dev.45111",
|
||||
"msm-dai-cdc-dma-dev.45112",
|
||||
"msm-dai-cdc-dma-dev.45113",
|
||||
"msm-dai-cdc-dma-dev.45114",
|
||||
"msm-dai-cdc-dma-dev.45115",
|
||||
"msm-dai-cdc-dma-dev.45116",
|
||||
"msm-dai-cdc-dma-dev.45118",
|
||||
"msm-dai-q6-dev.24577";
|
||||
fsa4480-i2c-handle = <&fsa4480>;
|
||||
};
|
||||
};
|
||||
|
||||
&qupv3_se1_i2c {
|
||||
status = "ok"
|
||||
fsa4480: fsa4480@42 {
|
||||
compatible = "qcom,fsa4480-i2c";
|
||||
reg = <0x42>;
|
||||
};
|
||||
};
|
||||
@@ -1,3 +1,5 @@
|
||||
#include "scuba-audio-overlay.dtsi"
|
||||
|
||||
&soc {
|
||||
};
|
||||
|
||||
|
||||
+1957
File diff suppressed because it is too large.
Load diff
@@ -172,6 +172,53 @@
|
||||
};
|
||||
};
|
||||
|
||||
/* WSA speaker reset pin1 */
|
||||
spkr_1_sd_n {
|
||||
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
||||
mux {
|
||||
pins = "gpio106";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio106";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
||||
mux {
|
||||
pins = "gpio106";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio106";
|
||||
drive-strength = <16>; /* 16 mA */
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fsa_usbc_ana_en_n@102 {
|
||||
fsa_usbc_ana_en: fsa_usbc_ana_en {
|
||||
mux {
|
||||
pins = "gpio102";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio102";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
|
||||
qupv3_se0_i2c_active: qupv3_se0_i2c_active {
|
||||
mux {
|
||||
|
||||
@@ -19,6 +19,8 @@
|
||||
aliases {
|
||||
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
|
||||
sdhc2 = &sdhc_2; /* SDC2 SD Card slot */
|
||||
swr0 = &swr0;
|
||||
swr1 = &swr1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
@@ -1266,6 +1268,7 @@
|
||||
#include "scuba-regulator.dtsi"
|
||||
#include "scuba-gdsc.dtsi"
|
||||
#include "scuba-qupv3.dtsi"
|
||||
#include "scuba-audio.dtsi"
|
||||
#include "scuba-usb.dtsi"
|
||||
#include "msm-arm-smmu-scuba.dtsi"
|
||||
|
||||
|
||||
Reference in new issue
Block a user