msm: camera: ope: Maintain current clock value during acquire

OPE driver maintain the current clock value field per instance
based on clock rate set for OPE clock. OPE driver sets the clock
to turbo during acquire time but doesn't update the internal field
for multiple acquire request. This causes power regression as further
clock calculation happens on previously set clock values for multiple
acquire request.

Corrected the logic to always update current clock value based on clock
rate set during acquire time.

CRs-Fixed: 2724827
Change-Id: Iba377d8918bda37b4d3267e677414a7b9e5a82ce
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
This commit is contained in:
Alok Chauhan committed 2020-07-21 14:52:32 +05:30
1 parent e5d41356bd
commit f76c2819d6
1 file changed
+5 -5
+5 -5
View File
@@ -1333,7 +1333,7 @@ static int cam_ope_mgr_calculate_num_path(
((clk_info->axi_path[i].path_data_type -
CAM_AXI_PATH_DATA_OPE_START_OFFSET) >=
CAM_OPE_MAX_PER_PATH_VOTES)) {
CAM_WARN(CAM_OPE,
CAM_DBG(CAM_OPE,
"Invalid path %d, start offset=%d, max=%d",
ctx_data->clk_info.axi_path[i].path_data_type,
CAM_AXI_PATH_DATA_OPE_START_OFFSET,
@@ -1641,11 +1641,11 @@ static void cam_ope_ctx_cdm_callback(uint32_t handle, void *userdata,
if (!rc)
goto end;
} else {
CAM_ERR(CAM_OPE,
CAM_INFO(CAM_OPE,
"CDM hdl=%x, udata=%pK, status=%d, cookie=%d req_id = %llu ctx_id=%d",
handle, userdata, status, cookie,
ope_req->request_id, ctx->ctx_id);
CAM_ERR(CAM_OPE, "Rst of CDM and OPE for error reqid = %lld",
CAM_INFO(CAM_OPE, "Rst of CDM and OPE for error reqid = %lld",
ope_req->request_id);
if (status != CAM_CDM_CB_STATUS_HW_FLUSH) {
cam_ope_dump_req_data(ope_req);
@@ -2642,8 +2642,6 @@ static int cam_ope_mgr_acquire_hw(void *hw_priv, void *hw_acquire_args)
hw_mgr->clk_info.base_clk =
soc_info->clk_rate[CAM_TURBO_VOTE][idx];
hw_mgr->clk_info.curr_clk =
soc_info->clk_rate[CAM_TURBO_VOTE][idx];
hw_mgr->clk_info.threshold = 5;
hw_mgr->clk_info.over_clked = 0;
@@ -2674,6 +2672,8 @@ static int cam_ope_mgr_acquire_hw(void *hw_priv, void *hw_acquire_args)
soc_info = &dev->soc_info;
idx = soc_info->src_clk_idx;
clk_update.clk_rate = soc_info->clk_rate[CAM_TURBO_VOTE][idx];
hw_mgr->clk_info.curr_clk =
soc_info->clk_rate[CAM_TURBO_VOTE][idx];
rc = hw_mgr->ope_dev_intf[i]->hw_ops.process_cmd(
hw_mgr->ope_dev_intf[i]->hw_priv, OPE_HW_CLK_UPDATE,