ARM: dts: msm: Add IPI prediction parameter for lito

Enable IPI prediction for lito. Disable IPI prediction for other targets.

Change-Id: Icd3720e1e97148e7242f9d8e850a4f3968b68b2f
This commit is contained in:
Maulik Shah committed 2019-12-17 12:31:00 +05:30
1 parent 3534fd5b58
commit bca82130d7
5 files changed
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+2
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@@ -83,6 +83,8 @@ that share the parameters.It contains the following properties.
node.
Optional properties:
- qcom,disable-ipi-prediction: This property is used to indicate the
LPM governor to disable ipi based LPM prediction on CPUs.
- qcom,disable-prediction: This property is used to indicate the
LPM governor is to disable sleep prediction to this cpu.
- qcom,ref-stddev: This property is used as reference standard deviation
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@@ -78,6 +78,7 @@
#size-cells = <0>;
qcom,psci-mode-shift = <0>;
qcom,psci-mode-mask = <0xf>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>;
qcom,pm-cpu-level@0 { /* C1 */
@@ -146,6 +147,7 @@
#size-cells = <0>;
qcom,psci-mode-shift = <0>;
qcom,psci-mode-mask = <0xf>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>;
qcom,pm-cpu-level@0 { /* C1 */
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@@ -42,6 +42,7 @@
qcom,ref-stddev = <500>;
qcom,tmr-add = <1000>;
qcom,ref-premature-cnt = <1>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>;
qcom,pm-cpu-level@0 { /* C1 */
@@ -71,6 +72,7 @@
#size-cells = <0>;
qcom,psci-mode-shift = <0>;
qcom,psci-mode-mask = <0xf>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>;
qcom,pm-cpu-level@2 { /* C1 */
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@@ -66,6 +66,7 @@
qcom,ref-stddev = <500>;
qcom,tmr-add = <1000>;
qcom,ref-premature-cnt = <1>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4
&CPU5>;
@@ -110,6 +111,7 @@
qcom,ref-stddev = <100>;
qcom,tmr-add = <100>;
qcom,ref-premature-cnt = <3>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU6 &CPU7>;
qcom,pm-cpu-level@0 { /* C1 */
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@@ -66,6 +66,7 @@
qcom,ref-stddev = <500>;
qcom,tmr-add = <1000>;
qcom,ref-premature-cnt = <1>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4
&CPU5>;