asoc:add aw88261 codec driver
add aw88261 driver; for rhode evb bringup. Change-Id: I1d70441f873a5177b7209cb3e46283a57ceaeb7d Signed-off-by: yaozm1 <yaozm1@lenovo.com> Reviewed-on: https://gerrit.mot.com/2099634 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com> Submit-Approved: Jira Key
This commit is contained in:
yaozm1 authored and Gilberto Gambugge committed
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793f3936a6
commit
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22 files changed
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@@ -288,8 +288,18 @@ hdmi_dlkm-y := $(HDMICODEC_OBJS)
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#Add awinic driver begain
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ifdef CONFIG_SND_SMARTPA_AW882XX
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ifneq (,$(filter rhode%, $(TARGET_PRODUCT)))
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SND_SOC_AW882XX_OBJS += aw88261/aw882xx.o
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SND_SOC_AW882XX_OBJS += aw88261/aw_init.o
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SND_SOC_AW882XX_OBJS += aw88261/aw_bin_parse.o
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SND_SOC_AW882XX_OBJS += aw88261/aw_calib.o
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SND_SOC_AW882XX_OBJS += aw88261/aw_device.o
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SND_SOC_AW882XX_OBJS += aw88261/aw_dsp.o
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SND_SOC_AW882XX_OBJS += aw88261/aw_monitor.o
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else
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SND_SOC_AW882XX_OBJS += awinic/aw882xx.o
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endif
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endif
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obj-$(CONFIG_SND_SMARTPA_AW882XX) += aw882xx_dlkm.o
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aw882xx_dlkm-y := $(SND_SOC_AW882XX_OBJS)
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#Add awinic driver end
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File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,184 @@
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#ifndef _AW882XX_H_
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#define _AW882XX_H_
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#include <linux/version.h>
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#include <linux/kernel.h>
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#include "aw_device.h"
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/*
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* i2c transaction on Linux limited to 64k
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* (See Linux kernel documentation: Documentation/i2c/writing-clients)
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*/
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#define AW882XX_CHIP_ID_REG (0x00)
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#define MAX_I2C_BUFFER_SIZE 65536
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#define AW882XX_I2C_READ_MSG_NUM 2
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#define AW882XX_DC_DELAY_TIME (1000)
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#define AW882XX_LOAD_FW_DELAY_TIME (0)
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#define AW_START_RETRIES (5)
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#define AW882XX_RUNIN_TEST
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#define AW_I2C_RETRIES 5 /* 5 times */
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#define AW_I2C_RETRY_DELAY 5 /* 5 ms */
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#define AW882XX_RATES SNDRV_PCM_RATE_8000_48000
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#define AW882XX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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enum {
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AW882XX_STREAM_CLOSE = 0,
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AW882XX_STREAM_OPEN,
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};
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enum aw882xx_chipid {
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PID_1852_ID = 0x1852,
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PID_2013_ID = 0x2013,
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PID_2032_ID = 0x2032,
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PID_2055_ID = 0x2055,
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PID_2071_ID = 0x2071,
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PID_2113_ID = 0x2113,
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};
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#define AW882XX_SOFT_RESET_VALUE (0x55aa)
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enum aw882xx_int_type {
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INT_TYPE_NONE = 0,
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INT_TYPE_UVLO = 0x1,
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INT_TYPE_BSTOC = 0x2,
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INT_TYPE_OCDI = 0x4,
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INT_TYPE_OTHI = 0x8,
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};
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 1)
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#define AW_KERNEL_VER_OVER_4_19_1
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#endif
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)
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#define AW_KERNEL_VER_OVER_5_4_0
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MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);
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#endif
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#ifdef AW_KERNEL_VER_OVER_4_19_1
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typedef struct snd_soc_component aw_snd_soc_codec_t;
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typedef struct snd_soc_component_driver aw_snd_soc_codec_driver_t;
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#else
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typedef struct snd_soc_codec aw_snd_soc_codec_t;
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typedef struct snd_soc_codec_driver aw_snd_soc_codec_driver_t;
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#endif
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struct aw_componet_codec_ops {
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aw_snd_soc_codec_t *(*kcontrol_codec)(struct snd_kcontrol *kcontrol);
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void *(*codec_get_drvdata)(aw_snd_soc_codec_t *codec);
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int (*add_codec_controls)(aw_snd_soc_codec_t *codec,
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const struct snd_kcontrol_new *controls, unsigned int num_controls);
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void (*unregister_codec)(struct device *dev);
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int (*register_codec)(struct device *dev,
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const aw_snd_soc_codec_driver_t *codec_drv,
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struct snd_soc_dai_driver *dai_drv,
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int num_dai);
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};
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enum {
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AWRW_I2C_ST_NONE = 0,
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AWRW_I2C_ST_READ,
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AWRW_I2C_ST_WRITE,
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};
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#define AWRW_ADDR_BYTES (1)
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#define AWRW_DATA_BYTES (2)
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#define AWRW_HDR_LEN (24)
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enum {
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AWRW_FLAG_WRITE = 0,
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AWRW_FLAG_READ,
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};
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enum {
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AW_BSTCFG_DISABLE = 0,
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AW_BSTCFG_ENABLE,
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};
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enum {
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AW_FRCSET_DISABLE = 0,
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AW_FRCSET_ENABLE,
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};
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enum {
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AW_BOP_DISABLE = 0,
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AW_BOP_ENABLE,
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};
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enum {
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AWRW_HDR_WR_FLAG = 0,
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AWRW_HDR_ADDR_BYTES,
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AWRW_HDR_DATA_BYTES,
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AWRW_HDR_REG_NUM,
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AWRW_HDR_REG_ADDR,
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AWRW_HDR_MAX,
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};
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struct aw882xx_i2c_packet{
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char status;
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unsigned int reg_num;
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unsigned int reg_addr;
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char *reg_data;
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};
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/********************************************
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* struct aw882xx
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*******************************************/
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struct aw882xx {
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int sysclk;
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int rate;
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int pstream;
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int cstream;
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unsigned int fade_flag;
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unsigned char index;
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unsigned char phase_sync; /* phase sync */
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unsigned char dc_flag;
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unsigned char dbg_en_prof; /* debug enable/disable profile function */
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unsigned char allow_pw; /* allow power */
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int reset_gpio;
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int irq_gpio;
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unsigned int chip_id;
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unsigned char fw_status;
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unsigned char fw_retry_cnt;
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unsigned char rw_reg_addr; /* rw attr node store read addr */
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aw_snd_soc_codec_t *codec;
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struct aw_componet_codec_ops *codec_ops;
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struct i2c_client *i2c;
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struct device *dev;
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struct aw882xx_i2c_packet i2c_packet;
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struct aw_device *aw_pa;
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struct workqueue_struct *work_queue;
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struct delayed_work start_work;
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struct delayed_work interrupt_work;
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struct delayed_work dc_work;
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struct delayed_work fw_work;
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#ifdef AW882XX_RUNIN_TEST
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struct delayed_work adsp_status;
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#endif
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struct mutex lock;
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};
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void aw882xx_kcontorl_set(struct aw882xx *aw882xx);
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int aw882xx_get_version(char *buf, int size);
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int aw882xx_get_dev_num(void);
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int aw882xx_i2c_write(struct aw882xx *aw882xx,
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unsigned char reg_addr, unsigned int reg_data);
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int aw882xx_i2c_read(struct aw882xx *aw882xx,
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unsigned char reg_addr, unsigned int *reg_data);
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int aw882xx_i2c_write_bits(struct aw882xx *aw882xx,
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unsigned char reg_addr, unsigned int mask, unsigned int reg_data);
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int aw882xx_init(struct aw882xx *aw882xx, int index);
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int aw882xx_hw_reset(struct aw882xx *aw882xx);
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#endif
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@@ -0,0 +1,512 @@
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/*
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* aw_bin_parse.c
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*
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* Copyright (c) 2020 AWINIC Technology CO., LTD
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/i2c.h>
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#include <linux/of_gpio.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/firmware.h>
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#include <linux/slab.h>
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#include <linux/version.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/debugfs.h>
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#include <linux/miscdevice.h>
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#include <asm/uaccess.h>
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#include <linux/regmap.h>
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#include <linux/timer.h>
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#include <linux/workqueue.h>
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#include <linux/hrtimer.h>
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#include <linux/mutex.h>
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#include <linux/cdev.h>
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#include <linux/list.h>
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#include <linux/string.h>
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#include "aw_bin_parse.h"
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#define AWINIC_CODE_VERSION "V0.0.7-V1.0.4" /* "code version"-"excel version" */
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#define DEBUG_LOG_LEVEL
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#ifdef DEBUG_LOG_LEVEL
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#define DBG(fmt, arg...) do {\
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printk("AWINIC_BIN %s,line= %d,"fmt, __func__, __LINE__, ##arg);\
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} while (0)
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#define DBG_ERR(fmt, arg...) do {\
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printk("AWINIC_BIN_ERR %s,line= %d,"fmt, __func__, __LINE__, ##arg);\
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} while (0)
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#else
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#define DBG(fmt, arg...) do {} while (0)
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#define DBG_ERR(fmt, arg...) do {} while (0)
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#endif
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#define printing_data_code
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typedef unsigned short int aw_uint16;
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typedef unsigned long int aw_uint32;
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#define BigLittleSwap16(A) ((((aw_uint16)(A) & 0xff00) >> 8) | \
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(((aw_uint16)(A) & 0x00ff) << 8))
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#define BigLittleSwap32(A) ((((aw_uint32)(A) & 0xff000000) >> 24) | \
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(((aw_uint32)(A) & 0x00ff0000) >> 8) | \
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(((aw_uint32)(A) & 0x0000ff00) << 8) | \
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(((aw_uint32)(A) & 0x000000ff) << 24))
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/**
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*
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* Interface function
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*
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* return value:
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* value = 0 :success;
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* value = -1 :check bin header version
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* value = -2 :check bin data type
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* value = -3 :check sum or check bin data len error
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* value = -4 :check data version
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* value = -5 :check register num
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* value = -6 :check dsp reg num
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* value = -7 :check soc app num
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* value = -8 :bin is NULL point
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*
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**/
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/********************************************************
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*
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* check sum data
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*
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********************************************************/
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int aw_check_sum(struct aw_bin *bin, int bin_num)
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{
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unsigned int i = 0;
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unsigned int sum_data = 0;
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unsigned int check_sum = 0;
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unsigned char *p_check_sum = NULL;
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DBG("enter\n");
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p_check_sum =
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&(bin->info.data[(bin->header_info[bin_num].valid_data_addr -
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bin->header_info[bin_num].header_len)]);
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DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum);
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check_sum = GET_32_DATA(*(p_check_sum + 3),
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*(p_check_sum + 2),
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*(p_check_sum + 1), *(p_check_sum));
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for (i = 4;
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i <
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bin->header_info[bin_num].bin_data_len +
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bin->header_info[bin_num].header_len; i++) {
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sum_data += *(p_check_sum + i);
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}
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DBG("aw_bin_parse bin_num=%d, check_sum = 0x%x, sum_data = 0x%x\n",
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bin_num, check_sum, sum_data);
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if (sum_data != check_sum) {
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p_check_sum = NULL;
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DBG_ERR("aw_bin_parse check sum or check bin data len error\n");
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DBG_ERR("aw_bin_parse bin_num=%d, check_sum = 0x%x, sum_data = 0x%x\n", bin_num, check_sum, sum_data);
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return -3;
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}
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p_check_sum = NULL;
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return 0;
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}
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int aw_check_data_version(struct aw_bin *bin, int bin_num)
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{
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int i = 0;
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DBG("enter\n");
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for (i = DATA_VERSION_V1; i < DATA_VERSION_MAX; i++) {
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if (bin->header_info[bin_num].bin_data_ver == i) {
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return 0;
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}
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}
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DBG_ERR("aw_bin_parse Unrecognized this bin data version\n");
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return -4;
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}
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int aw_check_register_num_v1(struct aw_bin *bin, int bin_num)
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{
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unsigned int check_register_num = 0;
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unsigned int parse_register_num = 0;
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char *p_check_sum = NULL;
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DBG("enter\n");
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p_check_sum =
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&(bin->info.data[(bin->header_info[bin_num].valid_data_addr)]);
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DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum);
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parse_register_num = GET_32_DATA(*(p_check_sum + 3),
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*(p_check_sum + 2),
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*(p_check_sum + 1), *(p_check_sum));
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check_register_num = (bin->header_info[bin_num].bin_data_len - 4) /
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(bin->header_info[bin_num].reg_byte_len +
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bin->header_info[bin_num].data_byte_len);
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DBG
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("aw_bin_parse bin_num=%d, parse_register_num = 0x%x, check_register_num = 0x%x\n",
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bin_num, parse_register_num, check_register_num);
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if (parse_register_num != check_register_num) {
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p_check_sum = NULL;
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DBG_ERR("aw_bin_parse register num is error\n");
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DBG_ERR("aw_bin_parse bin_num=%d, parse_register_num = 0x%x, check_register_num = 0x%x\n", bin_num, parse_register_num, check_register_num);
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return -5;
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}
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bin->header_info[bin_num].reg_num = parse_register_num;
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bin->header_info[bin_num].valid_data_len =
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bin->header_info[bin_num].bin_data_len - 4;
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p_check_sum = NULL;
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bin->header_info[bin_num].valid_data_addr =
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bin->header_info[bin_num].valid_data_addr + 4;
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return 0;
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}
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int aw_check_dsp_reg_num_v1(struct aw_bin *bin, int bin_num)
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{
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unsigned int check_dsp_reg_num = 0;
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unsigned int parse_dsp_reg_num = 0;
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char *p_check_sum = NULL;
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DBG("enter\n");
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p_check_sum =
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&(bin->info.data[(bin->header_info[bin_num].valid_data_addr)]);
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DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum);
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parse_dsp_reg_num = GET_32_DATA(*(p_check_sum + 7),
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*(p_check_sum + 6),
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*(p_check_sum + 5), *(p_check_sum + 4));
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bin->header_info[bin_num].reg_data_byte_len =
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GET_32_DATA(*(p_check_sum + 11), *(p_check_sum + 10),
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*(p_check_sum + 9), *(p_check_sum + 8));
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check_dsp_reg_num =
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(bin->header_info[bin_num].bin_data_len -
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12) / bin->header_info[bin_num].reg_data_byte_len;
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DBG
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("aw_bin_parse bin_num=%d, parse_dsp_reg_num = 0x%x, check_dsp_reg_num = 0x%x\n",
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bin_num, parse_dsp_reg_num, check_dsp_reg_num);
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if (parse_dsp_reg_num != check_dsp_reg_num) {
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p_check_sum = NULL;
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DBG_ERR("aw_bin_parse dsp reg num is error\n");
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DBG_ERR("aw_bin_parse bin_num=%d, parse_dsp_reg_num = 0x%x, check_dsp_reg_num = 0x%x\n", bin_num, parse_dsp_reg_num, check_dsp_reg_num);
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return -6;
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}
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bin->header_info[bin_num].download_addr =
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GET_32_DATA(*(p_check_sum + 3), *(p_check_sum + 2),
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*(p_check_sum + 1), *(p_check_sum));
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bin->header_info[bin_num].reg_num = parse_dsp_reg_num;
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bin->header_info[bin_num].valid_data_len =
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bin->header_info[bin_num].bin_data_len - 12;
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p_check_sum = NULL;
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bin->header_info[bin_num].valid_data_addr =
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bin->header_info[bin_num].valid_data_addr + 12;
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return 0;
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}
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int aw_check_soc_app_num_v1(struct aw_bin *bin, int bin_num)
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{
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unsigned int check_soc_app_num = 0;
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unsigned int parse_soc_app_num = 0;
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char *p_check_sum = NULL;
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|
||||
DBG("enter\n");
|
||||
|
||||
p_check_sum =
|
||||
&(bin->info.data[(bin->header_info[bin_num].valid_data_addr)]);
|
||||
DBG("aw_bin_parse p_check_sum = %p\n", p_check_sum);
|
||||
bin->header_info[bin_num].app_version = GET_32_DATA(*(p_check_sum + 3),
|
||||
*(p_check_sum + 2),
|
||||
*(p_check_sum + 1),
|
||||
*(p_check_sum));
|
||||
parse_soc_app_num = GET_32_DATA(*(p_check_sum + 11),
|
||||
*(p_check_sum + 10),
|
||||
*(p_check_sum + 9), *(p_check_sum + 8));
|
||||
check_soc_app_num = bin->header_info[bin_num].bin_data_len - 12;
|
||||
DBG
|
||||
("aw_bin_parse bin_num=%d, parse_soc_app_num = 0x%x, check_soc_app_num = 0x%x\n",
|
||||
bin_num, parse_soc_app_num, check_soc_app_num);
|
||||
if (parse_soc_app_num != check_soc_app_num) {
|
||||
p_check_sum = NULL;
|
||||
DBG_ERR("aw_bin_parse soc app num is error\n");
|
||||
DBG_ERR("aw_bin_parse bin_num=%d, parse_soc_app_num = 0x%x, check_soc_app_num = 0x%x\n", bin_num, parse_soc_app_num, check_soc_app_num);
|
||||
return -7;
|
||||
}
|
||||
bin->header_info[bin_num].reg_num = parse_soc_app_num;
|
||||
bin->header_info[bin_num].download_addr =
|
||||
GET_32_DATA(*(p_check_sum + 7), *(p_check_sum + 6),
|
||||
*(p_check_sum + 5), *(p_check_sum + 4));
|
||||
bin->header_info[bin_num].valid_data_len =
|
||||
bin->header_info[bin_num].bin_data_len - 12;
|
||||
p_check_sum = NULL;
|
||||
bin->header_info[bin_num].valid_data_addr =
|
||||
bin->header_info[bin_num].valid_data_addr + 12;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/************************
|
||||
***
|
||||
***bin header 1_0_0
|
||||
***
|
||||
************************/
|
||||
void aw_get_single_bin_header_1_0_0(struct aw_bin *bin)
|
||||
{
|
||||
int i;
|
||||
DBG("enter %s\n", __func__);
|
||||
bin->header_info[bin->all_bin_parse_num].header_len = 60;
|
||||
bin->header_info[bin->all_bin_parse_num].check_sum =
|
||||
GET_32_DATA(*(bin->p_addr + 3), *(bin->p_addr + 2),
|
||||
*(bin->p_addr + 1), *(bin->p_addr));
|
||||
bin->header_info[bin->all_bin_parse_num].header_ver =
|
||||
GET_32_DATA(*(bin->p_addr + 7), *(bin->p_addr + 6),
|
||||
*(bin->p_addr + 5), *(bin->p_addr + 4));
|
||||
bin->header_info[bin->all_bin_parse_num].bin_data_type =
|
||||
GET_32_DATA(*(bin->p_addr + 11), *(bin->p_addr + 10),
|
||||
*(bin->p_addr + 9), *(bin->p_addr + 8));
|
||||
bin->header_info[bin->all_bin_parse_num].bin_data_ver =
|
||||
GET_32_DATA(*(bin->p_addr + 15), *(bin->p_addr + 14),
|
||||
*(bin->p_addr + 13), *(bin->p_addr + 12));
|
||||
bin->header_info[bin->all_bin_parse_num].bin_data_len =
|
||||
GET_32_DATA(*(bin->p_addr + 19), *(bin->p_addr + 18),
|
||||
*(bin->p_addr + 17), *(bin->p_addr + 16));
|
||||
bin->header_info[bin->all_bin_parse_num].ui_ver =
|
||||
GET_32_DATA(*(bin->p_addr + 23), *(bin->p_addr + 22),
|
||||
*(bin->p_addr + 21), *(bin->p_addr + 20));
|
||||
bin->header_info[bin->all_bin_parse_num].reg_byte_len =
|
||||
GET_32_DATA(*(bin->p_addr + 35), *(bin->p_addr + 34),
|
||||
*(bin->p_addr + 33), *(bin->p_addr + 32));
|
||||
bin->header_info[bin->all_bin_parse_num].data_byte_len =
|
||||
GET_32_DATA(*(bin->p_addr + 39), *(bin->p_addr + 38),
|
||||
*(bin->p_addr + 37), *(bin->p_addr + 36));
|
||||
bin->header_info[bin->all_bin_parse_num].device_addr =
|
||||
GET_32_DATA(*(bin->p_addr + 43), *(bin->p_addr + 42),
|
||||
*(bin->p_addr + 41), *(bin->p_addr + 40));
|
||||
for (i = 0; i < 8; i++) {
|
||||
bin->header_info[bin->all_bin_parse_num].chip_type[i] =
|
||||
*(bin->p_addr + 24 + i);
|
||||
}
|
||||
bin->header_info[bin->all_bin_parse_num].reg_num = 0x00000000;
|
||||
bin->header_info[bin->all_bin_parse_num].reg_data_byte_len = 0x00000000;
|
||||
bin->header_info[bin->all_bin_parse_num].download_addr = 0x00000000;
|
||||
bin->header_info[bin->all_bin_parse_num].app_version = 0x00000000;
|
||||
bin->header_info[bin->all_bin_parse_num].valid_data_len = 0x00000000;
|
||||
bin->all_bin_parse_num += 1;
|
||||
}
|
||||
|
||||
int aw_parse_each_of_multi_bins_1_0_0(unsigned int bin_num, int bin_serial_num,
|
||||
struct aw_bin *bin)
|
||||
{
|
||||
int ret = 0;
|
||||
unsigned int bin_start_addr = 0;
|
||||
unsigned int valid_data_len = 0;
|
||||
DBG("aw_bin_parse enter multi bin branch -- %s\n", __func__);
|
||||
if (!bin_serial_num) {
|
||||
bin_start_addr = GET_32_DATA(*(bin->p_addr + 67),
|
||||
*(bin->p_addr + 66),
|
||||
*(bin->p_addr + 65),
|
||||
*(bin->p_addr + 64));
|
||||
bin->p_addr += (60 + bin_start_addr);
|
||||
bin->header_info[bin->all_bin_parse_num].valid_data_addr =
|
||||
bin->header_info[bin->all_bin_parse_num -
|
||||
1].valid_data_addr + 4 + 8 * bin_num + 60;
|
||||
} else {
|
||||
valid_data_len =
|
||||
bin->header_info[bin->all_bin_parse_num - 1].bin_data_len;
|
||||
bin->p_addr += (60 + valid_data_len);
|
||||
bin->header_info[bin->all_bin_parse_num].valid_data_addr =
|
||||
bin->header_info[bin->all_bin_parse_num -
|
||||
1].valid_data_addr +
|
||||
bin->header_info[bin->all_bin_parse_num - 1].bin_data_len +
|
||||
60;
|
||||
}
|
||||
|
||||
ret = aw_parse_bin_header_1_0_0(bin);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Get the number of bins in multi bins, and set a for loop, loop processing each bin data */
|
||||
int aw_get_multi_bin_header_1_0_0(struct aw_bin *bin)
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
unsigned int bin_num = 0;
|
||||
DBG("aw_bin_parse enter multi bin branch -- %s\n", __func__);
|
||||
bin_num = GET_32_DATA(*(bin->p_addr + 63),
|
||||
*(bin->p_addr + 62),
|
||||
*(bin->p_addr + 61), *(bin->p_addr + 60));
|
||||
if (bin->multi_bin_parse_num == 1) {
|
||||
bin->header_info[bin->all_bin_parse_num].valid_data_addr = 60;
|
||||
}
|
||||
aw_get_single_bin_header_1_0_0(bin);
|
||||
|
||||
for (i = 0; i < bin_num; i++) {
|
||||
DBG("aw_bin_parse enter multi bin for is %d\n", i);
|
||||
ret = aw_parse_each_of_multi_bins_1_0_0(bin_num, i, bin);
|
||||
if (ret < 0) {
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/********************************************************
|
||||
*
|
||||
* If the bin framework header version is 1.0.0,
|
||||
determine the data type of bin, and then perform different processing
|
||||
according to the data type
|
||||
If it is a single bin data type, write the data directly into the structure array
|
||||
If it is a multi-bin data type, first obtain the number of bins,
|
||||
and then recursively call the bin frame header processing function
|
||||
according to the bin number to process the frame header information of each bin separately
|
||||
*
|
||||
********************************************************/
|
||||
int aw_parse_bin_header_1_0_0(struct aw_bin *bin)
|
||||
{
|
||||
int ret = 0;
|
||||
unsigned int bin_data_type;
|
||||
DBG("enter %s\n", __func__);
|
||||
bin_data_type = GET_32_DATA(*(bin->p_addr + 11),
|
||||
*(bin->p_addr + 10),
|
||||
*(bin->p_addr + 9), *(bin->p_addr + 8));
|
||||
DBG("aw_bin_parse bin_data_type 0x%x\n", bin_data_type);
|
||||
switch (bin_data_type) {
|
||||
case DATA_TYPE_REGISTER:
|
||||
case DATA_TYPE_DSP_REG:
|
||||
case DATA_TYPE_SOC_APP:
|
||||
/* Divided into two processing methods,
|
||||
one is single bin processing,
|
||||
and the other is single bin processing in multi bin */
|
||||
DBG("aw_bin_parse enter single bin branch\n");
|
||||
bin->single_bin_parse_num += 1;
|
||||
DBG("%s bin->single_bin_parse_num is %d\n", __func__,
|
||||
bin->single_bin_parse_num);
|
||||
if (!bin->multi_bin_parse_num) {
|
||||
bin->header_info[bin->
|
||||
all_bin_parse_num].valid_data_addr =
|
||||
60;
|
||||
}
|
||||
aw_get_single_bin_header_1_0_0(bin);
|
||||
break;
|
||||
case DATA_TYPE_MULTI_BINS:
|
||||
/* Get the number of times to enter multi bins */
|
||||
DBG("aw_bin_parse enter multi bin branch\n");
|
||||
bin->multi_bin_parse_num += 1;
|
||||
DBG("%s bin->multi_bin_parse_num is %d\n", __func__,
|
||||
bin->multi_bin_parse_num);
|
||||
ret = aw_get_multi_bin_header_1_0_0(bin);
|
||||
if (ret < 0) {
|
||||
return ret;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
DBG_ERR("aw_bin_parse Unrecognized this bin data type\n");
|
||||
return -2;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* get the bin's header version */
|
||||
static int aw_check_bin_header_version(struct aw_bin *bin)
|
||||
{
|
||||
int ret = 0;
|
||||
unsigned int header_version = 0;
|
||||
|
||||
header_version = GET_32_DATA(*(bin->p_addr + 7),
|
||||
*(bin->p_addr + 6),
|
||||
*(bin->p_addr + 5), *(bin->p_addr + 4));
|
||||
|
||||
DBG("aw_bin_parse header_version 0x%x\n", header_version);
|
||||
|
||||
/* Write data to the corresponding structure array
|
||||
according to different formats of the bin frame header version */
|
||||
switch (header_version) {
|
||||
case HEADER_VERSION_1_0_0:
|
||||
ret = aw_parse_bin_header_1_0_0(bin);
|
||||
return ret;
|
||||
default:
|
||||
DBG_ERR("aw_bin_parse Unrecognized this bin header version \n");
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
int aw_parsing_bin_file(struct aw_bin *bin)
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
|
||||
DBG("aw_bin_parse code version:%s\n", AWINIC_CODE_VERSION);
|
||||
if (!bin) {
|
||||
DBG_ERR("aw_bin_parse bin is NULL\n");
|
||||
return -8;
|
||||
}
|
||||
bin->p_addr = bin->info.data;
|
||||
bin->all_bin_parse_num = 0;
|
||||
bin->multi_bin_parse_num = 0;
|
||||
bin->single_bin_parse_num = 0;
|
||||
|
||||
/* filling bins header info */
|
||||
ret = aw_check_bin_header_version(bin);
|
||||
if (ret < 0) {
|
||||
DBG_ERR("aw_bin_parse check bin header version error\n");
|
||||
return ret;
|
||||
}
|
||||
bin->p_addr = NULL;
|
||||
|
||||
/* check bin header info */
|
||||
for (i = 0; i < bin->all_bin_parse_num; i++) {
|
||||
/* check sum */
|
||||
ret = aw_check_sum(bin, i);
|
||||
if (ret < 0) {
|
||||
DBG_ERR("aw_bin_parse check sum data error\n");
|
||||
return ret;
|
||||
}
|
||||
/* check bin data version */
|
||||
ret = aw_check_data_version(bin, i);
|
||||
if (ret < 0) {
|
||||
DBG_ERR("aw_bin_parse check data version error\n");
|
||||
return ret;
|
||||
}
|
||||
/* check valid data */
|
||||
if (bin->header_info[i].bin_data_ver == DATA_VERSION_V1) {
|
||||
/* check register num */
|
||||
if (bin->header_info[i].bin_data_type ==
|
||||
DATA_TYPE_REGISTER) {
|
||||
ret = aw_check_register_num_v1(bin, i);
|
||||
if (ret < 0) {
|
||||
DBG_ERR
|
||||
("aw_bin_parse check register num error\n");
|
||||
return ret;
|
||||
}
|
||||
/* check dsp reg num */
|
||||
} else if (bin->header_info[i].bin_data_type ==
|
||||
DATA_TYPE_DSP_REG) {
|
||||
ret = aw_check_dsp_reg_num_v1(bin, i);
|
||||
if (ret < 0) {
|
||||
DBG_ERR
|
||||
("aw_bin_parse check dsp reg num error\n");
|
||||
return ret;
|
||||
}
|
||||
/* check soc app num */
|
||||
} else if (bin->header_info[i].bin_data_type ==
|
||||
DATA_TYPE_SOC_APP) {
|
||||
ret = aw_check_soc_app_num_v1(bin, i);
|
||||
if (ret < 0) {
|
||||
DBG_ERR
|
||||
("aw_bin_parse check soc app num error\n");
|
||||
return ret;
|
||||
}
|
||||
} else {
|
||||
bin->header_info[i].valid_data_len =
|
||||
bin->header_info[i].bin_data_len;
|
||||
}
|
||||
}
|
||||
}
|
||||
DBG("aw_bin_parse parsing success\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,73 @@
|
||||
#ifndef __AW_BIN_PARSE_H__
|
||||
#define __AW_BIN_PARSE_H__
|
||||
|
||||
#define NULL ((void *)0)
|
||||
#define GET_32_DATA(w, x, y, z) ((unsigned int)((((uint32_t)w) << 24) | (((uint32_t)x) << 16) | (((uint32_t)y) << 8) | ((uint32_t)z)))
|
||||
#define BIN_NUM_MAX 100
|
||||
#define HEADER_LEN 60
|
||||
/*********************************************************
|
||||
*
|
||||
* header information
|
||||
*
|
||||
********************************************************/
|
||||
enum bin_header_version_enum {
|
||||
HEADER_VERSION_1_0_0 = 0x01000000,
|
||||
};
|
||||
|
||||
enum data_type_enum {
|
||||
DATA_TYPE_REGISTER = 0x00000000,
|
||||
DATA_TYPE_DSP_REG = 0x00000010,
|
||||
DATA_TYPE_DSP_CFG = 0x00000011,
|
||||
DATA_TYPE_SOC_REG = 0x00000020,
|
||||
DATA_TYPE_SOC_APP = 0x00000021,
|
||||
DATA_TYPE_MULTI_BINS = 0x00002000,
|
||||
};
|
||||
|
||||
enum data_version_enum {
|
||||
DATA_VERSION_V1 = 0X00000001, /*default little edian */
|
||||
DATA_VERSION_MAX,
|
||||
};
|
||||
|
||||
struct bin_header_info {
|
||||
unsigned int header_len; /* Frame header length */
|
||||
unsigned int check_sum; /* Frame header information-Checksum */
|
||||
unsigned int header_ver; /* Frame header information-Frame header version */
|
||||
unsigned int bin_data_type; /* Frame header information-Data type */
|
||||
unsigned int bin_data_ver; /* Frame header information-Data version */
|
||||
unsigned int bin_data_len; /* Frame header information-Data length */
|
||||
unsigned int ui_ver; /* Frame header information-ui version */
|
||||
unsigned char chip_type[8]; /* Frame header information-chip type */
|
||||
unsigned int reg_byte_len; /* Frame header information-reg byte len */
|
||||
unsigned int data_byte_len; /* Frame header information-data byte len */
|
||||
unsigned int device_addr; /* Frame header information-device addr */
|
||||
unsigned int valid_data_len; /* Length of valid data obtained after parsing */
|
||||
unsigned int valid_data_addr; /* The offset address of the valid data obtained after parsing relative to info */
|
||||
|
||||
unsigned int reg_num; /* The number of registers obtained after parsing */
|
||||
unsigned int reg_data_byte_len; /* The byte length of the register obtained after parsing */
|
||||
unsigned int download_addr; /* The starting address or download address obtained after parsing */
|
||||
unsigned int app_version; /* The software version number obtained after parsing */
|
||||
};
|
||||
|
||||
/************************************************************
|
||||
*
|
||||
* function define
|
||||
*
|
||||
************************************************************/
|
||||
struct bin_container {
|
||||
unsigned int len; /* The size of the bin file obtained from the firmware */
|
||||
unsigned char data[]; /* Store the bin file obtained from the firmware */
|
||||
};
|
||||
|
||||
struct aw_bin {
|
||||
unsigned char *p_addr; /* Offset pointer (backward offset pointer to obtain frame header information and important information) */
|
||||
unsigned int all_bin_parse_num; /* The number of all bin files */
|
||||
unsigned int multi_bin_parse_num; /* The number of single bin files */
|
||||
unsigned int single_bin_parse_num; /* The number of multiple bin files */
|
||||
struct bin_header_info header_info[BIN_NUM_MAX]; /* Frame header information and other important data obtained after parsing */
|
||||
struct bin_container info; /* Obtained bin file data that needs to be parsed */
|
||||
};
|
||||
|
||||
int aw_parsing_bin_file(struct aw_bin *bin);
|
||||
int aw_parse_bin_header_1_0_0(struct aw_bin *bin);
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,141 @@
|
||||
#ifndef __AWINIC_CALIBRATION_H__
|
||||
#define __AWINIC_CALIBRATION_H__
|
||||
|
||||
#define AW_CALI_STORE_EXAMPLE
|
||||
|
||||
#define AW_CALI_READ_TIMES (3)
|
||||
#define AW_ERRO_CALI_VALUE (0)
|
||||
#define AW_CALI_RE_DEFAULT_TIMER (3000)
|
||||
|
||||
#define AW_CALI_RE_MAX (15000)
|
||||
#define AW_CALI_RE_MIN (4000)
|
||||
|
||||
#define AW_CALI_CFG_NUM (3)
|
||||
#define AW_CALI_DATA_NUM (6)
|
||||
#define AW_PARAMS_NUM (600)
|
||||
#define AW_KILO_PARAMS_NUM (1000)
|
||||
|
||||
#define AW_CALI_RE_DEFAULT_MAX (50000)
|
||||
#define AW_CALI_RE_DEFAULT_MIN (1000)
|
||||
|
||||
struct aw_device;
|
||||
|
||||
enum afe_module_type {
|
||||
AW_RX_MODULE = 0,
|
||||
AW_TX_MODULE = 1,
|
||||
};
|
||||
|
||||
struct cali_cfg {
|
||||
int32_t data[AW_CALI_CFG_NUM];
|
||||
};
|
||||
|
||||
struct cali_data {
|
||||
int32_t data[AW_CALI_DATA_NUM];
|
||||
};
|
||||
|
||||
struct params_data {
|
||||
int32_t data[AW_PARAMS_NUM];
|
||||
};
|
||||
|
||||
struct ptr_params_data {
|
||||
int len;
|
||||
int32_t *data;
|
||||
};
|
||||
|
||||
struct f0_q_data {
|
||||
int32_t data[4];
|
||||
};
|
||||
|
||||
enum {
|
||||
AW_IOCTL_MSG_IOCTL = 0,
|
||||
AW_IOCTL_MSG_RD_DSP,
|
||||
AW_IOCTL_MSG_WR_DSP
|
||||
};
|
||||
|
||||
#define AW_IOCTL_MSG_VERSION (0)
|
||||
typedef struct {
|
||||
int32_t type;
|
||||
int32_t opcode_id;
|
||||
int32_t version;
|
||||
int32_t data_len;
|
||||
char *data_buf;
|
||||
int32_t reseriver[2];
|
||||
} aw_ioctl_msg_t;
|
||||
|
||||
#define AW_IOCTL_MAGIC 'a'
|
||||
#define AW_IOCTL_SET_CALI_CFG _IOWR(AW_IOCTL_MAGIC, 1, struct cali_cfg)
|
||||
#define AW_IOCTL_GET_CALI_CFG _IOWR(AW_IOCTL_MAGIC, 2, struct cali_cfg)
|
||||
#define AW_IOCTL_GET_CALI_DATA _IOWR(AW_IOCTL_MAGIC, 3, struct cali_data)
|
||||
#define AW_IOCTL_SET_NOISE _IOWR(AW_IOCTL_MAGIC, 4, int32_t)
|
||||
#define AW_IOCTL_GET_F0 _IOWR(AW_IOCTL_MAGIC, 5, int32_t)
|
||||
#define AW_IOCTL_SET_CALI_RE _IOWR(AW_IOCTL_MAGIC, 6, int32_t)
|
||||
#define AW_IOCTL_GET_CALI_RE _IOWR(AW_IOCTL_MAGIC, 7, int32_t)
|
||||
#define AW_IOCTL_SET_VMAX _IOWR(AW_IOCTL_MAGIC, 8, int32_t)
|
||||
#define AW_IOCTL_GET_VMAX _IOWR(AW_IOCTL_MAGIC, 9, int32_t)
|
||||
#define AW_IOCTL_SET_PARAM _IOWR(AW_IOCTL_MAGIC, 10, struct params_data)
|
||||
#define AW_IOCTL_ENABLE_CALI _IOWR(AW_IOCTL_MAGIC, 11, int8_t)
|
||||
#define AW_IOCTL_SET_PTR_PARAM_NUM _IOWR(AW_IOCTL_MAGIC, 12, struct ptr_params_data)
|
||||
#define AW_IOCTL_GET_F0_Q _IOWR(AW_IOCTL_MAGIC, 13, struct f0_q_data)
|
||||
#define AW_IOCTL_SET_DSP_HMUTE _IOWR(AW_IOCTL_MAGIC, 14, int32_t)
|
||||
#define AW_IOCTL_SET_CALI_CFG_FLAG _IOWR(AW_IOCTL_MAGIC, 15, int32_t)
|
||||
#define AW_IOCTL_MSG _IOWR(AW_IOCTL_MAGIC, 16, aw_ioctl_msg_t)
|
||||
|
||||
enum{
|
||||
AW_CALI_MODE_NONE = 0,
|
||||
AW_CALI_MODE_ATTR,
|
||||
AW_CALI_MODE_CLASS,
|
||||
AW_CALI_MODE_MISC,
|
||||
AW_CALI_MODE_MAX
|
||||
};
|
||||
|
||||
enum {
|
||||
AW_CALI_CMD_RE = 0,
|
||||
AW_CALI_CMD_F0,
|
||||
AW_CALI_CMD_RE_F0,
|
||||
AW_CALI_CMD_F0_Q,
|
||||
AW_CALI_CMD_RE_F0_Q,
|
||||
};
|
||||
|
||||
enum {
|
||||
CALI_OPS_HMUTE = 0X0001,
|
||||
CALI_OPS_NOISE = 0X0002,
|
||||
};
|
||||
|
||||
enum {
|
||||
CALI_TYPE_RE = 0,
|
||||
CALI_TYPE_F0,
|
||||
};
|
||||
|
||||
enum {
|
||||
CALI_STR_NONE = 0,
|
||||
CALI_STR_CALI_RE_F0,
|
||||
CALI_STR_CALI_RE,
|
||||
CALI_STR_CALI_F0,
|
||||
CALI_STR_SET_RE,
|
||||
CALI_STR_SHOW_RE, /*show cali_re*/
|
||||
CALI_STR_SHOW_R0, /*show real r0*/
|
||||
CALI_STR_SHOW_CALI_F0, /*GET DEV CALI_F0*/
|
||||
CALI_STR_SHOW_F0, /*SHOW REAL F0*/
|
||||
CALI_STR_SHOW_TE,
|
||||
CALI_STR_SHOW_ST,
|
||||
CALI_STR_DEV_SEL, /*switch device*/
|
||||
CALI_STR_VER,
|
||||
CALI_STR_DEV_NUM,
|
||||
CALI_STR_MAX,
|
||||
};
|
||||
|
||||
struct aw_cali_desc {
|
||||
unsigned char status;
|
||||
unsigned char mode; /*0:NONE 1:ATTR 2:CLASS 3:MISC */
|
||||
int32_t cali_re; /*set cali_re*/
|
||||
int32_t cali_f0; /*store cali_f0*/
|
||||
int32_t cali_q; /*store cali q*/
|
||||
};
|
||||
|
||||
int aw_cali_init(struct aw_cali_desc *cali_desc);
|
||||
void aw_cali_deinit(struct aw_cali_desc *cali_desc);
|
||||
int aw_cali_svc_get_cali_status(void);
|
||||
int aw_cali_read_re_from_nvram(int32_t *cali_re, int32_t ch_index);
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,125 @@
|
||||
#ifndef __AWINIC_DATA_TYPE_H__
|
||||
#define __AWINIC_DATA_TYPE_H__
|
||||
|
||||
#define AW_NAME_BUF_MAX (50)
|
||||
|
||||
struct aw_msg_hdr {
|
||||
int32_t type;
|
||||
int32_t opcode_id;
|
||||
int32_t version;
|
||||
int32_t reseriver[3];
|
||||
};
|
||||
|
||||
|
||||
/******************************************************************
|
||||
* aw profile
|
||||
*******************************************************************/
|
||||
#define PROJECT_NAME_MAX (24)
|
||||
#define CUSTOMER_NAME_MAX (16)
|
||||
#define CFG_VERSION_MAX (4)
|
||||
#define DEV_NAME_MAX (16)
|
||||
|
||||
#define ACF_FILE_ID (0xa15f908)
|
||||
|
||||
|
||||
enum aw_cfg_hdr_version {
|
||||
AW_CFG_HDR_VER_0_0_0_1 = 0x00000001,
|
||||
};
|
||||
|
||||
enum aw_cfg_dde_type {
|
||||
AW_DEV_TYPE_ID = 0x00000000,
|
||||
AW_SKT_TYPE_ID = 0x00000001,
|
||||
AW_DEV_DEFAULT_TYPE_ID = 0x00000002,
|
||||
};
|
||||
|
||||
enum aw_sec_type {
|
||||
ACF_SEC_TYPE_REG = 0,
|
||||
ACF_SEC_TYPE_DSP,
|
||||
ACF_SEC_TYPE_DSP_CFG,
|
||||
ACF_SEC_TYPE_DSP_FW,
|
||||
ACF_SEC_TYPE_HDR_REG,
|
||||
ACF_SEC_TYPE_HDR_DSP_CFG,
|
||||
ACF_SEC_TYPE_HDR_DSP_FW,
|
||||
ACF_SEC_TYPE_MUTLBIN,
|
||||
ACF_SEC_TYPE_SKT_PROJECT,
|
||||
ACF_SEC_TYPE_DSP_PROJECT,
|
||||
ACF_SEC_TYPE_MONITOR,
|
||||
ACF_SEC_TYPE_MAX,
|
||||
};
|
||||
|
||||
enum profile_data_type {
|
||||
AW_PROFILE_DATA_TYPE_REG = 0,
|
||||
AW_PROFILE_DATA_TYPE_DSP,
|
||||
AW_PROFILE_DATA_TYPE_MAX,
|
||||
};
|
||||
|
||||
enum aw_prof_type {
|
||||
AW_PROFILE_MUSIC = 0,
|
||||
AW_PROFILE_VOICE,
|
||||
AW_PROFILE_VOIP,
|
||||
AW_PROFILE_RINGTONE,
|
||||
AW_PROFILE_RINGTONE_HS,
|
||||
AW_PROFILE_LOWPOWER,
|
||||
AW_PROFILE_BYPASS,
|
||||
AW_PROFILE_MMI,
|
||||
AW_PROFILE_FM,
|
||||
AW_PROFILE_NOTIFICATION,
|
||||
AW_PROFILE_RECEIVER,
|
||||
AW_PROFILE_MAX,
|
||||
};
|
||||
|
||||
enum aw_profile_status {
|
||||
AW_PROFILE_WAIT = 0,
|
||||
AW_PROFILE_OK,
|
||||
};
|
||||
|
||||
struct aw_cfg_hdr {
|
||||
uint32_t a_id; /*acf file ID 0xa15f908*/
|
||||
char a_project[PROJECT_NAME_MAX]; /*project name*/
|
||||
char a_custom[CUSTOMER_NAME_MAX]; /*custom name :huawei xiaomi vivo oppo*/
|
||||
char a_version[CFG_VERSION_MAX]; /*author update version*/
|
||||
uint32_t a_author_id; /*author id*/
|
||||
uint32_t a_ddt_size; /*sub section table entry size*/
|
||||
uint32_t a_ddt_num; /*sub section table entry num*/
|
||||
uint32_t a_hdr_offset; /*sub section table offset in file*/
|
||||
uint32_t a_hdr_version; /*sub section table version*/
|
||||
uint32_t reserve[3];
|
||||
};
|
||||
|
||||
struct aw_cfg_dde {
|
||||
uint32_t type; /*DDE type id*/
|
||||
char dev_name[DEV_NAME_MAX];
|
||||
uint16_t dev_index; /*dev id*/
|
||||
uint16_t dev_bus; /*dev bus id*/
|
||||
uint16_t dev_addr; /*dev addr id*/
|
||||
uint16_t dev_profile; /*dev profile id*/
|
||||
uint32_t data_type; /*data type id*/
|
||||
uint32_t data_size;
|
||||
uint32_t data_offset;
|
||||
uint32_t data_crc;
|
||||
uint32_t reserve[5];
|
||||
};
|
||||
|
||||
struct aw_sec_data_desc {
|
||||
uint32_t len;
|
||||
unsigned char *data;
|
||||
};
|
||||
|
||||
struct aw_prof_desc {
|
||||
uint32_t id;
|
||||
uint32_t prof_st;
|
||||
struct aw_sec_data_desc sec_desc[AW_PROFILE_DATA_TYPE_MAX];
|
||||
};
|
||||
|
||||
struct aw_all_prof_info {
|
||||
struct aw_prof_desc prof_desc[AW_PROFILE_MAX];
|
||||
};
|
||||
|
||||
struct aw_prof_info {
|
||||
int count;
|
||||
struct aw_prof_desc *prof_desc;
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,292 @@
|
||||
#ifndef __AWINIC_DEVICE_FILE_H__
|
||||
#define __AWINIC_DEVICE_FILE_H__
|
||||
#include "aw_data_type.h"
|
||||
#include "aw_calib.h"
|
||||
#include "aw_monitor.h"
|
||||
|
||||
|
||||
#define AW_VOLUME_STEP_DB (6 * 2)
|
||||
#define AW_REG_NONE (0xFF)
|
||||
#define AW_NAME_MAX (50)
|
||||
#define ALGO_VERSION_MAX (80)
|
||||
#define AW_ALGO_PATH_MAX (256)
|
||||
|
||||
|
||||
enum {
|
||||
AW_1000_US = 1000,
|
||||
AW_2000_US = 2000,
|
||||
AW_3000_US = 3000,
|
||||
AW_4000_US = 4000,
|
||||
AW_5000_US = 5000,
|
||||
AW_10000_US = 10000,
|
||||
};
|
||||
|
||||
struct aw_device;
|
||||
|
||||
enum {
|
||||
AW_DEV_TYPE_OK = 0,
|
||||
AW_DEV_TYPE_NONE = 1,
|
||||
};
|
||||
|
||||
enum {
|
||||
AW_DEV_CH_PRI_L = 0,
|
||||
AW_DEV_CH_PRI_R = 1,
|
||||
AW_DEV_CH_SEC_L = 2,
|
||||
AW_DEV_CH_SEC_R = 3,
|
||||
AW_DEV_CH_MAX,
|
||||
};
|
||||
|
||||
enum AW_DEV_INIT {
|
||||
AW_DEV_INIT_ST = 0,
|
||||
AW_DEV_INIT_OK = 1,
|
||||
AW_DEV_INIT_NG = 2,
|
||||
};
|
||||
|
||||
enum AW_DEV_STATUS {
|
||||
AW_DEV_PW_OFF = 0,
|
||||
AW_DEV_PW_ON,
|
||||
};
|
||||
|
||||
enum AW_DEV_FW_STATUS {
|
||||
AW_DEV_FW_FAILED = 0,
|
||||
AW_DEV_FW_OK,
|
||||
};
|
||||
|
||||
struct aw_device_ops {
|
||||
int (*aw_i2c_write)(struct aw_device *aw_dev, unsigned char reg_addr, unsigned int reg_data);
|
||||
int (*aw_i2c_read)(struct aw_device *aw_dev, unsigned char reg_addr, unsigned int *reg_data);
|
||||
int (*aw_i2c_write_bits)(struct aw_device *aw_dev, unsigned char reg_addr, unsigned int mask, unsigned int reg_data);
|
||||
int (*aw_set_volume)(struct aw_device *aw_dev, unsigned int value);
|
||||
int (*aw_get_volume)(struct aw_device *aw_dev, unsigned int *value);
|
||||
unsigned int (*aw_reg_val_to_db)(unsigned int value);
|
||||
void (*aw_i2s_enable)(struct aw_device *aw_dev, bool flag);
|
||||
bool (*aw_check_wr_access)(int reg);
|
||||
bool (*aw_check_rd_access)(int reg);
|
||||
int (*aw_get_reg_num)(void);
|
||||
int (*aw_get_version)(char *buf, int size);
|
||||
int (*aw_get_dev_num)(void);
|
||||
void (*aw_set_algo)(struct aw_device *aw_dev);
|
||||
unsigned int (*aw_get_irq_type)(struct aw_device *aw_dev, unsigned int value);
|
||||
void (*aw_reg_force_set)(struct aw_device *aw_dev);
|
||||
};
|
||||
|
||||
struct aw_int_desc {
|
||||
unsigned int mask_reg; /*interrupt mask reg*/
|
||||
unsigned int st_reg; /*interrupt status reg*/
|
||||
unsigned int mask_default; /*default mask close all*/
|
||||
unsigned int int_mask; /*set mask*/
|
||||
};
|
||||
|
||||
struct aw_soft_rst {
|
||||
int reg;
|
||||
int reg_value;
|
||||
};
|
||||
|
||||
struct aw_pwd_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int enable;
|
||||
unsigned int disable;
|
||||
};
|
||||
|
||||
struct aw_amppd_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int enable;
|
||||
unsigned int disable;
|
||||
};
|
||||
|
||||
struct aw_bop_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int enable;
|
||||
unsigned int disbale;
|
||||
};
|
||||
|
||||
struct aw_vcalb_desc {
|
||||
unsigned int icalk_reg;
|
||||
unsigned int icalk_reg_mask;
|
||||
unsigned int icalk_shift;
|
||||
unsigned int icalkl_reg;
|
||||
unsigned int icalkl_reg_mask;
|
||||
unsigned int icalkl_shift;
|
||||
unsigned int icalk_sign_mask;
|
||||
unsigned int icalk_neg_mask;
|
||||
int icalk_value_factor;
|
||||
|
||||
unsigned int vcalk_reg;
|
||||
unsigned int vcalk_reg_mask;
|
||||
unsigned int vcalk_shift;
|
||||
unsigned int vcalkl_reg;
|
||||
unsigned int vcalkl_reg_mask;
|
||||
unsigned int vcalkl_shift;
|
||||
unsigned int vcalk_sign_mask;
|
||||
unsigned int vcalk_neg_mask;
|
||||
int vcalk_value_factor;
|
||||
|
||||
unsigned int vcalb_reg;
|
||||
int cabl_base_value;
|
||||
int vcal_factor;
|
||||
};
|
||||
|
||||
struct aw_mute_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int enable;
|
||||
unsigned int disable;
|
||||
};
|
||||
|
||||
struct aw_sysst_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int st_check;
|
||||
unsigned int pll_check;
|
||||
};
|
||||
|
||||
struct aw_profctrl_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int spk_mode;
|
||||
unsigned int cfg_prof_mode;
|
||||
};
|
||||
|
||||
struct aw_bstctrl_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int frc_bst;
|
||||
unsigned int tsp_type;
|
||||
unsigned int cfg_bst_type;
|
||||
};
|
||||
|
||||
struct aw_cco_mux_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int divided_val;
|
||||
unsigned int bypass_val;
|
||||
};
|
||||
|
||||
struct aw_volume_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
unsigned int shift;
|
||||
int init_volume;
|
||||
int mute_volume;
|
||||
};
|
||||
|
||||
struct aw_voltage_desc {
|
||||
unsigned int reg;
|
||||
unsigned int vbat_range;
|
||||
unsigned int int_bit;
|
||||
};
|
||||
|
||||
struct aw_temperature_desc {
|
||||
unsigned int reg;
|
||||
unsigned int sign_mask;
|
||||
unsigned int neg_mask;
|
||||
};
|
||||
|
||||
struct aw_ipeak_desc {
|
||||
unsigned int reg;
|
||||
unsigned int mask;
|
||||
};
|
||||
|
||||
struct aw_container {
|
||||
int len;
|
||||
uint8_t data[];
|
||||
};
|
||||
|
||||
struct aw_device {
|
||||
int index;
|
||||
int status;
|
||||
int bstcfg_enable;
|
||||
int frcset_en;
|
||||
int bop_en;
|
||||
unsigned int mute_st;
|
||||
unsigned int amppd_st;
|
||||
|
||||
unsigned char cur_prof; /*current profile index*/
|
||||
unsigned char set_prof; /*set profile index*/
|
||||
unsigned int channel; /*pa channel select*/
|
||||
unsigned int vol_step;
|
||||
unsigned int re_max;
|
||||
unsigned int re_min;
|
||||
|
||||
struct device *dev;
|
||||
struct i2c_client *i2c;
|
||||
char acf_name[AW_NAME_MAX];
|
||||
char monitor_name[AW_NAME_MAX];
|
||||
void *private_data;
|
||||
char algo_path[AW_ALGO_PATH_MAX];
|
||||
|
||||
struct aw_int_desc int_desc;
|
||||
struct aw_pwd_desc pwd_desc;
|
||||
struct aw_amppd_desc amppd_desc;
|
||||
struct aw_mute_desc mute_desc;
|
||||
struct aw_vcalb_desc vcalb_desc;
|
||||
struct aw_sysst_desc sysst_desc;
|
||||
struct aw_profctrl_desc profctrl_desc;
|
||||
struct aw_bstctrl_desc bstctrl_desc;
|
||||
struct aw_cco_mux_desc cco_mux_desc;
|
||||
struct aw_voltage_desc voltage_desc;
|
||||
struct aw_temperature_desc temp_desc;
|
||||
struct aw_ipeak_desc ipeak_desc;
|
||||
struct aw_volume_desc volume_desc;
|
||||
struct aw_prof_info prof_info;
|
||||
struct aw_cali_desc cali_desc;
|
||||
struct aw_monitor_desc monitor_desc;
|
||||
struct aw_soft_rst soft_rst;
|
||||
struct aw_bop_desc bop_desc;
|
||||
struct aw_device_ops ops;
|
||||
struct list_head list_node;
|
||||
};
|
||||
|
||||
|
||||
int aw_dev_load_acf_check(struct aw_container *aw_cfg);
|
||||
void aw_dev_deinit(struct aw_device *aw_dev);
|
||||
int aw_device_init(struct aw_device *aw_dev, struct aw_container *aw_cfg);
|
||||
int aw_device_start(struct aw_device *aw_dev);
|
||||
int aw_device_stop(struct aw_device *aw_dev);
|
||||
int aw_dev_reg_update(struct aw_device *aw_dev, bool force);
|
||||
int aw_device_irq_reinit(struct aw_device *aw_dev);
|
||||
|
||||
/*profile*/
|
||||
int aw_dev_prof_update(struct aw_device *aw_dev, bool force);
|
||||
int aw_dev_get_profile_count(struct aw_device *aw_dev);
|
||||
int aw_dev_get_profile_name(struct aw_device *aw_dev, char *name, int index);
|
||||
int aw_dev_check_profile_index(struct aw_device *aw_dev, int index);
|
||||
int aw_dev_get_profile_index(struct aw_device *aw_dev);
|
||||
int aw_dev_set_profile_index(struct aw_device *aw_dev, int index);
|
||||
|
||||
/*re*/
|
||||
int aw_dev_get_cali_re(struct aw_device *aw_dev, int32_t *cali_re);
|
||||
int aw_dev_init_cali_re(struct aw_device *aw_dev);
|
||||
int aw_dev_dc_status(struct aw_device *aw_dev);
|
||||
|
||||
/*interrupt*/
|
||||
int aw_dev_status(struct aw_device *aw_dev);
|
||||
int aw_dev_get_int_status(struct aw_device *aw_dev, uint16_t *int_status);
|
||||
void aw_dev_clear_int_status(struct aw_device *aw_dev);
|
||||
int aw_dev_set_intmask(struct aw_device *aw_dev, bool flag);
|
||||
|
||||
/*fade int / out*/
|
||||
void aw_dev_set_fade_vol_step(struct aw_device *aw_dev, unsigned int step);
|
||||
int aw_dev_get_fade_vol_step(struct aw_device *aw_dev);
|
||||
void aw_dev_get_fade_time(unsigned int *time, bool fade_in);
|
||||
void aw_dev_set_fade_time(unsigned int time, bool fade_in);
|
||||
|
||||
/*dsp kcontrol*/
|
||||
int aw_dev_set_afe_module_en(int type, int enable);
|
||||
int aw_dev_get_afe_module_en(int type, int *status);
|
||||
int aw_dev_set_copp_module_en(bool enable);
|
||||
int aw_dev_set_spin(int spin_mode);
|
||||
int aw_dev_get_spin(int *spin_mode);
|
||||
int aw_dev_set_algo_prof(struct aw_device *aw_dev, int prof_id);
|
||||
int aw_dev_get_algo_prof(struct aw_device *aw_dev, int *prof_id);
|
||||
int aw_dev_set_algo_params_path(struct aw_device *aw_dev);
|
||||
|
||||
int aw_device_probe(struct aw_device *aw_dev);
|
||||
int aw_device_remove(struct aw_device *aw_dev);
|
||||
int aw_dev_get_list_head(struct list_head **head);
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,66 @@
|
||||
#ifndef __AWINIC_DSP_H__
|
||||
#define __AWINIC_DSP_H__
|
||||
|
||||
#define AW_QCOM_PLATFORM
|
||||
|
||||
/*factor form 12bit(4096) to 1000*/
|
||||
#define AW_DSP_RE_TO_SHOW_RE(re) (((re) * (1000)) >> (12))
|
||||
#define AW_SHOW_RE_TO_DSP_RE(re) (((re) << 12) / (1000))
|
||||
|
||||
#define AW_DSP_TRY_TIME (3)
|
||||
#define AW_DSP_SLEEP_TIME (10)
|
||||
|
||||
#define AW_TX_DEFAULT_TOPO_ID (0x1000FF00)
|
||||
#define AW_RX_DEFAULT_TOPO_ID (0x1000FF01)
|
||||
#define AW_TX_DEFAULT_PORT_ID (0x1007)
|
||||
#define AW_RX_DEFAULT_PORT_ID (0x1006)
|
||||
|
||||
enum aw_dsp_msg_type {
|
||||
AW_DSP_MSG_TYPE_DATA = 0,
|
||||
AW_DSP_MSG_TYPE_CMD = 1,
|
||||
};
|
||||
|
||||
enum {
|
||||
AW_SPIN_0 = 0,
|
||||
AW_SPIN_90,
|
||||
AW_SPIN_180,
|
||||
AW_SPIN_270,
|
||||
AW_SPIN_MAX,
|
||||
};
|
||||
|
||||
#define AW_DSP_MSG_HDR_VER (1)
|
||||
typedef struct aw_msg_hdr aw_dsp_msg_t;
|
||||
|
||||
int aw_dsp_write_msg(struct aw_device *aw_dev, uint32_t msg_id, char *data_ptr, unsigned int data_size);
|
||||
int aw_dsp_read_msg(struct aw_device *aw_dev, uint32_t msg_id, char *data_ptr, unsigned int data_size);
|
||||
int aw_dsp_write_cali_cfg(struct aw_device *aw_dev, char *data, unsigned int data_len);
|
||||
int aw_dsp_read_cali_cfg(struct aw_device *aw_dev, char *data, unsigned int data_len);
|
||||
int aw_dsp_noise_en(struct aw_device *aw_dev, bool is_noise);
|
||||
int aw_dsp_write_vmax(struct aw_device *aw_dev, char *data, unsigned int data_len);
|
||||
int aw_dsp_read_vmax(struct aw_device *aw_dev, char *data, unsigned int data_len);
|
||||
int aw_dsp_write_params(struct aw_device *aw_dev, char *data, unsigned int data_len);
|
||||
int aw_dsp_write_cali_re(struct aw_device *aw_dev, int32_t cali_re);
|
||||
int aw_dsp_read_cali_re(struct aw_device *aw_dev, int32_t *cali_re);
|
||||
int aw_dsp_read_r0(struct aw_device *aw_dev, int32_t *r0);
|
||||
int aw_dsp_read_st(struct aw_device *aw_dev, int32_t *r0, int32_t *te);
|
||||
int aw_dsp_read_te(struct aw_device *aw_dev, int32_t *te);
|
||||
int aw_dsp_get_dc_status(struct aw_device *aw_dev);
|
||||
int aw_dsp_hmute_en(struct aw_device *aw_dev, bool is_hmute);
|
||||
int aw_dsp_cali_en(struct aw_device *aw_dev, bool is_enable);
|
||||
int aw_dsp_read_f0(struct aw_device *aw_dev, int32_t *f0);
|
||||
int aw_dsp_read_f0_q(struct aw_device *aw_dev, int32_t *f0, int32_t *q);
|
||||
int aw_dsp_read_cali_data(struct aw_device *aw_dev, char *data, unsigned int data_len);
|
||||
int aw_dsp_set_afe_module_en(int type, int enable);
|
||||
int aw_dsp_get_afe_module_en(int type, int *status);
|
||||
int aw_dsp_set_copp_module_en(bool enable);
|
||||
int aw_dsp_write_spin(int spin_mode);
|
||||
int aw_dsp_read_spin(int *spin_mode);
|
||||
int aw_get_algo_version(struct aw_device *aw_dev, char *algo_ver_buf);
|
||||
int aw_dsp_set_algo_prof(struct aw_device *aw_dev, int prof_id);
|
||||
int aw_dsp_get_algo_prof(struct aw_device *aw_dev, int *prof_id);
|
||||
int aw_dsp_set_algo_params_path(struct aw_device *aw_dev);
|
||||
void aw_device_parse_topo_id_dt(struct aw_device *aw_dev);
|
||||
void aw_device_parse_port_id_dt(struct aw_device *aw_dev);
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,34 @@
|
||||
#ifndef __AWINIC_LOG_H__
|
||||
#define __AWINIC_LOG_H__
|
||||
|
||||
/********************************************
|
||||
* print information control
|
||||
*******************************************/
|
||||
#define aw_dev_err(dev, format, ...) \
|
||||
do { \
|
||||
pr_err("[Awinic][%s]%s: " format "\n", dev_name(dev), __func__, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
#define aw_dev_info(dev, format, ...) \
|
||||
do { \
|
||||
pr_info("[Awinic][%s]%s: " format "\n", dev_name(dev), __func__, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
#define aw_dev_dbg(dev, format, ...) \
|
||||
do { \
|
||||
pr_debug("[Awinic][%s]%s: " format "\n", dev_name(dev), __func__, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#define aw_pr_err(format, ...) \
|
||||
do { \
|
||||
pr_err("[Awinic]%s: " format "\n", __func__, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
#define aw_pr_info(format, ...) \
|
||||
do { \
|
||||
pr_info("[Awinic]%s: " format "\n", __func__, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
#define aw_pr_dbg(format, ...) \
|
||||
do { \
|
||||
pr_debug("[Awinic]%s: " format "\n", __func__, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,173 @@
|
||||
#ifndef __AW_MONITOR_H__
|
||||
#define __AW_MONITOR_H__
|
||||
|
||||
/*#define AW_DEBUG*/
|
||||
|
||||
struct aw_table;
|
||||
|
||||
#define AW_TABLE_SIZE sizeof(struct aw_table)
|
||||
#define AW_MONITOR_DEFAULT_FLAG (0)
|
||||
|
||||
#define IPEAK_NONE (0xFF)
|
||||
#define GAIN_NONE (0xFF)
|
||||
#define VMAX_NONE (0xFFFFFFFF)
|
||||
|
||||
|
||||
#define AW_GET_32_DATA(w, x, y, z) \
|
||||
((uint32_t)((((uint8_t)w) << 24) | (((uint8_t)x) << 16) | (((uint8_t)y) << 8) | ((uint8_t)z)))
|
||||
#define AW_GET_16_DATA(x, y) \
|
||||
((uint16_t)((((uint8_t)x) << 8) | (uint8_t)y))
|
||||
|
||||
enum {
|
||||
AW_MON_LOGIC_OR = 0,
|
||||
AW_MON_LOGIC_AND = 1,
|
||||
};
|
||||
|
||||
enum {
|
||||
AW_FIRST_ENTRY = 0,
|
||||
AW_NOT_FIRST_ENTRY = 1,
|
||||
};
|
||||
|
||||
enum aw_monitor_hdr_ver {
|
||||
AW_MONITOR_HDR_VER_0_1_0 = 0x00010000,
|
||||
AW_MONITOR_HDR_VER_0_1_1 = 0x00010100,
|
||||
};
|
||||
|
||||
enum aw_monitor_init {
|
||||
AW_MON_CFG_ST = 0,
|
||||
AW_MON_CFG_OK = 1,
|
||||
};
|
||||
|
||||
struct aw_monitor_hdr {
|
||||
uint32_t check_sum;
|
||||
uint32_t monitor_ver;
|
||||
char chip_type[8];
|
||||
uint32_t ui_ver;
|
||||
uint32_t monitor_switch;
|
||||
uint32_t monitor_time;
|
||||
uint32_t monitor_count;
|
||||
uint32_t ipeak_switch;
|
||||
uint32_t gain_switch;
|
||||
uint32_t vmax_switch;
|
||||
uint32_t temp_switch;
|
||||
uint32_t temp_aplha;
|
||||
uint32_t temp_num;
|
||||
uint32_t single_temp_size;
|
||||
uint32_t temp_offset;
|
||||
uint32_t vol_switch;
|
||||
uint32_t vol_aplha;
|
||||
uint32_t vol_num;
|
||||
uint32_t single_vol_size;
|
||||
uint32_t vol_offset;
|
||||
};
|
||||
|
||||
#define MONITOR_EN_MASK (0x01)
|
||||
|
||||
enum {
|
||||
MONITOR_EN_BIT = 0,
|
||||
MONITOR_LOGIC_BIT = 1,
|
||||
MONITOR_IPEAK_EN_BIT = 2,
|
||||
MONITOR_GAIN_EN_BIT = 3,
|
||||
MONITOR_VMAX_EN_BIT = 4,
|
||||
MONITOR_TEMP_EN_BIT = 5,
|
||||
MONITOR_VOL_EN_BIT = 6,
|
||||
};
|
||||
|
||||
struct aw_monitor_hdr_v_0_1_1 {
|
||||
uint32_t check_sum;
|
||||
uint32_t monitor_ver;
|
||||
char chip_type[16];
|
||||
uint32_t ui_ver;
|
||||
uint32_t monitor_time;
|
||||
uint32_t monitor_count;
|
||||
uint32_t enable_flag;
|
||||
/* [bit 31:7] */
|
||||
/* [bit 6: vol en] */
|
||||
/* [bit 5: temp en] */
|
||||
/* [bit 4: vmax en] */
|
||||
/* [bit 3: gain en] */
|
||||
/* [bit 2: ipeak en] */
|
||||
/* [bit 1: & or | flag] */
|
||||
/* [bit 0: monitor en] */
|
||||
uint32_t temp_aplha;
|
||||
uint32_t temp_num;
|
||||
uint32_t single_temp_size;
|
||||
uint32_t temp_offset;
|
||||
uint32_t vol_aplha;
|
||||
uint32_t vol_num;
|
||||
uint32_t single_vol_size;
|
||||
uint32_t vol_offset;
|
||||
uint32_t reserver[3];
|
||||
};
|
||||
|
||||
|
||||
struct aw_table {
|
||||
int16_t min_val;
|
||||
int16_t max_val;
|
||||
uint16_t ipeak;
|
||||
uint16_t gain;
|
||||
uint32_t vmax;
|
||||
};
|
||||
|
||||
struct aw_table_info {
|
||||
uint8_t table_num;
|
||||
struct aw_table *aw_table;
|
||||
};
|
||||
|
||||
struct aw_monitor_cfg {
|
||||
uint8_t monitor_status;
|
||||
uint32_t monitor_switch;
|
||||
uint32_t monitor_time;
|
||||
uint32_t monitor_count;
|
||||
uint32_t logic_switch;
|
||||
uint32_t temp_switch;
|
||||
uint32_t temp_aplha;
|
||||
uint32_t vol_switch;
|
||||
uint32_t vol_aplha;
|
||||
uint32_t ipeak_switch;
|
||||
uint32_t gain_switch;
|
||||
uint32_t vmax_switch;
|
||||
struct aw_table_info temp_info;
|
||||
struct aw_table_info vol_info;
|
||||
};
|
||||
|
||||
struct aw_monitor_trace {
|
||||
int32_t pre_val;
|
||||
int32_t sum_val;
|
||||
struct aw_table aw_table;
|
||||
};
|
||||
|
||||
|
||||
/******************************************************************
|
||||
* struct aw882xx monitor
|
||||
*******************************************************************/
|
||||
struct aw_monitor_desc {
|
||||
struct delayed_work delay_work;
|
||||
struct aw_monitor_cfg monitor_cfg;
|
||||
|
||||
uint8_t first_entry;
|
||||
uint8_t samp_count;
|
||||
uint8_t db_offset;
|
||||
|
||||
uint32_t pre_vmax;
|
||||
struct aw_monitor_trace temp_trace;
|
||||
struct aw_monitor_trace vol_trace;
|
||||
|
||||
#ifdef AW_DEBUG
|
||||
uint16_t test_vol;
|
||||
int16_t test_temp;
|
||||
#endif
|
||||
};
|
||||
|
||||
/******************************************************************
|
||||
* aw882xx monitor functions
|
||||
*******************************************************************/
|
||||
void aw_monitor_start(struct aw_monitor_desc *monitor_desc);
|
||||
int aw_monitor_stop(struct aw_monitor_desc *monitor_desc);
|
||||
void aw_monitor_init(struct aw_monitor_desc *monitor_desc);
|
||||
void aw_monitor_deinit(struct aw_monitor_desc *monitor_desc);
|
||||
int aw_monitor_parse_fw(struct aw_monitor_desc *monitor_desc,
|
||||
uint8_t *data, uint32_t data_len);
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
Reference in new issue
Block a user