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ARM: dts: qcom: Update iommu-fault property values

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Switch clients to use the updated value.

Change-Id: I72374b107d5dd47f250e9d12abed2bdfd988d4b7
This commit is contained in:
Patrick Daly committed 2020-03-30 14:32:45 -07:00
1 parent b4253f9795
commit 7adb849cd6
6 files changed
+62 -60
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bindings/iommu/arm,smmu.txt
+3 -1
View File
@@ -230,7 +230,9 @@ conditions.
--- "stall-disable":
Iommu faults do not stall the client while the fault
interrupt is being handled.
--- "HUPCF":
Iommu may process other transactions while a fault is
in the process of being handled.
- qcom,iommu-vmid:
Optional, Int.
An identifier indicating the security state of the client.
qcom/bengal.dtsi
+13 -13
View File
@@ -1825,7 +1825,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x0C01 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb2 {
@@ -1833,7 +1833,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x0C02 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb3 {
@@ -1841,7 +1841,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x0C03 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb4 {
@@ -1849,7 +1849,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x0C04 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb5 {
@@ -1857,7 +1857,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x0C05 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb6 {
@@ -1865,7 +1865,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x0C06 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb9 {
@@ -1874,7 +1874,7 @@
qcom,secure-context-bank;
iommus = <&apps_smmu 0x0C09 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb10 {
@@ -1882,7 +1882,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C3 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb11 {
@@ -1890,7 +1890,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C4 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb12 {
@@ -1898,7 +1898,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C5 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb13 {
@@ -1906,7 +1906,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C6 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb14 {
@@ -1914,7 +1914,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C7 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
};
@@ -2296,7 +2296,7 @@
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-geometry = <0xa0000000 0x10010000>;
vdd-cx-mx-supply = <&L8A>;
vdd-1.8-xo-supply = <&L16A>;
qcom/kona.dtsi
+16 -16
View File
@@ -3992,7 +3992,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1001 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4001,7 +4001,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1002 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4010,7 +4010,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1003 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4019,7 +4019,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1004 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4028,7 +4028,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1005 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4037,7 +4037,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1006 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4046,7 +4046,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1007 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4055,7 +4055,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1008 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4065,7 +4065,7 @@
qcom,secure-context-bank;
iommus = <&apps_smmu 0x1009 0x0460>;
qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
dma-coherent;
};
@@ -4075,7 +4075,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1803 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4084,7 +4084,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1804 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4093,7 +4093,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1805 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4102,7 +4102,7 @@
label = "sdsprpc-smd";
iommus = <&apps_smmu 0x0541 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4111,7 +4111,7 @@
label = "sdsprpc-smd";
iommus = <&apps_smmu 0x0542 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -4120,7 +4120,7 @@
label = "sdsprpc-smd";
iommus = <&apps_smmu 0x0543 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
shared-cb = <4>;
dma-coherent;
};
@@ -5004,7 +5004,7 @@
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-dma = "fastmap";
qcom,iommu-pagetable = "coherent";
qcom,iommu-faults = "stall-disable", "no-CFRE",
qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
"non-fatal";
};
};
qcom/lagoon.dtsi
+12 -12
View File
@@ -1873,7 +1873,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1401 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1882,7 +1882,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1402 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1891,7 +1891,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1403 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1900,7 +1900,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1404 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1909,7 +1909,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1405 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1918,7 +1918,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1406 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1927,7 +1927,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1407 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1936,7 +1936,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1408 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1946,7 +1946,7 @@
qcom,secure-context-bank;
iommus = <&apps_smmu 0x1409 0x0020>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>;
dma-coherent;
};
@@ -1956,7 +1956,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1003 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1965,7 +1965,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1004 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -1975,7 +1975,7 @@
iommus = <&apps_smmu 0x1005 0x0>;
shared-cb = <5>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
};
qcom/lito.dtsi
+13 -13
View File
@@ -3005,7 +3005,7 @@
iommus = <&apps_smmu 0x1801 0x0440>,
<&apps_smmu 0x1821 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3015,7 +3015,7 @@
iommus = <&apps_smmu 0x1802 0x0440>,
<&apps_smmu 0x1822 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3025,7 +3025,7 @@
iommus = <&apps_smmu 0x1803 0x0440>,
<&apps_smmu 0x1823 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3035,7 +3035,7 @@
iommus = <&apps_smmu 0x1804 0x0440>,
<&apps_smmu 0x1824 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3045,7 +3045,7 @@
iommus = <&apps_smmu 0x1805 0x0440>,
<&apps_smmu 0x1825 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3054,7 +3054,7 @@
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1806 0x0460>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3064,7 +3064,7 @@
iommus = <&apps_smmu 0x1807 0x0440>,
<&apps_smmu 0x1827 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3074,7 +3074,7 @@
iommus = <&apps_smmu 0x1808 0x0440>,
<&apps_smmu 0x1828 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3084,7 +3084,7 @@
qcom,secure-context-bank;
iommus = <&apps_smmu 0x1809 0x0460>;
qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
dma-coherent;
};
@@ -3094,7 +3094,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1403 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3103,7 +3103,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1404 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -3113,7 +3113,7 @@
iommus = <&apps_smmu 0x1405 0x0>;
shared-cb = <5>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
};
@@ -3730,7 +3730,7 @@
qcom,wlan-msa-fixed-region = <&pil_wlan_fw_mem>;
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "non-fatal";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
vdd-cx-mx-supply = <&L1A>;
vdd-1.8-xo-supply = <&L14A>;
vdd-1.3-rfa-supply = <&L2C>;
qcom/scuba.dtsi
+5 -5
View File
@@ -1255,7 +1255,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C3 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb2 {
@@ -1263,7 +1263,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C4 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb3 {
@@ -1271,7 +1271,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C5 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb4 {
@@ -1279,7 +1279,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C6 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
qcom,msm_fastrpc_compute_cb5 {
@@ -1287,7 +1287,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x01C7 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,iommu-faults = "stall-disable", "HUPCF";
};
};