duff/android_kernel_motorola_sm6225
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disp: msm: increase delay times while waiting to turn off rscc clocks

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RSC is timing out while checking for power control register,
increasing wait times only after a poms, removes this issue.

Change-Id: I4a324eb3c87e7dfb84d9a8b0a11597327d206a74
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
This commit is contained in:
Nilaan Gunabalachandran committed 2020-01-22 13:43:12 -05:00
1 parent 9a6b00d0e7
commit 6fa1cab469
3 files changed
+18 -4
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msm/sde_rsc.c
+6 -1
View File
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*/
#define pr_fmt(fmt) "[sde_rsc:%s:%d]: " fmt, __func__, __LINE__
@@ -531,6 +531,8 @@ vsync_wait:
/* indicate wait for vsync for vid to cmd state switch & cfg update */
if (!rc && (rsc->current_state == SDE_RSC_VID_STATE ||
rsc->current_state == SDE_RSC_CMD_STATE)) {
rsc->post_poms = true;
/* clear VSYNC timestamp for indication when update completes */
if (rsc->hw_ops.hw_vsync)
rsc->hw_ops.hw_vsync(rsc, VSYNC_ENABLE, NULL, 0, 0);
@@ -670,6 +672,8 @@ vsync_wait:
/* indicate wait for vsync for vid to cmd state switch & cfg update */
if (!rc && (rsc->current_state == SDE_RSC_VID_STATE ||
rsc->current_state == SDE_RSC_CMD_STATE)) {
rsc->post_poms = true;
/* clear VSYNC timestamp for indication when update completes */
if (rsc->hw_ops.hw_vsync)
rsc->hw_ops.hw_vsync(rsc, VSYNC_ENABLE, NULL, 0, 0);
@@ -737,6 +741,7 @@ static int sde_rsc_switch_to_idle(struct sde_rsc_priv *rsc,
rc = CLK_MODE_SWITCH_SUCCESS;
} else if (rsc->hw_ops.state_update) {
rc = rsc->hw_ops.state_update(rsc, SDE_RSC_IDLE_STATE);
rsc->post_poms = false;
if (!rc)
rpmh_mode_solver_set(rsc->rpmh_dev, true);
}
msm/sde_rsc_hw_v3.c
+8 -2
View File
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*/
#define pr_fmt(fmt) "[sde_rsc_hw:%s:%d]: " fmt, __func__, __LINE__
@@ -278,7 +278,7 @@ static int sde_rsc_mode2_entry_trigger(struct sde_rsc_priv *rsc)
rc = 0;
break;
}
usleep_range(10, 100);
usleep_range(50, 100);
}
return rc;
@@ -343,6 +343,12 @@ static int sde_rsc_mode2_entry_v3(struct sde_rsc_priv *rsc)
dss_reg_w(&rsc->drv_io, SDE_RSC_SOLVER_SOLVER_MODES_ENABLED_DRV0,
0x7, rsc->debug_mode);
/**
* increase delay time to wait before mode2 entry,
* longer time required subsequent to panel mode change
*/
if (rsc->post_poms)
usleep_range(750, 1000);
for (i = 0; i <= MAX_MODE2_ENTRY_TRY; i++) {
rc = sde_rsc_mode2_entry_trigger(rsc);
if (!rc)
msm/sde_rsc_priv.h
+4 -1
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _SDE_RSC_PRIV_H_
@@ -186,6 +186,7 @@ struct sde_rsc_bw_config {
* bw_config: check sde_rsc_bw_config structure description.
* dev: rsc device node
* resource_refcount: Track rsc resource refcount
* post_poms: bool if a panel mode change occurred
*/
struct sde_rsc_priv {
u32 version;
@@ -227,6 +228,8 @@ struct sde_rsc_priv {
struct sde_rsc_bw_config bw_config;
struct device *dev;
atomic_t resource_refcount;
bool post_poms;
};
/**