dt-bindings: Add documentation for MSM8917/MSM8937

Add documentation for MSM8917/MSM8937 related nodes.

Change-Id: I7bbb6df7653e2ee554089aa216303ebf2371630a
This commit is contained in:
Swetha Chikkaboraiah authored and Gerrit - the friendly Code Review server committed 2021-01-10 05:37:47 -08:00
1 parent 2b65c92e51
commit 349ab7eb5e
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@@ -98,6 +98,39 @@ SoCs:
- BENGALP-IOT
compatible = "qcom,bengalp-iot"
- MSM8917
compatible = "qcom,msm8917"
- MSM8937
compatible = "qcom,msm8937"
- SDM439
compatible = "qcom,sdm439"
- SDA439
compatible = "qcom,sda439"
- SDM429
compatible = "qcom,sdm429"
- SDA429
compatible = "qcom,sda429"
- QM215
compatible = "qcom,qm215"
- QCM2150
compatible = "qcom,qcm2150"
- MSM8953
compatible = "qcom,msm8953"
- SDM450
compatible = "qcom,sdm450"
- SDA450
compatible = "qcom,sda450"
Generic board variants:
- CDP device:
@@ -247,3 +280,35 @@ compatible = "qcom,bengal-iot"
compatible = "qcom,bengalp-iot"
compatible = "qcom,bengal-iot-idp"
compatible = "qcom,bengalp-iot-idp"
compatible = "qcom,msm8917-cdp"
compatible = "qcom,msm8917-mtp"
compatible = "qcom,msm8917-rumi"
compatible = "qcom,msm8917-qrd"
compatible = "qcom,msm8917-qrd-sku5"
compatible = "qcom,msm8937-rumi"
compatible = "qcom,msm8937-cdp"
compatible = "qcom,msm8937-mtp"
compatible = "qcom,msm8937-qrd"
compatible = "qcom,msm8937-pmi8950-qrd-sku1"
compatible = "qcom,msm8937-pmi8937-qrd-sku2"
compatible = "qcom,sdm429-cdp"
compatible = "qcom,sdm429-mtp"
compatible = "qcom,sdm429-qrd"
compatible = "qcom,sda429-cdp"
compatible = "qcom,sda429-mtp"
compatible = "qcom,sdm439-cdp"
compatible = "qcom,sdm439-mtp"
compatible = "qcom,sdm439-qrd"
compatible = "qcom,sda439-cdp"
compatible = "qcom,sda439-mtp"
compatible = "qcom,qm215-qrd"
compatible = "qcom,qcm2150-qrd"
compatible = "qcom,msm8953-rumi"
compatible = "qcom,msm8953-sim"
compatible = "qcom,msm8953-cdp"
compatible = "qcom,msm8953-mtp"
compatible = "qcom,sdm450-mtp"
compatible = "qcom,sdm450-cdp"
compatible = "qcom,sdm450-qrd"
compatible = "qcom,sda450-mtp"
compatible = "qcom,sda450-cdp"
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Qualcomm Technologies, Inc Shared Memory Packet Driver (smdpkt)
[Root level node]
Required properties:
-compatible : should be "qcom,smdpkt"
[Second level nodes]
qcom,smdpkt-port-names
Required properties:
-qcom,smdpkt-remote : the remote subsystem name
-qcom,smdpkt-port-name : the smd channel name
-qcom,smdpkt-dev-name : the smdpkt device name
Example:
qcom,smdpkt {
compatible = "qcom,smdpkt";
qcom,smdpkt-data5-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA5_CNTL";
qcom,smdpkt-dev-name = "smdcntl0";
};
qcom,smdpkt-data6-cntl {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "DATA6_CNTL";
qcom,smdpkt-dev-name = "smdcntl1";
};
qcom,smdpkt-cxm-qmi-port-8064 {
qcom,smdpkt-remote = "wcnss";
qcom,smdpkt-port-name = "CXM_QMI_PORT_8064";
qcom,smdpkt-dev-name = "smd_cxm_qmi";
};
qcom,smdpkt-loopback {
qcom,smdpkt-remote = "modem";
qcom,smdpkt-port-name = "LOOPBACK";
qcom,smdpkt-dev-name = "smd_pkt_loopback";
};
};
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Qualcomm Technologies, Inc Shared Memory TTY Driver (smdtty)
[Root level node]
Required properties:
-compatible : should be "qcom,smdtty"
[Second level nodes]
qcom,smdtty-port-names
Required properties:
-qcom,smdtty-remote: the remote subsystem name
-qcom,smdtty-port-name : the smd channel name
Optional properties:
-qcom,smdtty-dev-name : the smdtty device name
Required alias:
- The index into TTY subsystem is specified via an alias with the following format
'smd{n}' where n is the tty device index.
Example:
aliases {
smd1 = &smdtty_apps_fm;
smd36 = &smdtty_loopback;
};
qcom,smdtty {
compatible = "qcom,smdtty";
smdtty_apps_fm: qcom,smdtty-apps-fm {
qcom,smdtty-remote = "wcnss";
qcom,smdtty-port-name = "APPS_FM";
};
smdtty_loopback: smdtty-loopback {
qcom,smdtty-remote = "modem";
qcom,smdtty-port-name = "LOOPBACK";
qcom,smdtty-dev-name = "LOOPBACK_TTY";
};
};
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Qualcomm Technologies, Inc. QPNP LEDs
Qualcomm Technologies, Inc. Plug N Play (QPNP) LED modules
are used for controlling LEDs that are connected to a QPNP PMIC.
The PMIC is connected to a host processor via the SPMI bus. Various
LED modules are supported such as Keypad backlight, WLED (white LED),
RGB LED and flash LED.
Each LED module is represented as a node of "leds-qpnp". This
node will further contain the type of LED supported and its
properties. At least one child node is required for each LED
module. Each must have the required properties below, in addition
to the properties for the LED type, WLED, Flash, RGB and MPP.
Required properties for each child node, WLED, Flash and RGB:
- compatible : should be "qcom,leds-qpnp"
- qcom,id : must be one of values supported in enum qpnp_led
- label : type of led that will be used, ie "wled"
- qcom,max-current : maximum current that the LED can sustain in mA
- linux,name : name of the led that is used in led framework
Optional properties for each child node, WLED, Flash, MPP, RGB and KPDBL:
- qcom,in-order-command-processing : specify if user space requests leds in order
WLED is primarily used as display backlight. Display subsystem uses
LED triggers for WLED to control the brightness as needed.
Optional properties for WLED:
- qcom,num-strings: number of wled strings to be configured
- qcom,num-physical-strings: number of physical wled strings supported
- qcom,ovp-val: over voltage protection threshold,
follows enum wled_ovp_threshold
- qcom,boost-curr-lim: boot currnet limit, follows enum wled_current_bost_limit
- qcom,ctrl-delay-us: delay in activation of led
- qcom,dig-mod-gen-en: digital module generator
- qcom,cs-out-en: current sink output enable
- qcom,op-fdbck: selection of output as feedback for the boost, 00 = automatic selection, 01 = select LED1 output, 02 = select LED2 output, 03 = select LED3 output
- qcom,cp-select: high pole capacitance
- linux,default-trigger: trigger the led from external modules such as display
- qcom,default-state: default state of the led, should be "on" or "off"
Flash is used primarily as a camera or video flash.
Optional properties for flash:
- qcom,headroom: headroom to use. Values should be 0, 1, 2, 3 for 250mV, 300mV, 400mV and 500mV
- qcom,duration: duration of the flash and torch, 10ms - 1280ms for flash and 2s - 33s for torch
- qcom,clamp-curr: current to clamp at, mA
- qcom,startup-dly: delay before flashing after flash executed. Values should 0, 1, 2, 3 for 10us, 32us, 64us, and 128us
- qcom,saftey-timer: include for safety timer use, otherwise watchdog timer will be used
- linux,default-trigger: trigger the led from external modules such as display
- qcom,default-state: default state of the led, should be "on" or "off"
- qcom,torch-enable: set flash led to torch mode functionality and triggers software workaround for torch if hardware does not support
- qcom,sw_vreg_ok: Specify if software strobe is used to inform the readiness of flash module to fire the flash LED when there is no smbb support
- qcom,no-smbb-support: Specify if smbb boost is not required and there is a single regulator for both flash and torch.
- flash-boost-supply: SMBB regulator for LED flash mode
- torch-boost-supply: SMBB regulator for LED torch mode
- flash-wa-supply: SMBB regulator for flash workarounds.
RGB Led is a tri-colored led, Red, Blue & Green.
Required properties for RGB led:
- qcom,mode: mode the led should operate in, options "pwm" and "lpg". "manual" mode is not supported for RGB led.
Required properties for PWM mode only:
- pwms: Use the phandle of pwm device
- qcom,pwm-us: time the pwm device will modulate at (us)
Required properties for LPG mode only:
- pwms: Use the phandle of pwm device
- qcom,pwm-us: time the pwm device will modulate at (us)
- qcom,duty-pcts: array of values for duty cycle to go through
- qcom,start-idx: starting point duty-pcts array
Optional properties for LPG mode only:
- qcom,pause-lo: pause at low end of cycle
- qcom,pause-hi: pause at high end of cycle
- qcom,ramp-step-ms: step between each cycle (ms)
- qcom,lut-flags: flags to be used in lut configuration
Optional properties for RGB led:
- linux,default-trigger: trigger the led from external modules such as display
- qcom,default-state: default state of the led, should be "on" or "off"
- qcom,turn-off-delay-ms: delay in millisecond for turning off the led when its default-state is "on". Value is being ignored in case default-state is "off".
- qcom,use-blink: Use blink sysfs entry for switching into lpg mode. For optimal use, set default mode to pwm. All required lpg parameters must be supplied.
MPP LED is an LED controlled through a Multi Purpose Pin.
Optional properties for MPP LED:
- linux,default-trigger: trigger the led from external modules such as display
- qcom,default-state: default state of the led, should be "on" or "off"
- qcom,source-sel: select power source, default 1 (enabled)
- qcom,mode-ctrl: select operation mode, default 0x60 = Mode Sink
- qcom,mode: mode the led should operate in, options "pwm", "lpg" and "manual"
- qcom,vin-ctrl: select input source, supported values are 0 to 3
- qcom,use-blink: Use blink sysfs entry for switching into lpg mode. For optimal use, set default mode to pwm. All required lpg parameters must be supplied.
- qcom,min-brightness - Lowest possible brightness supported on this LED other than 0.
- qcom,current-setting: default current value for wled used as button backlight in mA
- mpp-power-supply: regulator support for MPP LED
- qcom,mpp-power-max-voltage - maximum voltage for MPP LED regulator. This should not be specified when no regulator is in use.
- qcom,mpp-power-min-voltage - minimum voltage for MPP LED regulator. This should not be specified when no regulator is in use.
Required properties for PWM mode only:
- pwms: Use the phandle of pwm device
- qcom,pwm-us: time the pwm device will modulate at (us)
Required properties for LPG mode only:
- pwms: Use the phandle of pwm device
- qcom,pwm-us: time the pwm device will modulate at (us)
- qcom,duty-pcts: array of values for duty cycle to go through
- qcom,start-idx: starting point duty-pcts array
Optional properties for LPG mode only:
- qcom,pause-lo: pause at low end of cycle
- qcom,pause-hi: pause at high end of cycle
- qcom,ramp-step-ms: step between each cycle (ms)
- qcom,lut-flags: flags to be used in lut configuration
Keypad backlight is a backlight source for buttons. It supports four rows
and the required rows are enabled by specifying values in the properties.
Required properties for keypad backlight:
- qcom,mode: mode the led should operate in, options "pwm" and "lpg". "manual" mode is not supported for keypad backlight.
- qcom,row-id: specify the id of the row. Supported values are 0 to 3.
Optional properties for keypad backlight:
- qcom,row-src-vbst: select source for rows. Specify for vbst and ignore it
for vph_pwr.
- qcom,row-src-en: specify to enable row source
- qcom,always-on: specify if the module has to be always on
- qcom,use-blink: Use blink sysfs entry for switching into lpg mode. For optimal use, set default mode to pwm. All required lpg parameters must be supplied.
Required properties for PWM mode only:
- pwms: Use the phandle of pwm device
- qcom,pwm-us: time the pwm device will modulate at (us)
Required properties for LPG mode only:
- pwms: Use the phandle of pwm device
- qcom,pwm-us: time the pwm device will modulate at (us)
- qcom,duty-pcts: array of values for duty cycle to go through
- qcom,start-idx: starting point duty-pcts array
Optional properties for LPG mode only:
- qcom,pause-lo: pause at low end of cycle
- qcom,pause-hi: pause at high end of cycle
- qcom,ramp-step-ms: step between each cycle (ms)
- qcom,lut-flags: flags to be used in lut configuration
GPIO LED is an LED controlled through a PMIC GPIO.
Optional properties for GPIO LED:
- linux,default-trigger: trigger the led from external modules such as charging
- qcom,default-state: default state of the led, should be "on" or "off"
- qcom,turn-off-delay-ms: delay in millisecond for turning off the led when its default-state is "on". Value is being ignored in case default-state is "off".
- qcom,source-sel: select power source, default 1 (enabled)
- qcom,mode-ctrl: select operation mode, default 0x60 = Mode Sink
- qcom,vin-ctrl: select input source, supported values are 0 to 7
Example:
qcom,leds@a100 {
status = "okay";
qcom,led_mpp_2 {
label = "mpp";
linux,name = "button-backlight";
linux,default-trigger = "hr-trigger";
qcom,default-state = "off";
qcom,current-setting = <20>;
qcom,max-current = <40>;
qcom,id = <6>;
qcom,source-sel = <1>;
qcom,mode-ctrl = <0x61>;
qcom,mode = "manual";
};
};
qcom,leds@a200 {
status = "okay";
qcom,led_mpp_3 {
label = "mpp";
linux,name = "wled-backlight";
linux-default-trigger = "none";
qcom,default-state = "on";
qcom,max-current = <40>;
qcom,id = <6>;
qcom,source-sel = <1>;
qcom,mode-ctrl = <0x10>;
qcom,vin-ctrl = <0x03>;
qcom,min-brightness = <20>;
};
};
qcom,leds@a300 {
status = "okay";
qcom,led_mpp_pwm {
label = "mpp";
linux,name = "green";
linux,default-trigger = "none";
qcom,default-state = "off";
qcom,max-current = <40>;
qcom,current-setting = <5>;
qcom,id = <6>;
qcom,mode = "pwm";
qcom,source-sel = <8>;
qcom,mode-ctrl = <0x60>;
pwms = <&pm8941_pwm_1 0 0>;
qcom,pwm-us = <1000>;
};
};
qcom,leds@d000 {
status = "okay";
qcom,rgb_pwm {
label = "rgb";
linux,name = "led:rgb_red";
qcom,mode = "pwm";
qcom,pwm-us = <1000>;
pwms = <&pm8941_pwm_7 0 0>;
qcom,max-current = <12>;
qcom,default-state = "off";
qcom,id = <3>;
linux,default-trigger =
"battery-charging";
};
qcom,rgb_lpg {
label = "rgb";
linux,name = "led:rgb_green";
qcom,mode = "lpg";
pwms = <&pm8941_pwm_6 0 0>;
qcom,pwm-us = <1000>;
qcom,duty-ms = <20>;
qcom,start-idx = <1>;
qcom,idx-len = <10>;
qcom,duty-pcts = [00 19 32 4B 64
64 4B 32 19 00];
qcom,max-current = <12>;
qcom,default-state = "off";
qcom,id = <3>;
linux,default-trigger =
"battery-charging";
};
qcom,rgb_blink {
label = "rgb";
linux,name = "led:rgb_blue";
qcom,mode = "pwm";
pwms = <&pm8941_pwm_5 0 0>;
qcom,start-idx = <1>;
qcom,idx-len = <10>;
qcom,duty-pcts = [00 19 32 4B 64
64 4B 32 19 00];
qcom,lut-flags = <3>;
qcom,pause-lo = <0>;
qcom,pause-hi = <0>;
qcom,ramp-step-ms = <255>;
qcom,max-current = <12>;
qcom,default-state = "on";
qcom,turn-off-delay-ms = <500>;
qcom,id = <5>;
linux,default-trigger = "none";
qcom,pwm-us = <1000>;
qcom,use-blink;
};
};
qcom,leds@d300 {
compatible = "qcom,leds-qpnp";
status = "okay";
flash-boost-supply = <&pm8941_chg_boost>;
torch-boost-supply = <&pm8941_boost>;
qcom,flash_0 {
qcom,max-current = <1000>;
qcom,default-state = "off";
qcom,headroom = <0>;
qcom,duration = <200>;
qcom,clamp-curr = <200>;
qcom,startup-dly = <1>;
qcom,safety-timer;
label = "flash";
linux,default-trigger =
"flash0_trigger";
linux,name = "led:flash_0";
qcom,current = <625>;
qcom,id = <1>;
qcom,no-torch-module;
};
};
qcom,leds@d800 {
compatible = "qcom,leds-qpnp";
status = "okay";
qcom,wled_0 {
linux,default-trigger = "bkl-trigger"
label = "wled";
qcom,cs-out-en;
qcom,op-fdbck = <1>;
qcom,default-state "off";
qcom,max-current = <25>;
qcom,ctrl-delay-us = <0>;
qcom,boost-curr-lim = <3>;
qcom,cp-sel = <0>;
qcom,switch-freq = <2>;
qcom,ovp-val = <2>;
qcom,num-strings = <1>;
qcom,id = <0>;
linux,name = "led:wled_backlight";
};
};
qcom,leds@e200 {
status = "okay";
qcom,kpdbl1 {
label = "kpdbl";
linux,name = "kpdbl-pwm-1";
qcom,mode = <0>;
pwms = <&pm8941_pwm_9 0 0>;
qcom,pwm-us = <1000>;
qcom,id = <7>;
qcom,max-current = <20>;
qcom,row-id = <0>;
qcom,row-src-en;
qcom,always-on;
};
qcom,kpdbl2 {
label = "kpdbl";
linux,name = "kpdbl-lut-2";
qcom,mode = <1>;
pwms = <&pm8941_pwm_10 0 0>;
qcom,pwm-us = <1000>;
qcom,start-idx = <1>;
qcom,duty-pcts = [00 00 00 00 64
64 00 00 00 00];
qcom,id = <7>;
qcom,max-current = <20>;
qcom,row-id = <1>;
qcom,row-src-en;
};
};
qcom,leds@c900 {
compatible = "qcom,leds-qpnp";
reg = <0xc900 0x100>;
status = "okay";
qcom,led_gpio_10 {
label = "gpio";
linux,name = "led:notification";
qcom,max-current = <40>;
qcom,id = <8>;
linux,default-trigger = "notification";
qcom,default-state = "on";
qcom,turn-off-delay-ms = <1000>;
qcom,source-sel = <1>;
qcom,mode-ctrl = <0x10>;
qcom,vin-ctrl = <0x02>;
};
};
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Qualcomm Technologies, Inc. MSM8917 TLMM block
This binding describes the Top Level Mode Multiplexer block found in the
MSM8917 platform.
- compatible:
Usage: required
Value type: <string>
Definition: must be "qcom,msm8917-pinctrl"
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: the base address and size of the TLMM register space
provided as "pinctrl_regs".
- reg-names:
Usage: required
Value type: <prop-encoded-array>
Definition: Provides labels for the reg property.
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: should specify the TLMM summary IRQ.
- interrupt-controller:
Usage: required
Value type: <none>
Definition: identifies this node as an interrupt controller
- #interrupt-cells:
Usage: required
Value type: <u32>
Definition: must be 2. Specifying the pin number and flags, as defined
in <dt-bindings/interrupt-controller/irq.h>
- gpio-controller:
Usage: required
Value type: <none>
Definition: identifies this node as a gpio controller
- #gpio-cells:
Usage: required
Value type: <u32>
Definition: must be 2. Specifying the pin number and flags, as defined
in <dt-bindings/gpio/gpio.h>
Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
a general description of GPIO and interrupt bindings.
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
The pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
parameters, such as pull-up, drive strength, etc.
PIN CONFIGURATION NODES:
The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.
Each subnode only affects those parameters that are explicitly listed. In
other words, a subnode that lists a mux function but no pin configuration
parameters implies no information about any pin configuration parameters.
Similarly, a pin subnode that describes a pullup parameter implies no
information about e.g. the mux function.
The following generic properties as defined in pinctrl-bindings.txt are valid
to specify in a pin configuration subnode:
- pins:
Usage: required
Value type: <string-array>
Definition: List of gpio pins affected by the properties specified in
this subnode.
Valid pins are:
gpio0-gpio133,
sdc1_clk,
sdc1_cmd,
sdc1_data,
sdc1_rclk,
sdc2_clk,
sdc2_cmd,
sdc2_data,
qdsd_clk,
qdsd_cmd,
qdsd_data0,
qdsd_data1,
qdsd_data2,
qdsd_data3,
- function:
Usage: required
Value type: <string>
Definition: Specify the alternative function to be configured for the
specified pins. Functions are only valid for gpio pins.
Valid values are:
qdss_tracedata_b, blsp_uart1, gpio, blsp_spi1, adsp_ext, blsp_i2c1, prng_rosc,
qdss_cti_trig_out_b0, blsp_spi2, blsp_uart2, blsp_uart3, pbs0, pbs1,
pwr_modem_enabled_b, blsp_i2c3, gcc_gp2_clk_b, ldo_update,
atest_combodac_to_gpio_native, ldo_en, blsp_i2c2, gcc_gp1_clk_b, pbs2,
atest_gpsadc_dtest0_native, blsp_spi3, gcc_gp3_clk_b, blsp_spi4, blsp_uart4,
sec_mi2s, pwr_nav_enabled_b, codec_mad, pwr_crypto_enabled_b, blsp_i2c4,
blsp_spi5, blsp_uart5, qdss_traceclk_a, atest_bbrx1, m_voc,
qdss_cti_trig_in_a0, qdss_cti_trig_in_b0, blsp_i2c6, qdss_traceclk_b,
atest_wlan0, atest_wlan1, atest_bbrx0, blsp_i2c5, qdss_tracectl_a,
atest_gpsadc_dtest1_native, qdss_tracedata_a, blsp_spi6, blsp_uart6,
qdss_tracectl_b, mdp_vsync, pri_mi2s_mclk_a, sec_mi2s_mclk_a, cam_mclk,
cci_i2c, pwr_modem_enabled_a, cci_timer0, cci_timer1, cam1_standby,
pwr_nav_enabled_a, cam1_rst, pwr_crypto_enabled_a, forced_usb,
qdss_cti_trig_out_b1, cam2_rst, webcam_standby, cci_async, webcam_rst,
ov_ldo, sd_write, accel_int, gcc_gp1_clk_a, alsp_int, gcc_gp2_clk_a,
mag_int, gcc_gp3_clk_a, blsp6_spi, fp_int, qdss_cti_trig_in_b1, uim_batt,
cam2_standby, uim1_data, uim1_clk, uim1_reset, uim1_present, uim2_data,
uim2_clk, uim2_reset, uim2_present, sensor_rst, mipi_dsi0, smb_int,
cam0_ldo, us_euro, atest_char3, dbg_out, bimc_dte0, ts_resout, ts_sample,
sec_mi2s_mclk_b, pri_mi2s, sdcard_det, atest_char1, ebi_cdc, audio_reset,
atest_char0, audio_ref, cdc_pdm0, pri_mi2s_mclk_b, lpass_slimbus,
lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2, wcss_bt,
atest_char2, ebi_ch0, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan,
wcss_fm, ext_lpass, cri_trng, cri_trng1, cri_trng0, blsp_spi7, blsp_uart7,
pri_mi2s_ws, blsp_i2c7, gcc_tlmm, dmic0_clk, dmic0_data, key_volp,
qdss_cti_trig_in_a1, us_emitter, wsa_irq, wsa_io, wsa_reset, blsp_spi8,
blsp_uart8, blsp_i2c8, gcc_plltest, nav_pps_in_a, pa_indicator, modem_tsync,
nav_tsync, nav_pps_in_b, nav_pps, gsm0_tx, atest_char, atest_tsens,
bimc_dte1, ssbi_wtr1, fp_gpio, coex_uart, key_snapshot, key_focus, nfc_pwr,
blsp8_spi, qdss_cti_trig_out_a0, qdss_cti_trig_out_a1
- bias-disable:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as no pull.
- bias-pull-down:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as pull down.
- bias-pull-up:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as pull up.
- output-high:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
high.
Not valid for sdc pins.
- output-low:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
low.
Not valid for sdc pins.
- drive-strength:
Usage: optional
Value type: <u32>
Definition: Selects the drive strength for the specified pins, in mA.
Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
Example:
tlmm: pinctrl@1000000 {
compatible = "qcom,msm8917-pinctrl";
reg = <0x1000000 0x300000>;
reg-names = "pinctrl_regs";
interrupts = <0 208 0>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
pmx-uartconsole {
uart_console_active: uart_console_active {
mux {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
};
config {
pins = "gpio4", "gpio5";
drive-strength = <2>;
bias-disable;
};
};
uart_console_sleep: uart_console_sleep {
mux {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
};
config {
pins = "gpio4", "gpio5";
drive-strength = <2>;
bias-pull-down;
};
};
};
};
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Qualcomm Technologies, Inc. MSM8937 TLMM block
This binding describes the Top Level Mode Multiplexer block found in the
MSM8937 platform.
- compatible:
Usage: required
Value type: <string>
Definition: must be "qcom,msm8937-pinctrl"
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: the base address and size of the TLMM register space
provided as "pinctrl_regs".
- reg-names:
Usage: required
Value type: <prop-encoded-array>
Definition: Provides labels for the reg property.
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: should specify the TLMM summary IRQ.
- interrupt-controller:
Usage: required
Value type: <none>
Definition: identifies this node as an interrupt controller
- #interrupt-cells:
Usage: required
Value type: <u32>
Definition: must be 2. Specifying the pin number and flags, as defined
in <dt-bindings/interrupt-controller/irq.h>
- gpio-controller:
Usage: required
Value type: <none>
Definition: identifies this node as a gpio controller
- #gpio-cells:
Usage: required
Value type: <u32>
Definition: must be 2. Specifying the pin number and flags, as defined
in <dt-bindings/gpio/gpio.h>
Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
a general description of GPIO and interrupt bindings.
Please refer to pinctrl-bindings.txt in this directory for details of the
common pinctrl bindings used by client devices, including the meaning of the
phrase "pin configuration node".
The pin configuration nodes act as a container for an arbitrary number of
subnodes. Each of these subnodes represents some desired configuration for a
pin, a group, or a list of pins or groups. This configuration can include the
mux function to select on those pin(s)/group(s), and various pin configuration
parameters, such as pull-up, drive strength, etc.
PIN CONFIGURATION NODES:
The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.
Each subnode only affects those parameters that are explicitly listed. In
other words, a subnode that lists a mux function but no pin configuration
parameters implies no information about any pin configuration parameters.
Similarly, a pin subnode that describes a pullup parameter implies no
information about e.g. the mux function.
The following generic properties as defined in pinctrl-bindings.txt are valid
to specify in a pin configuration subnode:
- pins:
Usage: required
Value type: <string-array>
Definition: List of gpio pins affected by the properties specified in
this subnode.
Valid pins are:
gpio0-gpio133,
sdc1_clk,
sdc1_cmd,
sdc1_data,
sdc1_rclk,
sdc2_clk,
sdc2_cmd,
sdc2_data,
qdsd_clk,
qdsd_cmd,
qdsd_data0,
qdsd_data1,
qdsd_data2,
qdsd_data3,
- function:
Usage: required
Value type: <string>
Definition: Specify the alternative function to be configured for the
specified pins. Functions are only valid for gpio pins.
Valid values are:
qdss_tracedata_b, blsp_uart1, gpio, blsp_spi1, adsp_ext, blsp_i2c1, prng_rosc,
qdss_cti_trig_out_b0, blsp_spi2, blsp_uart2, blsp_uart3, pbs0, pbs1,
pwr_modem_enabled_b, blsp_i2c3, gcc_gp2_clk_b, ldo_update,
atest_combodac_to_gpio_native, ldo_en, blsp_i2c2, gcc_gp1_clk_b, pbs2,
atest_gpsadc_dtest0_native, blsp_spi3, gcc_gp3_clk_b, blsp_spi4, blsp_uart4,
sec_mi2s, pwr_nav_enabled_b, codec_mad, pwr_crypto_enabled_b, blsp_i2c4,
blsp_spi5, blsp_uart5, qdss_traceclk_a, atest_bbrx1, m_voc,
qdss_cti_trig_in_a0, qdss_cti_trig_in_b0, blsp_i2c6, qdss_traceclk_b,
atest_wlan0, atest_wlan1, atest_bbrx0, blsp_i2c5, qdss_tracectl_a,
atest_gpsadc_dtest1_native, qdss_tracedata_a, blsp_spi6, blsp_uart6,
qdss_tracectl_b, mdp_vsync, pri_mi2s_mclk_a, sec_mi2s_mclk_a, cam_mclk,
cci_i2c, pwr_modem_enabled_a, cci_timer0, cci_timer1, cam1_standby,
pwr_nav_enabled_a, cam1_rst, pwr_crypto_enabled_a, forced_usb,
qdss_cti_trig_out_b1, cam2_rst, webcam_standby, cci_async, webcam_rst,
ov_ldo, sd_write, accel_int, gcc_gp1_clk_a, alsp_int, gcc_gp2_clk_a,
mag_int, gcc_gp3_clk_a, blsp6_spi, fp_int, qdss_cti_trig_in_b1, uim_batt,
cam2_standby, uim1_data, uim1_clk, uim1_reset, uim1_present, uim2_data,
uim2_clk, uim2_reset, uim2_present, sensor_rst, mipi_dsi0, smb_int,
cam0_ldo, us_euro, atest_char3, dbg_out, bimc_dte0, ts_resout, ts_sample,
sec_mi2s_mclk_b, pri_mi2s, sdcard_det, atest_char1, ebi_cdc, audio_reset,
atest_char0, audio_ref, cdc_pdm0, pri_mi2s_mclk_b, lpass_slimbus,
lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2, wcss_bt,
atest_char2, ebi_ch0, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan,
wcss_fm, ext_lpass, cri_trng, cri_trng1, cri_trng0, blsp_spi7, blsp_uart7,
pri_mi2s_ws, blsp_i2c7, gcc_tlmm, dmic0_clk, dmic0_data, key_volp,
qdss_cti_trig_in_a1, us_emitter, wsa_irq, wsa_io, wsa_reset, blsp_spi8,
blsp_uart8, blsp_i2c8, gcc_plltest, nav_pps_in_a, pa_indicator, modem_tsync,
nav_tsync, nav_pps_in_b, nav_pps, gsm0_tx, atest_char, atest_tsens,
bimc_dte1, ssbi_wtr1, fp_gpio, coex_uart, key_snapshot, key_focus, nfc_pwr,
blsp8_spi, qdss_cti_trig_out_a0, qdss_cti_trig_out_a1
- bias-disable:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as no pull.
- bias-pull-down:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as pull down.
- bias-pull-up:
Usage: optional
Value type: <none>
Definition: The specified pins should be configued as pull up.
- output-high:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
high.
Not valid for sdc pins.
- output-low:
Usage: optional
Value type: <none>
Definition: The specified pins are configured in output mode, driven
low.
Not valid for sdc pins.
- drive-strength:
Usage: optional
Value type: <u32>
Definition: Selects the drive strength for the specified pins, in mA.
Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
Example:
tlmm: pinctrl@1000000 {
compatible = "qcom,msm8937-pinctrl";
reg = <0x1000000 0x300000>;
reg-names = "pinctrl_regs";
interrupts = <0 208 0>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
pmx-uartconsole {
uart_console_active: uart_console_active {
mux {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
};
config {
pins = "gpio4", "gpio5";
drive-strength = <2>;
bias-disable;
};
};
uart_console_sleep: uart_console_sleep {
mux {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
};
config {
pins = "gpio4", "gpio5";
drive-strength = <2>;
bias-pull-down;
};
};
};
};
@@ -0,0 +1,210 @@
Qualcomm Technologies, Inc. QPNP Linear Charger Specific Bindings.
The charger module supports the linear battery charger peripherals.
There are four different peripherals in the charger module.
Each of these peripherals are implemented as subnodes.
- qcom,chgr: Supports charging control and status reporting
- qcom,bat-if: Battery status reporting such as presence and
temperature reporting.
- qcom,usb-chgpth: USB charge path detection and input current
limiting configuration.
- qcom,chg-misc: Miscellaneous features such as comparator override
features etc.
Parent node required properties:
- qcom,vddmax-mv: Target voltage of battery in mV.
- qcom,vddsafe-mv: Maximum Vdd voltage in mV.
- qcom,vinmin-mv: Minimum input voltage in mV.
- qcom,ibatsafe-ma: Safety battery current setting
Parent node optional properties:
- qcom,vbatweak-uv: Weak battery voltage threshold in uV,
above which fast charging can start.
The supported voltage range is from
3000000uV to 3581250uV with a step
size of 18750000 uV.
- qcom,charging-disabled: Set this property to disable charging
by default.
- qcom,use-default-batt-values: Set this flag to force reporting of
fake battery.
- qcom,warm-bat-decidegc: Warm battery temperature in decidegC.
- qcom,cool-bat-decidegc: Cool battery temperature in decidegC.
Note that if both warm and cool
battery temperatures are set, the
corresponding ibatmax and bat-mv
properties are required to be set.
- qcom,ibatmax-cool-ma: Maximum cool battery charge current.
- qcom,ibatmax-warm-ma: Maximum warm battery charge current.
- qcom,warm-bat-mv: Warm temperature battery target
voltage.
- qcom,cool-bat-mv: Cool temperature battery target
voltage.
- qcom,thermal-mitigation: Array of ibatmax values for different
system thermal mitigation level.
- qcom,tchg-mins: Maximum total software initialized
charge time.
- qcom,bpd-detection: Select a battery presence detection
scheme by specifying either "bpd_thm"
"bpd_id" or "bpd_thm_id". "bpd_thm"
selects the temperature pin, "bpd_id"
uses the id pin for battery presence
detection, "bpd_thm_id" selects both.
If the property is not set, the
temperatue pin will be used.
- qcom,btc-disabled: If flag is set battery hot and cold
monitoring is disabled in hardware.
This monitoring is turned on by
default.
- qcom,batt-hot-percentage: Specify a supported hot threshold
percentage.
Supported thresholds: 25% and 35%. If
none is specified hardware defaults
will be used.
- qcom,batt-cold-percentage: Specify a supported cold threshold
percentage. Supported thresholds: 70%
and 80%. If none is specified
hardwaredefaults will be used.
- qcom,chg-adc_tm Corresponding ADC TM device's phandle
to set recurring measurements and
receive notification for batt_therm.
-qcom,float-charge If specified enable float charging.
- qcom,chg-vadc Corresponding VADC device's phandle.
- qcom,charger-detect-eoc If specified charger hardware will
detect end-of-charge.
If not specified charger driver
depends on BMSfor end-of-charge
detection.
- qcom,disable-vbatdet-based-recharge If specified disable VBATDET irq
and charging can only be resumed
if charger is re-inserted or SOC
falls below resume SOC.
This property should always be used
along with the BMS property:
"qcom,disable-suspend-on-usb".
- qcom,use-external-charger If specified the LBC module will
be disabled and the driver will not
register. It also enables BID for
BPD and disables BTC. Declare this node
only if you are using an external charger
and not the PMIC internal LBC.
- qcom,chgr-led-support There is a current sink device in linear
charger module, it is used to control a
led which can act as a charger led as well
as a general notification led.
- qcom,parallel-charger This is a bool property to indicate the
LBC will operate as a secondary charger
in the parallel mode. If this is enabled
the charging operations will be controlled by
the primary-charger.
- qcom,collapsible-chgr-support If specified the collapsible charger feature
will be supported. LBC will disable VIN_MIN
comparator and use chg_gone interrupt to
detect charger removal.
Sub node required structure:
- A qcom,charger node must be a child of an SPMI node that has specified
the spmi-dev-container property. Each subnode reflects
a hardware peripheral which adds a unique set of features
to the collective charging device. For example USB detection
and the battery interface are each separate peripherals and
each should be their own subnode.
Sub node required properties:
- compatible: Must be "qcom,qpnp-linear-charger".
- reg: Specifies the SPMI address and size for this
peripheral.
- interrupts: Specifies the interrupt associated with the
peripheral.
- interrupt-names: Specifies the interrupt names for the peripheral.
Every available interrupt needs to have an associated
name with it to indentify its purpose.
The following lists each subnode and their
corresponding required interrupt names:
qcom,usb-chgpth:
- usbin-valid
The following interrupts are available:
qcom,usb-chgpth:
- usbin-valid: Indicates valid USB
connection.
- coarse-det-usb: Coarse detect interrupt
triggers at low voltage on
USB_IN.
- chg-gone: Triggers on VCHG line.
- overtemp: Triggers on over temperature
condition
qcom,chgr:
- chg-done: Triggers on charge completion.
- chg-failed: Notifies of charge failures.
- fast-chg-on: Notifies of fast charging.
- vbat-det-lo: Triggers on vbat-det-lo
voltage.
Example:
pm8916-chg: qcom,charger {
spmi-dev-container;
compatible = "qcom,qpnp-linear-charger";
#address-cells = <1>;
#size-cells = <1>;
qcom,vddmax-mv = <4200>;
qcom,vddsafe-mv = <4200>;
qcom,vinmin-mv = <4200>;
qcom,ibatsafe-ma = <1440>;
qcom,vbatweak-uv = <3200>;
qcom,thermal-mitigation = <1500 700 600 325>;
qcom,cool-bat-decidegc = <100>;
qcom,warm-bat-decidegc = <450>;
qcom,cool-bat-mv = <4100>;
qcom,ibatmax-warm-ma = <360>;
qcom,ibatmax-cool-ma = <360>;
qcom,warm-bat-mv = <4100>;
qcom,batt-hot-percentage = <25>;
qcom,batt-cold-percentage = <85>;
qcom,tchg-mins = <152>;
qcom,resume-soc = <99>;
qcom,btc-disabled = <0>;
qcom,chg-vadc = <&pm8916_vadc>;
qcom,chgr@1000 {
reg = <0x1000 0x100>;
interrupts = <0x0 0x10 0x7>,
<0x0 0x10 0x6>,
<0x0 0x10 0x5>,
<0x0 0x10 0x0>;
interrupt-names = "chg-done",
"chg-failed",
"fast-chg-on",
"vbat-det-lo";
};
qcom,bat-if@1200 {
reg = <0x1200 0x100>;
interrupts = <0x0 0x12 0x1>,
<0x0 0x12 0x0>;
interrupt-names = "bat-temp-ok",
"batt-pres";
};
qcom,usb-chgpth@1300 {
reg = <0x1300 0x100>;
interrupts = <0 0x13 0x2>,
<0 0x13 0x1>;
interrupt-names = "chg-gone",
"usbin-valid";
};
qcom,chg-misc@1600 {
reg = <0x1600 0x100>;
};
};
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QPNP USB Type-C module
QPNP USB Type-C module supports USB type-c ports and detection of
USB Type-C chargers that can supply upto 3A Vbus current for charging.
The QPNP USB Type-C interfaces via the SPMI bus.
Required properties :
- compatible : Must be "qcom,qpnp-typec"
- reg: The SPMI address for this peripheral
- interrupts: Specifies the interrupt associated with the peripheral.
- interrupt-names: Specifies the interrupt names for the peripheral. Every
available interrupt needs to have an associated name
with it to indentify its purpose.
- vrd-change: Triggers on change in current
capability of charger.
- ufp-detach: Triggers on cable detach in
UFP mode.
- ufp-detect: Triggers on charger insertion.
- dfp-detach: Triggers on cable detach in
DFP mode.
- dfp-detect: Triggers on OTG cable insertion.
- vbus-err: Triggers if VBUS is not
detected within 275 msec after
CC detection in UFP mode.
- vconn-oc: Triggers on VCONN overcurrent
in DFP mode with active cable.
Optional properties:
- pinctrl-names : This should be defined if a target uses pinctrl framework
for SSMUX control pin. See "pinctrl" in
Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
It should specify the names of the configs that pinctrl can install in driver.
Following are the pinctrl config that can be installed:
"typec_ssmux_config" : Default configuration of pins.
- <supply-name>-supply: handle to the regulator device tree node.
"supply-name" is "ss-mux" regulator to drive super-speed MUX chip.
- qcom,role-reversal-supported : A boolean property that when present enables
support of dual role class.
Example:
qcom,qpnp-typec@bf00 {
compatible = "qcom,qpnp-typec";
reg = <0xbf00 0x100>;
interrupts = <0x0 0xbf 0x0>,
<0x0 0xbf 0x1>,
<0x0 0xbf 0x2>,
<0x0 0xbf 0x3>,
<0x0 0xbf 0x4>,
<0x0 0xbf 0x6>,
<0x0 0xbf 0x7>;
interrupt-names = "vrd-change",
"ufp-detach",
"ufp-detect",
"dfp-detach",
"dfp-detect",
"vbus-err",
"vconn-oc";
};
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Qualcomm Technologies, Inc. QPNP Voltage-Mode(VM) PMIC Battery Management System
QPNP PMIC VM BMS provides interface to clients to read properties related
to the battery. Its main function is to calculate the SOC (state of charge)
of the battery based on periodic sampling of the VBAT (battery voltage).
Parent node required properties:
- compatible : Must be "qcom,qpnp-vm-bms" for the BM driver.
- reg : Offset and length of the PMIC peripheral register map.
- interrupts : The interrupt mappings.
The format should be
<slave-id peripheral-id interrupt-number>.
- interrupt-names : names for the mapped bms interrupt
The following interrupts are required:
0 : leave CV state
1 : enter CV state
2 : good ocv generated
3 : ocv_thr
4 : fifo update
5 : fsm state chnaged
Additionally, optional subnodes may be included:
- qcom,batt-pres-status : A subnode with a register address for the SMBB
battery interface's BATT_PRES_STATUS register. If this node is
added, then the BMS will try to detect offmode battery removal
via the battery interface's offmode battery removal circuit.
- qcom,battery-data : A phandle to a node containing the available batterydata
profiles. See the batterydata bindings documentation for more
details.
Parent node required properties:
- qcom,v-cutoff-uv : cutoff voltage where the battery is considered dead in
micro-volts.
- qcom,max-voltage-uv : maximum voltage for the battery in micro-volts.
- qcom,r-conn-mohm : connector resistance in milli-ohms.
- qcom,shutdown-soc-valid-limit : If the ocv upon restart is within this
distance of the shutdown ocv, the BMS will try to force
the new SoC to the old one to provide charge continuity.
That is to say,
if (abs(shutdown-soc - current-soc) < limit)
then use old SoC.
- qcom,low-soc-calculate-soc-threshold : The SoC threshold for when
the periodic calculate_soc work speeds up. This ensures
SoC is updated in userspace constantly when we are near
shutdown.
- qcom,low-voltage-threshold : The battery voltage threshold in micro-volts for
when the BMS tries to wake up and hold a wakelock to
ensure a clean shutdown.
- qcom,low-voltage-calculate-soc-ms : The time period between subsequent
SoC recalculations when the current voltage is below
qcom,low-voltage threshold. This takes precedence over
qcom,low-soc-calculate-soc-ms.
- qcom,low-soc-calculate-soc-ms : The time period between subsequent
SoC recalculations when the current SoC is below
qcom,low-soc-calculate-soc-threshold. This takes
precedence over qcom,calculate-soc-ms.
- qcom,calculate-soc-ms : The time period between subsequent SoC
recalculations when the current SoC is above or equal
qcom,low-soc-calculate-soc-threshold.
- qcom,bms-vadc: Corresponding VADC device's phandle.
- qcom,bms-adc_tm: Corresponding ADC_TM device's phandle to set recurring
measurements and receive notifications for vbatt.
- qcom,pmic-revid : Phandle pointing to the revision peripheral node.
Parent node Optional properties
- qcom,s1-sample-interval-ms: The sampling rate in ms of the accumulator in state
S1. (i.e) the rate at which the accumulator is being
filled with vbat samples. Minimum value = 0 and
Maximum value = 2550ms.
- qcom,s2-sample-interval-ms: The sampling rate in ms of the accumulator in state
S2. (i.e) the rate at which the accumulator is being
filled with vbat samples. Minimum value = 0 and
Maximum value = 2550ms.
- qcom,s1-sample-count: The number of samples to be accululated for one FIFO in
state S1. Possible values are - 0, 4, 8, 16, 32, 64, 128,
256.
- qcom,s2-sample-count: The number of samples to be accululated for one FIFO in
state S2. Possible values are - 0, 4, 8, 16, 32, 64, 128,
256.
- qcom,s1-fifo-legth: Number of FIFO's to be filled in state S1, to generate
the fifo_update_done interrupt. Possile values - 0 to 8
- qcom,s2-fifo-legth: Number of FIFO's to be filled in state S2, to generate
the fifo_update_done interrupt. Possible values- 0 to 8
- qcom,force-s3-on-suspend : Bool property to force the BMS into S3 (sleep) state
while entering into system suspend.
- qcom,force-bms-active-on-charger: Bool property to keep BMS FSM active
if charger is present.
- qcom,report-charger-eoc : Bool property to indicate if BMS needs to indicate
EOC to charger.
- qcom,ignore-shutdown-soc: A boolean that controls whether BMS will
try to force the startup SoC to be the same as the
shutdown SoC. Defining it will make BMS ignore the
shutdown SoC.
- qcom,use-voltage-soc : A boolean that controls whether BMS will use
voltage-based SoC instead of a coulomb counter based
one. Voltage-based SoC will not guarantee linearity.
- qcom,disable-bms : Bool property to disable the VMBMS hardware module.
Enable this property if BMS is not supported or an external
fuel gauge is used.
- qcom,s3-ocv-tolerence-uv : The S3 state OCV tolerence threshold in uV. The
LSB value is 300uV and maximum value is 76500uV.
- qcom,low-soc-fifo-length : The fifo length (of S2 STATE) to be used at lower
SOCs. If this value is not specified the system uses
default length.
- qcom,resume-soc: Capacity in percent at which charging should resume
when a fully charged battery drops below this level.
- qcom,low-temp-threshold : The temperature threshold below which the IBAT
averaging and UUC smoothening is disabled. This value
is in deci-degrees centigrade. If not specified it
defaults to 0.
- qcom,ibat-avg-samples : The number of samples to be averaged for IBAT
estimation. If not specified it defaults to 16.
The possible values are 1 to 16.
- qcom,batt-aging-comp : A boolean that defines if battery aging compensation
is enabled.
- qcom,use-reported-soc : Bool property to enable the reported_soc logic. To
enable this feature, qcom,resume-soc must be defined as
a proper value. The BMS is also required to control the
charging, discharging and recharging.
qcom,batt-pres-status node required properties:
- reg : offset and length of the PMIC LBC battery interface BATT_PRES_STATUS
register.
qcom,qpnp-chg-pres required properties:
- reg : offset and length of the PMIC LBC charger interafce CHARGER_OPTION
register.
Example:
pm8916_bms: qcom,qpnp-vm-bms {
spmi-dev-container;
compatible = "qcom,qpnp-vm-bms";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
qcom,v-cutoff-uv = <3400000>;
qcom,max-voltage-uv = <4200000>;
qcom,r-conn-mohm = <18>;
qcom,shutdown-soc-valid-limit = <20>;
qcom,low-soc-calculate-soc-threshold = <15>;
qcom,low-voltage-threshold = <3420000>;
qcom,low-voltage-calculate-soc-ms = <1000>;
qcom,low-soc-calculate-soc-ms = <5000>;
qcom,low-soc-fifo-length = <2>;
qcom,calculate-soc-ms = <20000>;
qcom,s3-ocv-tolerence-uv = <1200>;
qcom,volatge-soc-timeout-ms = <60000>;
qcom,battery-data = <&mtp_batterydata>;
qcom,bms-vadc = <&pm8916_vadc>;
qcom,bms-adc_tm = <&pm8916_adc_tm>;
qcom,batt-pres-status@1208 {
reg = <0x1208 0x1>;
}
qcom,qpnp-chg-pres@1208 {
reg = <0x1108 0x1>;
}
qcom,bms-bms@4000 {
reg = <0x4000 0x100>;
interrupts = <0x0 0x40 0x0>,
<0x0 0x40 0x1>,
<0x0 0x40 0x2>,
<0x0 0x40 0x3>,
<0x0 0x40 0x4>,
<0x0 0x40 0x5>,
interrupt-names = "leave_cv",
"enter_cv",
"good_ocv",
"ocv_thr",
"fifo_updtaed",
"fsm_state_change";
};
};
@@ -0,0 +1,256 @@
SMB1360 battery charger and fuel gauge
SMB1360 is a single path switch-mode battery charger and
fuel gauge. The charger has a max current rating of 1.5A.
The fuel gauge uses voltage + coulomb counting to report
the state of charge.
The smb1360 interface is via I2C bus.
Required Properties:
- compatible: Must be "qcom,smb1360-charger-fg"
- reg: The device 7-bit I2C address.
Optional Properties:
- interrupts This indicates the IRQ numbers of the GPIOs
connected to the STAT and usb-id pins.
- interrupt-names The irq names should be smb1360_stat_irq and
smb1360_usb_id_irq.The stat irq is mandatory
and usb_id irq is optional.
- pinctrl-names: The state name of the pin configuration. Only
support: "default".
- pinctrl-0: The phandles of the pin configuration node in
pinctrl for smb_int_pin and usb-id pin.
For details of pinctrl properties, please refer to:
"Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt"
- qcom,float-voltage-mv Float Voltage in mV - the maximum voltage up to which
the battery is charged. Supported range 3460V to 4360V
- qcom,charging-timeout Maximum duration in minutes that a single charge
cycle may last. Supported values are: 0, 192, 384,
768, and 1536. A value of 0 means that no
charge cycle timeout is used and charging can
continue indefinitely.
- qcom,charging-disabled Set this if charging should be disabled in the build
by default. Useful in usecases where battery current
needs to be profiled even when USB is present.
- qcom,recharge-thresh-mv Specifies the minimum voltage drop in millivolts
below the float voltage that is required in
order to initiate a new charging cycle.
Supported values are: 50, 100, 200 and 300mV.
- qcom,recharge-disabled Disabled the auto-recharge function
- qcom,iterm-ma Specifies the termination current to indicate end-of-charge.
Possible values in mA - 25, 50, 75, 100, 125, 150, 175, 200
- qcom,iterm-disabled Disables the termination current feature. This is a bool
property.
- qcom,chg-inhibit-disabled Disables the charger-inhibit function.
- qcom,disable-ov-ends-chg-cycle
The boolean property to indicate if the ov-ends-charge-cycle
feature is disabled. If the feature is disabled, charging
could be resumed from battery OV (over voltage) status; otherwise,
charging cycle will be terminated after battery OV event and
won't be resumed until disable/enable charging.
- qcom,batt-id-disabled Disabled the batt-id function. Doing this will
disable the ability of RID based battery profile selection.
- qcom,fg-delta-soc The delta in SOC which will generate an interrupt
- qcom,fg-soc-max SOC value (max) at which an interrupt is generated.
This can be used to alert the system when the
battery reaches a specific (maximum) SOC value.
- qcom,fg-soc-min SOC value (min) at which an interrupt is generated.
This can be used to alert the system when the
battery reaches a specific (minimum) SOC value.
- qcom,fg-voltage-min-mv The minimum volatge at which an interrupt is generated.
This can be used as an alert mechanism.
- qcom,fg-voltage-empty-mv The voltage which indicates the battery is empty.
- qcom,thermal-mitigation: Array of input current limit values for different
system thermal mitigation level.
- qcom,stat-pulsed-irq: A boolean flag to indicate the state-irq pin will generate pulse
signal when interrupt happened. If this property is not specified,
the default configuration is static level irq.
- qcom,shdn-after-pwroff: A bool property to configure smb1360 for shutdown at power-off.
- qcom,empty-soc-disabled: A bool property to indicate whether stop updating empty_soc flag.
System reports 0% SOC when empty_soc being set.
- qcom,awake-min-soc A bool property to indicate whether the system is prevented from
sleeping when SOC is under the min_soc threshold.
- qcom,batt-profile-select A boolean flag to indicate of battery-profile
selection is enabled.
- qcom,profile-a-rid-kohm The battery-ID resistor (RID) in Kohm supported by
profile-A of SMB1360. This should be specified
if 'batt-profile-select' is defined.
- qcom,profile-b-rid-kohm The battery-ID resistor (RID) in Kohm supported by
profile-B of SMB1360. This should be specified
if 'batt-profile-select' is defined.
- qcom,batt-id-vref-uv The reference voltage on the battery-ID line
specified in micro-volts.
- qcom,batt-id-rpullup-kohm The pull-up resistor connected on the battery-ID
(vref) line.
- qcom,smb1360-vadc VADC device phandle (used for reading the RID)
- qcom,fg-batt-capacity-mah The new battery capacity to be supported.
This updates the ACTUAL and NOMINAL CAPACITY
of the profile.
- qcom,fg-cc-soc-coeff The CC_TO_SOC_COEFF of the new battery capacity.
This is updated only if 'fg-batt-capacity-mah'
is specified. This value is calculated from the
batt-capacity and then encoded as floating number.
cc_soc_coeff = HALF_ENCODING(8192 / batt-capacity)
- qcom,fg-cutoff-voltage-mv This is the minimum allowed system voltage. The
FG will report SOC = 0 at this volatge. This
value is in mv.
- qcom,fg-iterm-ma This is termination current at which the
Monotonic SOC reports 100. The value passed here
is negated in the driver (assuming that the iterm
is always -ve). This value is in mA.
- qcom,fg-ibatt-standby-ma This is the minimum current value for the SOC to
be above 0% at the cutoff voltage. This value
is in mA.
- qcom,fg-cc-to-cv-mv This is the voltage at which the FG transitions
from CC to CV. This value should never be
higher than the float volatge. Its in mV.
- qcom,thermistor-c1-coeff This is the NTC thermistor C1 coeff for the
thermistor inside the battery. This value is
16-bit float encoded value determined from the
NTC-c1_coeff mapping.
- qcom,otg-batt-curr-limit This property defines the current threshold draw
from battery when device working at OTG mode.
The possible values are: 350, 550, 950, 1500mA.
- qcom,fg-auto-recharge-soc This property defines the auto recharging SOC threshold.
- qcom,min-icl-100ma A bool property to set the minimum ICL current
to 100mA. If this property is not set the minimum
ICL is set to 500mA in all the scenarios.
- qcom,config-hard-thresholds This property indicates if cold and hot thresholds need be modified.
If it's not defined, default temp thresholds will be used. If this
defined, it's required to specify the "qcom,hot-bat-decidegc" and
"qcom,cold-bat-decidegc" values. If this defined, the serial properties
(qcom,otp-hard-jeita-config, qcom,otp-hot-bat-decidegc,
qcom,otp-cold-bat-decidegc) mustn't be defined.
- qcom,hot-bat-decidegc Hot battery temperature in decidegC. This property should only be
defined when "qcom,config-hard-thresholds" defined, and the value
must be out of range [0, 55].
- qcom,cold-bat-decidegc Cold battery temperature in decidegC. This property should only be
defined when "qcom,config-hard-thresholds" defined, and the value
must be out of range [0, 55].
- qcom,otp-hard-jeita-config This property indicates if cold and hot thresholds need be modified.
If it's not defined, default temp thresholds [0, 55] will be used.
If this defined, it's required to specify the "qcom,otp-hot-bat-decidegc"
and "qcom,otp-cold-bat-decidegc" values. If this is defined, the serial
properties (qcom,config-hard-thresholds, qcom,hot-bat-decidegc,
qcom,cold-bat-decidegc) mustn't be defined.
- qcom,otp-hot-bat-decidegc Hot battery temperature in decidegC. This property could only be
defined when qcom,config-otp-hard-jeita exist.
- qcom,otp-cold-bat-decidegc Cold battery temperature in decidegC. This property could only be
defined when qcom,config-otp-hard-jeita exist.
- qcom,otp-hard-jeita-hysteresis This property contains two intergers to define the temperature
hysteresis (in decidegC unit) for hard cold and hard hot.
This property could only be defined when qcom,config-otp-hard-jeita exist.
- qcom,soft-jeita-supported This property indicates whether soft jeita supported.
- qcom,warm-bat-decidegc Warm battery temperature in decidegC. After hitting this threshold,
"qcom,warm-bat-ma" defines maximum charging current and
"qcom,warm-bat-mv" defines maximum target voltage.
This property must be in range [0, 55] if needed.
- qcom,cool-bat-decidegc Cool battery temperature in decidegC. After hitting this threshold,
"qcom,cool-bat-ma" defines maximum charging current and
"qcom,cool-bat-mv" defines maximum target voltage.
This property must be in range [0, 55] if needed.
- qcom,warm-bat-mv Maximum warm battery target voltage in milli-volts.
- qcom,cool-bat-mv Maximum cool battery target voltage in milli-volts.
- qcom,warm-bat-ma Maximum warm battery charge current in milli-amps.
- qcom,cool-bat-ma Maximum cool battery charge current in milli-amps.
- qcom,fg-reset-at-pon This is a bool property which indicates if the
FG reset at power-on is enabled.
- qcom,fg-reset-thresold-mv This value indicates the voltage threshold to
reset the FG. This value is compared against
the difference between in predicted voltage and
current voltage. If this value is not specified
a default value of 50mV is used. Unit is in milli-volts.
- qcom,rsense-10mhom A bool property to indicate the Rsense resistor
configuration. If set, the Rsense is 10mOhm else
its 20mOhm.
- qcom,otg-fet-present A bool property to indicate that a pMOS FET is present
to boost the OTG current. On enabling this the max OTG
current supported is 3x(qcom,otg-batt-curr-limit).
- qcom,otg-fet-enable-gpio GPIO for enabling and disabling OTG FET.
Following should be the PMIC gpio configuration:
{
qcom,mode = <1>; //Digital output
qcom,pull = <0>; //Pull up configuration
qcom,vin-sel = <0>; //Voltage level: VPH_PWR
qcom,src-sel = <0>; //Pin function: GPIO
qcom,master-en = <1>; //Enable
}
Please go through the documentation for PMIC gpio
configuration details:
Documentation/devicetree/bindings/gpio/qpnp-pin.txt
- qcom,usb-id-gpio GPIO for usb-id detection.This property is mandatory
if usb-id irq is specified.
- qcom,parallel-charging-enabled: A bool property which enables SMB1360 to
operate in the parallel mode. SMB1360 acts
as the primary charger.
- qcom,max-parallel-current-ma: This is the max charging current which can be
drawn from the secondary charger. If this is
not specified this value defaults to 540mA.
The overall current charging current is
1500mA(from SMB) + qcom,max-parallel-current-ma.
Example:
i2c@f9967000 {
smb1360-chg-fg@1b {
compatible = "qcom,smb1360-chg-fg";
reg = <0x1b>;
interrupt-parent = <&spmi_bus>;
interrupts = <0x00 0xcd 0>,
<0 0xc3 0 3>;
interrupt-names = "smb1360_stat_irq",
"smb1360_usb_id_irq";
pinctrl-names = "default";
pinctrl-0 = <&smb_int_default>,
<&usb_id_default>;
/* battery-profile selection properties */
qcom,batt-profile-select;
qcom,smb1360-vadc = <&pm8916_vadc>;
qcom,batt-id-vref-uv = <1800000>;
qcom,batt-id-rpullup-kohm = <100>;
qcom,profile-a-rid-kohm = <78>;
qcom,profile-b-rid-kohm = <200>;
/* battery capacity */
qcom,fg-batt-capacity-mah = <4000>;
qcom,fg-cc-soc-coeff = <0x8009>;
qcom,fg-cutoff-voltage-mv = <3300>;
qcom,fg-iterm-ma = <100>;
qcom,fg-ibatt-standby-ma = <200>;
qcom,fg-cc-to-cv-mv = <4180>;
qcom,thermistor-c1-coeff = <0x86DB>;
qcom,float-voltage-mv = <4200>;
qcom,iterm-ma = <100>;
qcom,charging-disabled;
qcom,recharge-thresh-mv = <100>;
qcom,fg-soc-max = <85>;
qcom,fg-soc-min = <15>;
qcom,fg-auto-recharge-soc = <99>;
qcom,thermal-mitigation = <1500 700 300 0>;
qcom,config-hard-thresholds;
qcom,hot-bat-decidegc = <650>;
qcom,cold-bat-decidegc = <(-100)>;
qcom,soft-jeita-supported;
qcom,warm-bat-decidegc = <450>;
qcom,cool-bat-decidegc = <100>;
qcom,otp-hard-jeita-config;
qcom,otp-hot-bat-decidegc = <550>;
qcom,otp-cold-bat-decidegc = <0>;
qcom,otp-hard-jeita-hysteresis = <0, 50>;
qcom,warm-bat-mv = <4100>;
qcom,cool-bat-mv = <4100>;
qcom,warm-bat-ma = <750>;
qcom,cool-bat-ma = <750>;
qcom,otg-batt-curr-limit = <950>;
qcom,fg-reset-at-pon;
qcom,otg-fet-present;
qcom,otg-fet-enable-gpio = <&pm8916_gpios 3 0>;
qcom,usb-id-gpio = <&pm8916_gpios 4 0>;
};
};
+219
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Qualcomm Technologies, Inc. QPNP PWM/LPG controller
qpnp-pwm driver supports Pulse Width Module (PWM) functionality. PWM feature is
used in range of applications such as varying Display brightness, LED dimming,
etc. QTI PMICs have a physical device called Light Pulse Generator (LPG). In
addition to support PWM functionality, the LPG module provides a rich set of
user defined PWM pattern configurations, such as sawtooth, linear up, linear
down, triangular patterns etc. The PWM patterns are used in applications such as
charger driver where the driver uses these patterns to indicate various states
of charging.
Required device bindings:
- compatible: should be "qcom,qpnp-pwm"
- reg: Offset and length of the controller's LPG channel register.
- reg-names: Name for the above register.
"qpnp-lpg-channel-base" = physical base address of the
controller's LPG channel register.
- qcom,lpg-lut-size: LPG LUT size.
- qcom,channel-id: channel Id for the PWM.
- qcom,supported-sizes: Supported PWM sizes.
Following three pwm sizes lists are supported by PWM/LPG controllers.
<6>, <9>;
<7>, <8>;
<6>, <7>, <9>;
- qcom,ramp-index: Ramp index in LUT ramp control register.
Each LPG has an index in the LUT ramp control register.
One exception is that, if LPG does not support LUT mode
and supports only PWM mode then there is no need to
provide the ramp-index.
Optional device bindings:
- qcom,force-pwm-size: For certain LPG channels, PWM size can be forced.
Possible values 6, 7, 8 and 9.
- qcom,channel-owner: A string value to supply owner information.
- qcom,mode-select: 0 = PWM mode
1 = LPG mode
- qcom,dtest-line: indicates which DTEST line to be configured for LPG
or PWM output. For LPG subtypes, possible values are 1,
2, 3 and 4. For PWM subtype, possibe values are 1 and 2.
- qcom,dtest-output: indicates the output configuration for DTEST line.
For LPG subtypes, possible output values are:
0 = Disabled
1 = LPG output low
2 = LPG output high
3,4,5 = DTEST line specific configuration
6,7 = Not used
For PWM subtype, possible output values are:
0 = Disabled
1 = pwm_out for DTEST1 or reserved
2 = pwm_out for DTEST2 or reserved
3 = Not used
If this binding is specified along with the required bindings of PWM/LPG then
in addition to configure PWM/LPG the qpnp-pwm driver also enables the feature
at the probe time. In the case where the binding is not specified the qpnp-pwm
driver does not enable the feature. Also, it is considered an error to specify
a particular mode using this binding but not the respective feature subnode.
All PWM devices support both PWM and LPG features within the same device.
To support each feature, there are some required and optional bindings passed
through device tree.
The PWM device can enable one feature (either PWM or LPG) at any given time.
Therefore, the qpnp-pwm driver applies the last PWM or LPG feature configuration
and enables that feature.
Required bindings to support PWM feature:
- qcom,period: PWM period time in microseconds.
- qcom,duty: PWM duty time in microseconds.
- label: "pwm"
Required bindings to support LPG feature:
The following bindings are needed to configure LPG mode, where a list of
duty cycle percentages is populated. The size of the list cannot exceed
the size of the LPG look-up table.
- reg: Offset and length of LPG look-up table (LUT). The LPG look-up table is a
contiguous address space that is populated with PWM values.
The size of PWM value is 9 bit and the size of each
entry of the table is 8 bit. Thus, two entries are used
to fill each PWM value. The lower entry is used for PWM
LSB byte and higher entry is used for PWM MSB bit.
- reg-names: Name for the above register.
"qpnp-lpg-lut-base" = physical base address of LPG LUT.
- qcom,period: PWM period time in microseconds.
- qcom,duty-percents: List of entries for look-up table
- cell-index: Index of look-up table that should be used to start
filling up the duty-pct list. start-idx + size of list
cannot exceed the size of look-up table.
- label: "lpg"
Optional bindings to support LPG feature:
- qcom,ramp-step-duration: Time (in ms) to wait before loading next entry of LUT
- qcom,lpg-lut-pause-hi: Time (in ms) to wait once pattern reaches to hi
index.
- qcom,lpg-lut-pause-lo: Time (in ms) to wait once pattern reaches to lo
index.
- qcom,lpg-lut-ramp-direction: 1 = Start the pattern from lo index to hi index.
0 = Start the pattern from hi index to lo index.
- qcom,lpg-lut-pattern-repeat: 1 = Repeat the pattern after the pause once it
reaches to last duty cycle.
0 = Do not repeat the pattern.
- qcom,lpg-lut-ramp-toggle: 1 = Toggle the direction of the pattern.
0 = Do not toggle the direction.
- qcom,lpg-lut-enable-pause-hi: 1 = Enable pause time at hi index.
0 = Disable pause time at hi index.
- qcom,lpg-lut-enable-pause-lo: 1 = Enable pause time at lo index.
0 = Disable pause time at lo index.
Example:
qcom,spmi@fc4c0000 {
#address-cells = <1>;
#size-cells = <0>;
qcom,pm8941@1 {
spmi-slave-container;
reg = <0x1>;
#address-cells = <1>;
#size-cells = <1>;
pwm@b100 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-pwm";
reg = <0xb100 0x100>, <0xb040 0x80>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <0>;
qcom,supported-sizes = <6>, <7>, <9>;
qcom,ramp-index = <0>;
status = "okay";
};
pwm@b200 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-pwm";
reg = <0xb200 0x100>, <0xb040 0x80>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <1>;
qcom,supported-sizes = <6>, <7>, <9>;
qcom,ramp-index = <1>;
qcom,force-pwm-size = <9>;
qcom,period = <6000000>;
status = "okay";
qcom,pwm {
qcom,duty = <4000000>;
label = "pwm";
};
};
pwm@b500 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-pwm"
reg = <0xb500 0x100>, <0xb040 0x80>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <4>;
qcom,supported-sizes = <6>, <7>, <9>;
qcom,ramp-index = <4>;
qcom,period = <6000000>;
qcom,mode-select = <0>;
qcom,channel-owner = "RGB-led";
status = "okay";
qcom,pwm {
qcom,duty = <4000000>;
label = "pwm";
};
qcom,lpg {
qcom,duty-percents = <1 14 28 42 56 84 100
100 84 56 42 28 14 1>;
cell-index = <0>;
qcom,ramp-step-duration = <20>;
label = "lpg";
};
};
pwm@b300 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "qcom,qpnp-pwm";
reg = <0xb200 0x100>, <0xb040 0x80>;
reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base";
qcom,channel-id = <2>;
qcom,supported-sizes = <6>, <7>, <9>;
qcom,ramp-index = <1>;
qcom,force-pwm-size = <9>;
qcom,period = <6000000>;
qcom,dtest-line = <3>;
qcom,dtest-output = <1>;
status = "okay";
qcom,pwm {
qcom,duty = <4000000>;
label = "pwm";
};
};
};
};
There are couple of ways to configure PWM device channels as shown in above
example,
1. The PWM device channel #0 is configured with only required device bindings.
In this case, the qpnp-pwm driver does not configure any mode by default.
2. The qpnp-pwm driver configures PWM device channel #1 with PWM feature
configuration, but does not enable the channel since "qcom,mode-select" binding
is not specified in the devicetree.
3. Both the PWM and LPG configurations are provided for PWM device channel #4.
The qpnp-pwm driver configures both the modes, but enables PWM mode at the probe
time. It also sets the channel owner information for the channel.
4. This configuration is pretty similar to #2 above except in this case channel
#3 is configured for PWM mode. Also it's DTEST3 line is configured to output
LPG OUT low.
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QTI CPR (Core Power Reduction) Regulator
CPR regulator device is for QTI RBCPR (RapidBridge CPR) on
application processor core. It takes voltage corner level
as input and converts it to actual voltage based on the
suggestions from factory production process. When CPR is
enabled for application processer core, it will suggest
scaling the voltage up or down for best performance and
power of the core. The scaling based on factory production
process is called PVS (Process Voltage Scaling) with efuse
bits to indicate what bin (and voltage range) a chip is in.
Required properties:
- compatible: Must be "qcom,cpr-regulator"
- reg: Register addresses for RBCPR, RBCPR clock
select, PVS and CPR eFuse address
- reg-names: Register names. Must be "rbcpr" and "efuse_addr".
"rbcpr_clk" is optional.
- regulator-name: A string used to describe the regulator
- interrupts: Interrupt line from RBCPR to interrupt controller.
- qcom,cpr-fuse-corners: Number of fuse corners present. Many other properties
are sized based upon this value.
- regulator-min-microvolt: Minimum corner value which should be 1 to
represent the lowest supported corner.
- regulator-max-microvolt: Maximum corner value which should be equal to
qcom,cpr-fuse-corners if consumers request fuse
corners or the length of qcom,cpr-corner-map if
consumers request virtual corners.
- qcom,cpr-voltage-ceiling: Array of ceiling voltages in microvolts for fuse
corners ordered from lowest voltage corner to highest
voltage corner. This property must be of length
defined by qcom,cpr-fuse-corners.
- qcom,cpr-voltage-floor: Array of floor voltages in microvolts for fuse
corners ordered from lowest voltage corner to highest
voltage corner. This property must be of length
defined by qcom,cpr-fuse-corners.
- vdd-apc-supply: Regulator to supply VDD APC power
- qcom,vdd-apc-step-up-limit: Limit of vdd-apc-supply steps for scaling up.
- qcom,vdd-apc-step-down-limit: Limit of vdd-apc-supply steps for scaling down.
- qcom,cpr-ref-clk: The reference clock in kHz.
- qcom,cpr-timer-delay: The delay in microseconds for the timer interval.
- qcom,cpr-timer-cons-up: Consecutive number of timer interval (qcom,cpr-timer-delay)
occurred before issuing UP interrupt.
- qcom,cpr-timer-cons-down: Consecutive number of timer interval (qcom,cpr-timer-delay)
occurred before issuing DOWN interrupt.
- qcom,cpr-irq-line: Internal interrupt route signal of RBCPR, one of 0, 1 or 2.
- qcom,cpr-step-quotient: Defines the number of CPR quotient (i.e. Ring Oscillator(RO)
count) per vdd-apc-supply output voltage step. A single
integer value may be specified which is to be used for all
RO's. Alternatively, 8 integer values may be specified which
define the step quotients for RO0 to RO7 in order.
- qcom,cpr-up-threshold: The threshold for CPR to issue interrupt when
error_steps is greater than it when stepping up.
- qcom,cpr-down-threshold: The threshold for CPR to issue interrupt when
error_steps is greater than it when stepping down.
- qcom,cpr-idle-clocks: Idle clock cycles RO can be in.
- qcom,cpr-gcnt-time: The time for gate count in microseconds.
- qcom,cpr-apc-volt-step: The voltage in microvolt per CPR step, such as 5000uV.
- qcom,cpr-fuse-row: Array of row number of CPR fuse and method to read that row. It should have
index and value like this:
[0] => the fuse row number
[1] => fuse reading method, 0 for direct reading or 1 for SCM reading
- qcom,cpr-fuse-target-quot: Array of bit positions in the primary CPR fuse row defined
by qcom,cpr-fuse-row for the target quotients of each
fuse corner. Each bit position corresponds to the LSB
of the quotient parameter. The elements in the array
are ordered from lowest voltage corner to highest voltage
corner. This property must be of length defined by
qcom,cpr-fuse-corners.
- qcom,cpr-fuse-ro-sel: Array of bit positions in the primary CPR fuse row defined
by qcom,cpr-fuse-row for the ring oscillator selection for each
fuse corner. Each bit position corresponds to the LSB
of the RO select parameter. The elements in the array
are ordered from lowest voltage corner to highest voltage
corner. This property must be of length defined by
qcom,cpr-fuse-corners.
Optional properties:
- vdd-mx-supply: Regulator to supply memory power as dependency
of VDD APC.
- qcom,vdd-mx-vmax: The maximum voltage in uV for vdd-mx-supply. This
is required when vdd-mx-supply is present.
- qcom,vdd-mx-vmin-method: The method to determine the minimum voltage for
vdd-mx-supply, which can be one of following
choices compared with VDD APC:
0 => equal to the voltage(vmin) of VDD APC
1 => equal to PVS corner ceiling voltage
2 => equal to slow speed corner ceiling
3 => equal to qcom,vdd-mx-vmax
4 => equal to VDD_APC fuse corner mapped vdd-mx voltage
5 => equal to VDD_APC virtual corner mapped vdd-mx voltage
This is required when vdd-mx-supply is present.
- qcom,vdd-mx-corner-map: Array of integers which defines the mapping from VDD_APC
voltage corners to vdd-mx-supply voltages.
Each element is a voltage to request from vdd-mx for the
corresponding fuse corner or virtual corner. The elements
in the array are ordered from lowest voltage corner
to highest voltage corner. The length of this property
depends on the value of qcom,vdd-mx-vmin-method property.
When qcom,vdd-mx-vmin-method property has a value of 4, the length
of this property must be equal to the value defined by qcom,cpr-fuse-corners.
When qcom,vdd-mx-vmin-method property has a value of 5, the length of
this property must be equal to the number of elements in the qcom,cpr-corner-map
property.
- qcom,pvs-voltage-table: Array of N-tuples in which each tuple specifies the
initial voltage in microvolts of the PVS bin for each
fuse voltage corner. The location or 0-based index
of a tuple in the list corresponds to the PVS bin number.
Each tuple must be of length defined by qcom,cpr-fuse-corners.
A given cpr-regulator device must have either
qcom,pvs-voltage-table specified or
qcom,cpr-fuse-init-voltage (and its associated properties).
- qcom,pvs-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the redundant PVS fuse bits would be
used instead of the original bits and method to read fuse row, reading
register through SCM or directly. The 5 elements with index [0..4] are:
[0] => the fuse row number of the selector
[1] => LSB bit position of the bits
[2] => number of bits
[3] => the value to indicate redundant selection
[4] => fuse reading method, 0 for direct reading or 1 for SCM reading
When the value of the fuse bits specified by first 3 elements equals to
the value in 4th element, redundant PVS fuse bits should be selected.
Otherwise, the original PVS bits should be selected. If the 5th
element is 0, read the fuse row from register directly. Otherwise,
read it through SCM.
This property is required if qcom,pvs-voltage-table is present.
- qcom,pvs-fuse: Array of 4 elements to indicate the bits for PVS fuse and read method.
The array should have index and value like this:
[0] => the PVS fuse row number
[1] => LSB bit position of the bits
[2] => number of bits
[3] => fuse reading method, 0 for direct reading or 1 for SCM reading
This property is required if qcom,pvs-voltage-table is present.
- qcom,pvs-fuse-redun: Array of 4 elements to indicate the bits for redundant PVS fuse.
The array should have index and value like this:
[0] => the redundant PVS fuse row number
[1] => LSB bit position of the bits
[2] => number of bits
[3] => fuse reading method, 0 for direct reading or 1 for SCM reading
This property is required if qcom,pvs-voltage-table is present.
- qcom,cpr-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the redundant CPR fuse bits would be
used instead of the original bits and method to read fuse row, using SCM
to read or read register directly. The 5 elements with index [0..4] are:
[0] => the fuse row number of the selector
[1] => LSB bit position of the bits
[2] => number of bits
[3] => the value to indicate redundant selection
[4] => fuse reading method, 0 for direct reading or 1 for SCM reading
When the value of the fuse bits specified by first 3 elements equals to
the value in 4th element, redundant CPR fuse bits should be selected.
Otherwise, the original CPR bits should be selected. If the 5th element
is 0, read the fuse row from register directly. Otherwise, read it through
SCM.
- qcom,cpr-fuse-redun-row: Array of row number of redundant CPR fuse and method to read that
row. It should have index and value like this:
[0] => the redundant fuse row number
[1] => the value to indicate reading the fuse row directly or using SCM
This property is required if qcom,cpr-fuse-redun-sel is present.
- qcom,cpr-fuse-redun-target-quot: Array of bit positions in the redundant CPR fuse row defined
by qcom,cpr-fuse-redun-row for the target quotients of each
fuse corner. Each bit position corresponds to the LSB
of the quotient parameter. The elements in the array
are ordered from lowest voltage corner to highest voltage corner.
This property must be of length defined by qcom,cpr-fuse-corners.
This property is required if qcom,cpr-fuse-redun-sel is present.
- qcom,cpr-fuse-redun-ro-sel: Array of bit positions in the redundant CPR fuse row defined
by qcom,cpr-fuse-redun-row for the ring oscillator select of each
fuse corner. Each bit position corresponds to the LSB of the RO
select parameter. The elements in the array are ordered from
lowest voltage corner to highest voltage corner.
This property must be of length defined by qcom,cpr-fuse-corners.
This property is required if qcom,cpr-fuse-redun-sel is present.
- qcom,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
- qcom,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
This property is required if cpr-fuse-redun-bp-cpr-disable
is present, and vise versa.
- qcom,cpr-fuse-bp-cpr-disable: Bit position of the bit to indicate if CPR should be disabled
- qcom,cpr-fuse-bp-scheme: Bit position of the bit to indicate if it's a global/local scheme
- qcom,cpr-fuse-revision: Array of 4 integer elements which define the location of the bits for
the CPR fusing revision fuse parameter. The 4 elements are:
[0]: => the fuse row number of the bits
[1]: => LSB bit position of the bits
[2]: => the number of bits
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
The fusing revision value is used to determine which specific adjustments
are required on some chips.
- qcom,cpr-fuse-target-quot-size: Array of target quotient parameter bit sizes in the primary
or redundant CPR fuse row for each fuse corner. The elements in the
array are ordered from lowest voltage corner to highest voltage corner.
If this property is not present, then all target quotient fuse values
are assumed to be the default length of 12 bits.
- qcom,cpr-fuse-target-quot-scale: Array of doubles which defines the scaling coefficients to decode
the target quotients of each fuse corner. The first element in each
double represents the offset to add to the scaled quotient. The second
element represents the multiplier to scale the quotient by. For example,
given a tuple <A B>, quot_decoded = A + (B * quot_raw).
The doubles in the array are ordered from lowest voltage corner to highest
voltage corner. This property must contain a number of doubles equal to
the value of qcom,cpr-fuse-corners. If this property is not present,
then all target quotient parameters are assumed to have an offset of 0
and a multiplier of 1 (i.e. no decoding needed).
- qcom,cpr-enable: Present: CPR enabled by default.
Not Present: CPR disable by default.
- qcom,cpr-fuse-cond-min-volt-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to decide if the conditional minimum apc voltage needs
to be applied and the fuse reading method.
The 5 elements with index[0..4] are:
[0] => the fuse row number;
[1] => LSB bit position of the bits;
[2] => number of the bits;
[3] => the expected data to read;
[4] => fuse reading method, 0 for direct reading or 1 for SCM reading;
When the value of the fuse bits specified by first 3 elements is not equal to
the value in 4th element, then set the apc voltage for all parts running
at each voltage corner to be not lower than the voltage defined
using "qcom,cpr-cond-min-voltage".
- qcom,cpr-cond-min-voltage: Minimum voltage in microvolts allowed for cpr-regulator output if the fuse bits
defined in qcom,cpr-fuse-cond-min-volt-sel have not been programmed with the
expected data. This is required if cpr-fuse-cond-min-volt-sel is present.
- qcom,cpr-fuse-uplift-sel: Array of 5 elements to indicate where to read the bits, what value to
compare with in order to enable or disable the pvs voltage uplift workaround,
and the fuse reading method.
The 5 elements with index[0..4] are:
[0]: => the fuse row number of the selector;
[1]: => LSB bit position of the bits;
[2]: => number of the bits;
[3]: => the value to indicate if the apc pvs voltage uplift workaround will
be enabled;
[4]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
When the value of the fuse bits specified by first 3 elements equals to the
value in 4th element, the pvs voltage uplift workaround will be enabled.
- qcom,speed-bin-fuse-sel: Array of 4 elements to indicate where to read the speed bin of the processor,
and the fuse reading method.
The 4 elements with index[0..3] are:
[0]: => the fuse row number of the selector;
[1]: => LSB bit position of the bits;
[2]: => number of the bits;
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
This is required if cpr-fuse-uplift-disable-sel is present.
- qcom,cpr-uplift-voltage: Uplift in microvolts used for increasing pvs init voltage. If this property is present,
This is required if cpr-fuse-uplift-disable-sel is present.
- qcom,cpr-uplift-max-volt: Maximum voltage in microvolts used for pvs voltage uplift workaround to limit
the maximum pvs voltage.
This is required if cpr-fuse-uplift-disable-sel is present.
- qcom,cpr-uplift-quotient: Array of target quotient increments to add to the fused quotients of each
fuse corner as part of the PVS voltage uplift workaround.
The elements in the array are ordered from lowest voltage
corner to highest voltage corner. This property must be of
length defined by qcom,cpr-fuse-corners. This is required
if cpr-fuse-uplift-disable-sel is present.
- qcom,cpr-uplift-speed-bin: The speed bin value corresponding to one type of processor which needs to apply the
pvs voltage uplift workaround.
This is required if cpr-fuse-uplift-disable-sel is present.
- qcom,cpr-fuse-version-map: Array of integer tuples which each match to a given combination of CPR
fuse parameter values. Each tuple consists of N + 3 elements. Where
N is the number of fuse corners defined by the qcom,cpr-fuse-corners
property. The elements in one tuple are:
[0]: => the speed bin of the CPU
[1]: => the PVS version of the CPU
[2]: => the CPR fuse revision
[3 - N+2]: => the ring oscillator select value of each fuse corner
ordered from lowest to highest
Any element in a tuple may use the value 0xffffffff as a wildcard
which will match against any fuse parameter value. The first tuple
that matches against the fuse values read from hardware will be used.
This property is used by several properties to provide an index into
their lists.
- qcom,cpr-allowed: Integer values that specifies whether the closed loop CPR is allowed or
not for a particular fuse revision. If the qcom,cpr-fuse-version-map
property is specified, then qcom,cpr-allowed must contain the same number
of integers as that of the number of tuples in qcom,cpr-fuse-version-map.
If the integer value has a value 0 for a particular fuse revision, then it
is treated as if the closed loop operation is disabled in the fuse. If the
integer value has a value 1 for a particular fuse revision, then the closed
loop operation is enabled for that fuse revision. If nothing is specified
for a particular fuse revision, then the closed loop operation is enabled
for that fuse revision by default.
- qcom,cpr-quotient-adjustment: Array of integer tuples of target quotient adjustments to add to the fused
quotients of each fuse corner. The elements in a tuple are ordered from
lowest voltage corner to highest voltage corner. Each tuple must be of
length defined by qcom,cpr-fuse-corners. If the qcom,cpr-fuse-version-map
property is specified, then qcom,cpr-quotient-adjustment must contain the
same number of tuples as qcom,cpr-fuse-version-map. These tuples are then
mapped one-to-one in the order specified. E.g. if the second
qcom,cpr-fuse-version-map tuple matches for a given device, then the quotient
adjustments defined in the second qcom,cpr-quotient-adjustment tuple will
be applied. If the qcom,cpr-fuse-version-map property is not specified,
then qcom,cpr-quotient-adjustment must contain a single tuple which is then
applied unconditionally. If this property is specified, then the quotient
adjustment values are added to the target quotient values read from fuses
before writing them into the CPR GCNT target control registers.
This property can be used to add or subtract static voltage margin from the
regulator managed by the CPR controller.
- qcom,cpr-init-voltage-adjustment: Array of integer tuples of initial voltage adjustments in microvolts to
add to the fused initial voltage values of each fuse corner. The elements
in a tuple are ordered from lowest voltage corner to highest voltage corner.
Each tuple must be of the length defined by qcom,cpr-fuse-corners. If the
qcom,cpr-fuse-version-map property is specified, then
qcom,cpr-init-voltage-adjustment must contain the same number of tuples as
qcom,cpr-fuse-version-map. These tuples are then mapped one-to-one in the
order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
for a given device, then the initial voltage adjustments defined in the
second qcom,cpr-init-voltage-adjustment tuple will be applied. If the
qcom,cpr-fuse-version-map property is not specified, then
qcom,cpr-init-voltage-adjustment must contain a single tuple which is then
applied unconditionally. This property can be used to add or subtract
static initial voltage margin from the regulator managed by the CPR
controller.
- qcom,cpr-quot-offset-adjustment: Array of integer tuples of target quotient offset adjustments to add
to the fused quotient offsets of each fuse corner. The elements in a tuple
are ordered from lowest voltage corner to highest voltage corner. Each tuple
must be of length defined by qcom,cpr-fuse-corners. If the qcom,cpr-fuse-version-map
property is specified, then qcom,cpr-quot-offset-adjustment must contain the
same number of tuples as qcom,cpr-fuse-version-map. These tuples are then
mapped one-to-one in the order specified. E.g. if the second
qcom,cpr-fuse-version-map tuple matches for a given device, then the quotient
offset adjustments defined in the second qcom,cpr-quot-offset-adjustment tuple
will be applied. If the qcom,cpr-fuse-version-map property is not specified,
then qcom,cpr-quot-offset-adjustment must contain a single tuple which is then
applied unconditionally. If this property is specified, then the quotient
offset adjustment values are added to the target quotient offset values read
from fuses.
This property can be used to add or subtract static quotient offset margin from
the regulator managed by the CPR controller.
- qcom,cpr-clamp-timer-interval: The number of 64 reference clock cycle blocks to delay for whenever
the clamp signal, sensor mask registers or sensor bypass registers
change. The CPR controller loop is disabled during this delay.
Supported values are 0 to 255. If this property is not specified,
then a value of 0 is assumed. Note that if this property has a
value greater than 0, then software cannot accurately determine the
error_steps value that corresponds to a given CPR measurement
unless processor power collapsing is disabled. If this property
has a value of 0, then the CPR controller loop is not disabled and
re-enabled while idle if the clamp signal changes. Instead, it
will remain idle until software issues an ACK or NACK command.
This ensures that software can read the error_steps value which
resulted in the CPR up or down interrupt. Setting this property to
a value greater than 0 is useful for resetting the CPR sensors of a
processor that uses BHS type voltage switches in order to avoid
anomalous CPR up interrupts when exiting from power collapse.
- vdd-apc-optional-prim-supply: Present: Regulator of highest priority to supply VDD APC power
Not Present: No such regulator.
- vdd-apc-optional-sec-supply: Present: Regulator of second highest priority to supply VDD APC power.
Not Present: No such regulator.
- qcom,cpr-speed-bin-max-corners: Array of (N+2)-tuples in which each tuple maps a CPU speed bin and PVS version to
the maximum virtual voltage corner corresponding to each fuse corner. The value N
corresponds to the number of fuse corners specified by qcom,cpr-fuse-corners.
The elements in one tuple are:
[0]: => the speed bin of the CPU. It may use the value 0xffffffff as a
wildcard to match any speed bin values.
[1]: => the PVS version of the CPU. It may use the value 0xffffffff as
a wildcard to match any PVS version values.
[2 - N+1]: => the max virtual voltage corner value corresponding to each fuse corner
for this speed bin, ordered from lowest voltage corner to highest
voltage corner.
No CPR target quotient scaling is applied on chips which have a speed bin + PVS version
pair that does not appear in one of the tuples in this property. If the property is
specified, then quotient scaling is enabled for the highest voltage corner. If this property is
not specified, then no quotient scaling can take place.
- qcom,cpr-corner-map: Array of elements of fuse corner value for each virtual corner.
The location or 1-based index of an element in the list corresponds to
the virtual corner value. For example, the first element in the list is the fuse corner
value that virtual corner 1 maps to.
This property is required if qcom,cpr-speed-bin-max-corners is present.
- qcom,cpr-corner-frequency-map: Array of tuples in which a tuple describes a corner to application processor frequency
mapping.
The 2 elements in one tuple are:
[0]: => a virtual voltage corner.
[1]: => the application processor frequency in Hz corresponding to the virtual corner.
This property is required if qcom,cpr-speed-bin-max-corners is present.
- qcom,pvs-version-fuse-sel: Array of 4 elements to indicate where to read the pvs version of the processor,
and the fuse reading method.
The 4 elements with index[0..3] are:
[0]: => the fuse row number of the selector;
[1]: => LSB bit position of the bits;
[2]: => the number of bits;
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
- qcom,cpr-voltage-ceiling-override: Array of (N+2)-tuples in which each tuple maps a CPU speed bin and PVS version
to the ceiling voltage to apply for each virtual voltage corner. The value N
corresponds to the number of virtual corners as specified by the number of elements
in the qcom,cpr-corner-map property.
The elements in one tuple are:
[0]: => the speed bin of the CPU. It may use the value 0xffffffff as a
wildcard to match any speed bin values.
[1]: => the PVS version of the CPU. It may use the value 0xffffffff as a
wildcard to match any PVS version values.
[2 - N+1]: => the ceiling voltage value in microvolts corresponding to each virtual
corner for this speed bin, ordered from lowest voltage corner to
highest voltage corner.
No ceiling override is applied on chips which have a speed bin + PVS version
pair that does not appear in one of the tuples in this property. If the property is
specified and the speed bin + PVS version matches, then the per-virtual-corner ceiling
voltages will be used in place of the per-fuse-corner ceiling voltages defined in the
qcom,cpr-voltage-ceiling property. If this property is not specified, then the
per-fuse-corner ceiling voltages will always be used.
- qcom,cpr-voltage-floor-override: Array of (N+2)-tuples in which each tuple maps a CPU speed bin and PVS version
to the floor voltage to apply for each virtual voltage corner. The value N
corresponds to the number of virtual corners as specified by the number of elements
in the qcom,cpr-corner-map property.
The elements in one tuple are:
[0]: => the speed bin of the CPU. It may use the value 0xffffffff as a
wildcard to match any speed bin values.
[1]: => the PVS version of the CPU. It may use the value 0xffffffff as a
wildcard to match any PVS version values.
[2 - N+1]: => the floor voltage value in microvolts corresponding to each virtual
corner for this speed bin, ordered from lowest voltage corner to
highest voltage corner.
No floor override is applied on chips which have a speed bin + PVS version
pair that does not appear in one of the tuples in this property. If the property is
specified and the speed bin + PVS version matches, then the per-virtual-corner floor
voltages will be used in place of the per-fuse-corner floor voltages defined in the
qcom,cpr-voltage-floor property. If this property is not specified, then the
per-fuse-corner floor voltages will always be used.
- qcom,cpr-floor-to-ceiling-max-range: Array of integer tuples of floor-to-ceiling max range values in microvolts
to be subtracted from the ceiling voltage values of each virtual corner.
Supported values are those greater than or equal 0, or (-1). The value 0 for a corner
implies that the floor value for that corner has to equal to its ceiling value.
The value (-1) for a corner implies that no modification to the default floor voltage
is required. The elements in a tuple are ordered from lowest voltage corner to highest
voltage corner. Each tuple must be of the length equal to the number of virtual corners
as specified by the number of elements in the qcom,cpr-corner-map property. If the
qcom,cpr-fuse-version-map property is specified, then
qcom,cpr-dynamic-floor-override-adjustment must contain the same number of
tuples as qcom,cpr-fuse-version-map. These tuples are then mapped one-to-one in the
order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
for a given device, then voltage adjustments defined in the second
qcom,cpr-dynamic-floor-override-adjustment tuple will be applied. If the
qcom,cpr-fuse-version-map property is not specified, then
qcom,cpr-dynamic-floor-override-adjustment must contain a single tuple which
is then applied unconditionally.
- qcom,cpr-virtual-corner-init-voltage-adjustment: Array of integer tuples of voltage adjustments in microvolts to be
added to the initial voltage values of each virtual corner. The elements
in a tuple are ordered from lowest voltage corner to highest voltage corner.
Each tuple must be of the length equal to the number of virtual corners as
specified by the number of elements in the qcom,cpr-corner-map property. If the
qcom,cpr-fuse-version-map property is specified, then
qcom,cpr-virtual-corner-init-voltage-adjustment must contain the same number of
tuples as qcom,cpr-fuse-version-map. These tuples are then mapped one-to-one in the
order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
for a given device, then voltage adjustments defined in the second
qcom,cpr-virtual-corner-init-voltage-adjustment tuple will be applied. If the
qcom,cpr-fuse-version-map property is not specified, then
qcom,cpr-virtual-corner-init-voltage-adjustment must contain a single tuple which
is then applied unconditionally.
- qcom,cpr-virtual-corner-quotient-adjustment: Array of integer tuples of quotient offsets to be added to
the scaled target quotient of each virtual corner. The elements
in a tuple are ordered from lowest voltage corner to highest voltage corner.
Each tuple must be of the length equal to the number of virtual corners as
specified by the number of elements in the qcom,cpr-corner-map property.
If the qcom,cpr-fuse-version-map property is specified, then
qcom,cpr-virtual-corner-quotient-adjustment must contain the same number of tuples as
qcom,cpr-fuse-version-map. These tuples are then mapped one-to-one in the
order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
for a given device, then quotient adjustments defined in the second
qcom,cpr-virtual-corner-quotient-adjustment tuple will be applied. If the
qcom,cpr-fuse-version-map property is not specified, then
qcom,cpr-virtual-corner-quotient-adjustment must contain a single tuple which is then
applied unconditionally.
- qcom,cpr-cpus: Array of CPU phandles which correspond to the cores that this cpr-regulator
device must monitor when adjusting the voltage and/or target quotient based
upon the number of online cores or make sure that one of them must be online
when performing de-aging measurements. This property must be specified in order to
utilize the qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment or
qcom,cpr-online-cpu-virtual-corner-quotient-adjustment or qcom,cpr-aging-sensor-id properties.
- qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment: Array of tuples where each tuple specifies
the voltage adjustment for each corner. These adjustments apply to the
initial voltage of each corner. The size of each tuple must be equal
to qcom,cpr-fuse-corners if consumers request fuse corners or the length of
qcom,cpr-corner-map if consumers request virtual corners. In each tuple, the
value corresponds to the voltage adjustment when running at that corner at
init, from lowest to highest. The tuples must be organized into 1 group if
qcom,cpr-fuse-version-map is not specified or the same number of groups as
the number of tuples in qcom,cpr-fuse-version-map. The i-th group of tuples
corresponds to the voltage adjustments for i-th fuse version map tuple. In
each group, there are 1 plus length of qcom,cpr-cpus tuples, each tuple
corresponds to the number of cores online, from 0 to the number of elements
in qcom,cpr-cpus.
- qcom,cpr-online-cpu-init-voltage-as-ceiling: Boolean which indicates that the ceiling voltage used for a
given virtual corner may be reduced to the per number of cores online,
per-virtual corner ceiling voltage value. This property takes precedence
over qcom,cpr-scaled-init-voltage-as-ceiling if both are specified.
- qcom,cpr-online-cpu-virtual-corner-quotient-adjustment: Array of tuples where each tuple specifies
the quotient adjustment for each corner. These adjustments will be applied
to each corner at run time. The size of each tuple must be equal to
qcom,cpr-fuse-corners if consumers request fuse corners or the length of
qcom,cpr-corner-map if consumers request virtual corners. In each tuple,
the value corresponds to the quotient adjustment when running at that corner,
from lowest to highest. The tuples must be organized into 1 group if
qcom,cpr-fuse-version-map is not specified or the same number of groups
as the number of tuples in qcom,cpr-fuse-version-map. The i-th group of
tuples corresponds to the quotient adjustments for i-th fuse version map
tuple. In each group, there are 1 plus length of qcom,cpr-cpus tuples,
each tuple corresponds to the number of cores online, from 0 to the
number of elements in qcom,cpr-cpus.
- qcom,cpr-init-voltage-as-ceiling: Boolean which indicates that the ceiling voltage used for a given virtual
corner may be reduced to the per-fuse-corner initial voltage fuse value.
- qcom,cpr-scaled-init-voltage-as-ceiling: Boolean which indicates that the ceiling voltage used for a given
virtual corner may be reduced to the interpolated, per-virtual-corner initial
voltage value. Note that if both qcom,cpr-init-voltage-as-ceiling and
qcom,cpr-scaled-init-voltage-as-ceiling are specified, then
qcom,cpr-scaled-init-voltage-as-ceiling will take precedence since the interpolated
voltages are necessarily less than or equal to the fused initial voltage values.
- qcom,cpr-voltage-scaling-factor-max: Array of values which define the maximum allowed scaling factor to apply
when calculating per-corner initial voltage values for each fuse corner. The
array must be of length equal to the value of the qcom,cpr-fuse-corners property.
Each element in the array maps to the fuse corners in increasing order.
The elements have units of uV/MHz. Each element corresponds to 'max_factor' in
the following equation:
init_voltage_min(f) = fuse_init_voltage(f) - (fuse_f_max - f) * max_factor
If this property is not specified, then the initial voltage for each virtual
corner will be set to the initial voltage of the associated fuse corner.
- qcom,cpr-quot-adjust-scaling-factor-max: Array of values which define the maximum allowed scaling factor to
apply when calculating per-virtual-corner target quotients for each fuse
corner. Two data formats are allowed for this property. The primary one
requires that the array be of length equal to the value of the
qcom,cpr-fuse-corners property. When using this format, each element in the
array maps to the fuse corners in increasing order. The second depreciated
format allows for only a single element to be specified which defines the
maximum scaling factor for the highest fuse corner. In this case, a value of
0 is assumed for the lower fuse corners. The elements of this property have
units of QUOT/GHz. Each element corresponds to 'max_factor' in the following
equation:
quot_min(f) = fuse_quot(f) - (fuse_f_max - f) * max_factor / 1000
where f and fuse_f_max have units of MHz.
This property is required if qcom,cpr-speed-bin-max-corners is present.
- qcom,cpr-fuse-init-voltage: Array of quadruples in which each quadruple specifies a fuse location to
read in order to get an initial voltage for a fuse corner. The fuse values
are encoded as voltage steps higher or lower than the voltages defined in
qcom,cpr-voltage-ceiling. Each step corresponds to the voltage defined by
the qcom,cpr-init-voltage-step property.
The 4 elements in one quadruple are:
[0]: => the fuse row number of the bits
[1]: => LSB bit position of the bits
[2]: => number of the bits
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
The quadruples are ordered from the lowest voltage fuse corner to the
highest voltage fuse corner.
A given cpr-regulator device must have either qcom,cpr-fuse-init-voltage
specified or qcom,pvs-voltage-table (and its associated properties).
- qcom,cpr-fuse-redun-init-voltage: Array of quadruples in which each quadruple specifies a fuse location
to read in order to get the redundant initial voltage for a fuse corner.
This property is the same as qcom,cpr-fuse-init-voltage except that it is
only utilized if a chip is configured to use the redundant set of fuse
values. This property is required if qcom,cpr-fuse-redun-sel and
qcom,cpr-fuse-init-voltage are specified.
- qcom,cpr-init-voltage-ref: Array of reference voltages in microvolts used when decoding the initial
voltage fuse values. The elements in the array are ordered from lowest
voltage corner to highest voltage corner. This property must be of length
defined by qcom,cpr-fuse-corners.
This property is required if qcom,cpr-fuse-init-voltage is present.
- qcom,cpr-init-voltage-step: The voltage step size in microvolts of the CPR initial voltage fuses described by the
qcom,cpr-fuse-init-voltage property.
This property is required if qcom,cpr-fuse-init-voltage is present.
- mem-acc-supply: Regulator to vote for the memory accelerator configuration.
Not Present: memory accelerator configuration not supported.
- qcom,mem-acc-corner-map: Array of integer which defines the mapping from mem-acc corner value for each
virtual corner. Each element is a mem-acc state for the corresponding virtual corner.
The elements in the array are ordered from lowest voltage corner to highest voltage corner.
- qcom,fuse-remap-source: Array of quadruples in which each quadruple specifies a fuse location to
remap. The 4 elements in one quadruple are:
[0]: => the fuse row number of the bits
[1]: => LSB bit position of the bits
[2]: => the number of bits
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
The fuse bits for all quadruples are packed together in the order specified
into 64-bit virtual fuse rows beginning at the row number defined in the
qcom,fuse-remap-base-row property. The remapped rows may be used by any
other properties.
Example:
qcom,fuse-remap-base-row = <1000>;
qcom,fuse-remap-source =
<13 57 2 0>,
<14 30 3 0>,
<20 1 7 0>,
<40 47 120 0>;
This results in the following bit remapping:
Row Bits Remap Row Remap Bits
13 57..58 --> 1000 0..1
14 30..32 --> 1000 2..4
20 1..7 --> 1000 5..11
40 47..63 --> 1000 12..28
41 0..34 --> 1000 29..63
41 35..63 --> 1001 0..28
42 0..34 --> 1001 29..63
42 35..38 --> 1002 0..3
A tuple like this could then be used to reference some of the
concatenated bits from rows 13, 14, and 20:
qcom,cpr-fuse-init-voltage = <1000 0 6 0>;
- qcom,fuse-remap-base-row: Integer which defines the virtual row number to use as a base when remapping
fuse bits. The remap base row number can be any value as long as it is
greater than all of the real row numbers addressed in other properties of
the cpr-regulator device node. This property is required if
qcom,fuse-remap-source is specified.
- qcom,cpr-quot-min-diff: Integer which defines the minimum target-quotient difference between
the highest and (highest - 1) fuse corner to keep CPR enabled. If this
property is not specified a default value of 50 is used.
- qcom,cpr-fuse-quot-offset: Array of quadruples in which each quadruple specifies a fuse location to
read in order to get the quotient offset for a fuse corner. The fuse values
are encoded as the difference between quotients of that fuse corner and its
adjacent lower fuse corner divided by an unpacking multiplier value defined
under qcom,cpr-fuse-quot-offset-scale property.
The 4 elements in one quadruple are:
[0]: => the fuse row number of the bits
[1]: => LSB bit position of the bits
[2]: => number of the bits
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
The quadruples are ordered from the lowest fuse corner to the highest
fuse corner.
Quotient offset read from the fuse locations above can be overridden with
the property qcom,cpr-quot-adjust-scaling-factor-max.
- qcom,cpr-fuse-quot-offset-scale: Array of integer values which defines the multipliers to decode the quotient offsets
of each fuse corner. The elements in the array are ordered from the lowest voltage fuse corner
to the highest voltage fuse corner. If this property is not present, then all target quotient
parameters are assumed to have a multiplier of 1 (i.e. no decoding needed).
- qcom,cpr-redun-fuse-quot-offset: Array of quadruples in which each quadruple specifies a fuse location to
read in order to get the redundant quotient offset for a fuse corner. This
property is the same as qcom,cpr-fuse-quot-offset except that it is only
utilized if a chip is configured to use the redundant set of fuse values.
- qcom,cpr-fuse-min-quot-diff: Array of values which define the minimum difference allowed between the adjusted
quotients of the fuse corners. The length of the array should be equal to the value
of the qcom,cpr-fuse-corners property. Where each element in the array maps to the
fuse corners in increasing order.
- qcom,cpr-min-quot-diff-adjustment: Array of integer tuples of target quotient offsets to be added to
the adjusted target quotients of each fuse corner. When the quotient difference
between two adjacent fuse corners is insufficient, the quotient for the higher fuse corner is
replaced with that of the lower fuse corner plus the adjustment value.
The elements in a tuple are ordered from lowest voltage corner to highest voltage corner.
Each tuple must be of the length defined by qcom,cpr-fuse-corners.
If the qcom,cpr-fuse-version-map property is specified, then qcom,cpr-min-quot-diff-adjustment
must contain the same number of tuples as qcom,cpr-fuse-version-map. These tuples are then mapped
one-to-one in the order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
for a given device, then the quotient adjustments defined in the
second qcom,cpr-min-quot-diff-adjustment tuple will be applied. If the
qcom,cpr-fuse-version-map property is not specified, then
qcom,cpr-min-quot-diff-adjustment must contain a single tuple which is then
applied unconditionally. The qcom,cpr-min-quot-diff-adjustment property must be specified
if the qcom,cpr-fuse-min-quot-diff property is specified.
- qcom,cpr-skip-voltage-change-during-suspend: Boolean property which indicates that the CPR voltage
should not be adjusted based upon the number of online cores while
entering or exiting system suspend.
- rpm-apc-supply: Regulator to notify RPM of the APC operating
corner
- qcom,rpm-apc-corner-map: Array of integers which define the mapping of
the RPM corner to the corresponding APC virtual
corner. This property must be defined if
'rpm-apc-supply' is present.
- qcom,vsens-corner-map: Array of integers which define the mapping of the VSENS corner to the
corresponding APC fuse corner. The qcom,vsens-corner-map and
vdd-vsense-corner-supply properties must both be specified for a given
cpr-regulator device or neither must be specified.
- vdd-vsens-corner-supply: Regulator to specify the current operating fuse corner to the Voltage Sensor.
- vdd-vsens-voltage-supply: Regulator to specify the corner floor/ceiling voltages to the Voltage Sensor.
- qcom,cpr-aging-sensor-id: Array of CPR sensor IDs to be used in the CPR de-aging algorithm. The number
of values should be equal to number of sensors selected for age calibration.
If this property is not specified, then the de-aging procedure is not enabled.
- qcom,cpr-de-aging-allowed: Integer values that specify whether the CPR de-aging procedure is allowed or
not for a particular fuse revision. If the qcom,cpr-fuse-version-map
property is specified, then qcom,cpr-de-aging-allowed must contain the same number
of elements as there are tuples in qcom,cpr-fuse-version-map. If qcom,cpr-fuse-version-map
is not specified, then qcom,cpr-de-aging-allowed must contain a single value that
is used unconditionally. An element value of 1 means that the CPR de-aging procedure
can be performed for parts with the corresponding fuse revision. An element value of 0
means that CPR de-aging cannot be performed.
This property is required if the qcom,cpr-aging-sensor-id property has been specified.
- qcom,cpr-aging-ref-corner: The vdd-apc-supply reference virtual voltage corner to be set during the CPR de-aging
measurements. This corner value is needed to set appropriate voltage on
the dependent voltage rails such as vdd-mx and mem-acc.
This property is required if the qcom,cpr-aging-sensor-id property has been specified.
- qcom,cpr-aging-ref-voltage: The vdd-apc-supply reference voltage in microvolts to be set during the
CPR de-aging measurements.
This property is required if the qcom,cpr-aging-sensor-id property has been specified.
- qcom,cpr-max-aging-margin: The maximum allowed aging voltage margin in microvolts. This is used to limit
the calculated aging voltage margin.
This property is required if the qcom,cpr-aging-sensor-id property has been specified.
- qcom,cpr-non-collapsible-sensors: Array of CPR sensor IDs which are in non-collapsible domain. The sensor IDs not
specified in the array should be bypassed for the de-aging procedure. The number of
elements should be less than or equal to 32. The values of the array elements should
be greater than or equal to 0 and less than or equal to 31.
This property is required for power-domains with bypass mux present in HW.
This property can be required if the qcom,cpr-aging-sensor-id property has been specified.
- qcom,cpr-aging-ro-scaling-factor: The aging ring oscillator (RO) scaling factor with units of QUOT/V.
This value is used for calculating a voltage margin from RO measurements.
This property is required if the qcom,cpr-aging-sensor-id property has been specified.
- qcom,cpr-ro-scaling-factor: Array of scaling factors with units of QUOT/V for each ring oscillator ordered
from the lowest to the highest RO. These values are used to calculate
the aging voltage margin adjustment for all of the ROs. Since CPR2 supports
exactly 8 ROs, the array must contain 8 elements corresponding to RO0 through RO7 in order.
If a given RO is unused for a fuse corner, then its scaling factor may be specified as 0.
This property is required if the qcom,cpr-aging-sensor-id property has been specified.
- qcom,cpr-aging-derate: Array of scaling factors which define the amount of derating to apply to the reference
aging voltage margin adjustment for each of the fuse corners. Each element has units
of uV/mV. This property must be of length defined by qcom,cpr-fuse-corners.
The elements are ordered from the lowest to the highest fuse corner.
This property is required if the qcom,cpr-aging-sensor-id property has been specified.
- qcom,cpr-fuse-aging-init-quot-diff: Array of quadruples in which each quadruple specifies a fuse location to read in
order to get an initial quotient difference. The difference between quot min and quot max
is fused as the initial quotient difference.
The 4 elements in one quadruple are:
[0]: => the fuse row number of the bits
[1]: => LSB bit position of the bits
[2]: => number of the bits
[3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
The number of quadruples should be equal to the number of values specified in
the qcom,cpr-aging-sensor-id property. This property is required if
the qcom,cpr-aging-sensor-id property has been specified.
Example:
apc_vreg_corner: regulator@f9018000 {
status = "okay";
compatible = "qcom,cpr-regulator";
reg = <0xf9018000 0x1000>, <0xfc4b8000 0x1000>;
reg-names = "rbcpr", "efuse_addr";
interrupts = <0 15 0>;
regulator-name = "apc_corner";
qcom,cpr-fuse-corners = <3>;
regulator-min-microvolt = <1>;
regulator-max-microvolt = <12>;
qcom,pvs-fuse = <22 6 5 1>;
qcom,pvs-fuse-redun-sel = <22 24 3 2 1>;
qcom,pvs-fuse-redun = <22 27 5 1>;
qcom,pvs-voltage-table =
<1050000 1150000 1350000>,
<1050000 1150000 1340000>,
<1050000 1150000 1330000>,
<1050000 1150000 1320000>,
<1050000 1150000 1310000>,
<1050000 1150000 1300000>,
<1050000 1150000 1290000>,
<1050000 1150000 1280000>,
<1050000 1150000 1270000>,
<1050000 1140000 1260000>,
<1050000 1130000 1250000>,
<1050000 1120000 1240000>,
<1050000 1110000 1230000>,
<1050000 1100000 1220000>,
<1050000 1090000 1210000>,
<1050000 1080000 1200000>,
<1050000 1070000 1190000>,
<1050000 1060000 1180000>,
<1050000 1050000 1170000>,
<1050000 1050000 1160000>,
<1050000 1050000 1150000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>,
<1050000 1050000 1140000>;
qcom,cpr-voltage-ceiling = <1050000 1150000 1280000>;
qcom,cpr-voltage-floor = <1050000 1050000 1100000>;
vdd-apc-supply = <&pm8226_s2>;
vdd-apc-optional-prim-supply = <&ncp6335d>;
vdd-apc-optional-sec-supply = <&fan53555>;
vdd-mx-supply = <&pm8226_l3_ao>;
qcom,vdd-mx-vmax = <1350000>;
qcom,vdd-mx-vmin-method = <1>;
qcom,vdd-apc-step-up-limit = <1>;
qcom,vdd-apc-step-down-limit = <1>;
qcom,cpr-ref-clk = <19200>;
qcom,cpr-timer-delay = <5000>;
qcom,cpr-timer-cons-up = <1>;
qcom,cpr-timer-cons-down = <2>;
qcom,cpr-irq-line = <0>;
qcom,cpr-step-quotient = <15>;
qcom,cpr-up-threshold = <1>;
qcom,cpr-down-threshold = <2>;
qcom,cpr-idle-clocks = <5>;
qcom,cpr-gcnt-time = <1>;
qcom,cpr-clamp-timer-interval = <1>;
qcom,cpr-apc-volt-step = <5000>;
qcom,vsens-corner-map = <1 2 2>;
vdd-vsens-corner-supply = <&vsens_apc0_corner>;
vdd-vsens-voltage-supply = <&vsens_apc0_voltage>;
rpm-apc-supply = <&rpm_apc_vreg>;
qcom,rpm-apc-corner-map = <4 4 5 5 7 7 7 7 7 7 7 7>;
qcom,cpr-fuse-row = <138 1>;
qcom,cpr-fuse-bp-cpr-disable = <36>;
qcom,cpr-fuse-bp-scheme = <37>;
qcom,cpr-fuse-target-quot = <24 12 0>;
qcom,cpr-fuse-target-quot-size = <12 12 12>;
qcom,cpr-fuse-ro-sel = <54 38 41>;
qcom,cpr-fuse-revision = <140 26 2 0>;
qcom,cpr-fuse-redun-sel = <138 57 1 1 1>;
qcom,cpr-fuse-redun-row = <139 1>;
qcom,cpr-fuse-redun-target-quot = <24 12 0>;
qcom,cpr-fuse-redun-ro-sel = <46 36 39>;
qcom,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
qcom,cpr-cond-min-voltage = <1140000>;
qcom,cpr-fuse-uplift-sel = <22 53 1 0 0>;
qcom,cpr-uplift-voltage = <50000>;
qcom,cpr-uplift-quotient = <0 0 120>;
qcom,cpr-uplift-max-volt = <1350000>;
qcom,cpr-uplift-speed-bin = <1>;
qcom,speed-bin-fuse-sel = <22 0 3 0>;
qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
qcom,cpr-corner-frequency-map =
<1 300000000>,
<2 384000000>,
<3 600000000>,
<4 787200000>,
<5 998400000>,
<6 1094400000>,
<7 1190400000>,
<8 1305600000>,
<9 1344000000>,
<10 1401600000>,
<11 1497600000>,
<12 1593600000>;
qcom,pvs-version-fuse-sel = <22 4 2 0>;
qcom,cpr-speed-bin-max-corners =
<0 1 2 4 7>,
<1 1 2 4 12>,
<2 1 2 4 10>,
<5 1 2 4 14>;
qcom,cpr-fuse-target-quot-scale =
<0 1>,
<0 1>,
<0 1>;
qcom,cpr-quot-adjust-scaling-factor-max = <0 650 650>;
qcom,cpr-fuse-quot-offset =
<138 53 5 0>,
<138 53 5 0>,
<138 48 5 0>,
<138 58 5 0>;
qcom,cpr-fuse-redun-quot-offset =
<200 53 5 0>,
<200 53 5 0>,
<200 48 5 0>,
<200 58 5 0>;
qcom,cpr-fuse-init-voltage =
<27 36 6 0>,
<27 18 6 0>,
<27 0 6 0>;
qcom,cpr-fuse-redun-init-voltage =
<140 36 6 0>,
<140 18 6 0>,
<140 0 6 0>;
qcom,cpr-init-voltage-ref = <1050000 1150000 1280000>;
qcom,cpr-init-voltage-step = <10000>;
qcom,cpr-voltage-ceiling-override =
<1 1 1050000 1050000 1150000 1150000 1280000
1280000 1280000 1280000 1280000 1280000
1280000 1280000>;
qcom,cpr-voltage-floor-override =
<1 1 1050000 1050000 1050000 1050000 1060000
1070000 1080000 1090000 1100000 1100000
1100000 1100000>;
qcom,cpr-scaled-init-voltage-as-ceiling;
qcom,cpr-fuse-version-map =
<0xffffffff 0xffffffff 2 4 4 4>,
<0xffffffff 0xffffffff 2 6 6 6>,
<0xffffffff 0xffffffff 3 4 4 4>;
qcom,cpr-quotient-adjustment =
<0 0 (-210)>,
<0 0 (-60)>,
<0 0 (-94)>;
qcom,cpr-quot-offset-adjustment =
<0 0 (-5)>;
qcom,cpr-init-voltage-adjustment =
<0 0 (-100000)>,
<0 0 (-100000)>,
<0 0 (-45000)>;
qcom,cpr-fuse-min-quot-diff = <0 0 40>;
qcom,cpr-min-quot-diff-adjustment =
<0 0 0>,
<0 0 72>,
<0 0 104>;
qcom,cpr-floor-to-ceiling-max-range =
<(-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1)>,
<(-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1)>,
<(-1) (-1) (-1) (-1) (-1) (-1) (-1) 50000 50000 50000 50000 50000>;
qcom,cpr-virtual-corner-init-voltage-adjustment =
<0 0 0 (-10000) 0 0 0 0 0 0 0 0>,
<0 0 0 0 0 0 0 0 0 0 0 (-20000)>,
<0 0 0 0 0 0 0 0 0 0 0 (-30000)>;
qcom,cpr-virtual-corner-quotient-adjustment =
<0 0 0 100 0 0 0 0 0 0 0 0>,
<0 0 0 0 0 0 0 0 0 0 0 (-300)>,
<0 0 0 (-60) 0 0 0 0 0 0 0 0>;
qcom,cpr-cpus = <&CPU0 &CPU1 &CPU2 &CPU3>;
qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment =
/* 1st fuse version tuple matched */
<0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
<0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
<0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
/* 2nd fuse version tuple matched */
<0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
<0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
<0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
/* 3rd fuse version tuple matched */
<0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
<0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
<0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */
qcom,cpr-online-cpu-virtual-corner-quotient-adjustment =
/* 1st fuse version tuple matched */
<0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 0 CPUs online */
<0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 1 CPUs online */
<0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6)>, /* 2 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
/* 2nd fuse version tuple matched */
<0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 0 CPUs online */
<0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 1 CPUs online */
<0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6)>, /* 2 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
/* 3rd fuse version tuple matched */
<0 0 0 (-21) (-21) (-21) (-32) (-32) (-42) 0 (-42) (-63)>, /* 0 CPUs online */
<0 0 0 (-21) (-21) (-21) (-32) (-32) (-42) 0 (-42) (-63)>, /* 1 CPUs online */
<0 0 0 (-11) (-11) (-11) (-11) (-11) (-21) 0 (-21) (-21)>, /* 2 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
<0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */
qcom,cpr-allowed =
<0>,
<1>,
<1>;
qcom,fuse-remap-base-row = <1000>;
qcom,fuse-remap-source =
<140 7 3 0>,
<138 45 5 0>;
qcom,cpr-fuse-quot-offset-scale = <5 5 5>;
qcom,cpr-aging-sensor-id = <17, 18>;
qcom,cpr-aging-ref-corner = <4>;
qcom,cpr-aging-ref-voltage = <1050000>;
qcom,cpr-max-aging-margin = <15000>;
qcom,cpr-de-aging-allowed =
<0>,
<0>,
<1>;
qcom,cpr-non-collapsible-sensors= <7 12 17 22>;
qcom,cpr-aging-ro-scaling-factor = <3500>;
qcom,cpr-ro-scaling-factor = <0 2500 2500 2500 0 0 0 0>;
qcom,cpr-aging-derate = <1000 1000 1250>;
qcom,cpr-fuse-aging-init-quot-diff =
<101 0 8 0>,
<101 8 8 0>;
};
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Qualcomm Technologies Inc. SPM Regulators
spm-regulator is a regulator device which supports PMIC processor supply
regulators via the SPM module.
Required properties:
- compatible: Must be "qcom,spm-regulator"
- reg: Specifies the SPMI address and size for this regulator device
- regulator-name: A string used as a descriptive name for the regulator
Required structure:
- A qcom,spm-regulator node must be a child of an SPMI node that has specified
the spmi-slave-container property
Optional properties:
- qcom,mode: A string which specifies the mode to use for the regulator.
Supported values are "pwm" and "auto". PWM mode is more
robust, but draws more current than auto mode. If this
property is not specified, then the regulator will remain
in whatever mode hardware or bootloaders set it to.
- qcom,cpu-num: Specifies which CPU this regulator powers. This property is
not need when the SPM regulator is shared between all CPUs.
- qcom,bypass-spm: Boolean flag which indicates that voltage control should not
be managed by an SPM. Instead, the voltage should be
controlled via SPMI.
- qcom,max-voltage-step: Maximum single voltage step size in microvolts.
- qcom,recal-mask: Bit mask of the APSS clusters to recalibrate after each
voltage change. Bit 0 corresponds to the first cluster,
bit 1 corresponds to the second cluster, and so on.
Optional structure:
- A child node may be specified within a qcom,spm-regulator node which defines
an additional regulator which controls the AVS minimum and maximum
voltage limits.
- The AVS child node must contain these properties defined in regulator.txt:
regulator-name, regulator-min-microvolt, regulator-max-microvolt.
All properties specified within the core regulator framework can also be used.
These bindings can be found in regulator.txt.
Example:
qcom,spmi@fc4c0000 {
qcom,pm8226@1 {
spmi-slave-container;
spm-regulator@1700 {
compatible = "qcom,spm-regulator";
regulator-name = "8226_s2";
reg = <0x1700 0x100>;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1275000>;
avs-limit-regulator {
regulator-name = "8226_s2_avs_limit";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1275000>;
}
};
};
};