duff/android_kernel_motorola_sm6225
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Devon4G:seperated DVT2/DVT1 sar firmware

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WHY:need seperated sar firmware
HOW:seperated by device tree

Change-Id: Iee58c4432362869b0fc6db2d3b31df6ad8c01e34
Signed-off-by: wunan3 <wunan3@lenovo.com>
Reviewed-on: https://gerrit.mot.com/2274971
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Jianguo Liu <liujg6@motorola.com>
Reviewed-by: Wang Wang <wangwang1@lenovo.com>
Submit-Approved: Jira Key
This commit is contained in:
wunan3 authored and Carlos Pinho committed 2023-05-31 17:01:06 -03:00
1 parent d8a6a09a2b
commit 1bae99c319
3 files changed
+28 -29
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qcom/khaje-devon-common-overlay.dtsi
-28
View File
@@ -87,34 +87,6 @@
status = "ok" status = "ok"
}; };
&qupv3_se2_i2c {
status = "ok"
aw9610x_sar@12 {
compatible = "awinic,aw9610x_sar_0";
reg = <0x12>;
sar-gpio-vcc-enable;
sar-gpio_3v0_en = <&tlmm 67 0x00>;
pinctrl-names = "default";
pinctrl-0 = <&capsense_sar_gpio_pins>;
interrupt-parent = <&tlmm>;
interrupts = <106 0x02>;
irq-gpio = <&tlmm 106 0x02>;
chip_name = "AW96105";
sar-num = <0>;
cap_vcc-supply = <&pm6125_l21>;
aw9610x,channel_number = <0x5>;
ch0_name = "Ch0capsense_reference";
ch1_name = "Ch1capsense_top_left";
ch2_name = "Ch2capsense_top_right";
ch3_name = "Ch3capsense_reference";
ch4_name = "Ch4capsense_bottom";
ref_channel = <0x9>;
hardware_version = <0>;
aw9610x,using-firmware;
aw9610x,firmware_name = "aw9610x_0";
};
};
&usb0 { &usb0 {
dwc3@4e00000 { dwc3@4e00000 {
dr_mode = "otg"; dr_mode = "otg";
qcom/khaje-devon-dvt2-overlay.dts
+1 -1
View File
@@ -19,7 +19,7 @@
model = "devon"; model = "devon";
compatible = "qcom,khaje-devon", "qcom,khaje-moto", "qcom,khaje"; compatible = "qcom,khaje-devon", "qcom,khaje-moto", "qcom,khaje";
qcom,msm-id = <518 0x10000>; qcom,msm-id = <518 0x10000>;
qcom,board-id = <0 0xA000>; qcom,board-id = <0 0xB200>;
}; };
&qupv3_se2_i2c { &qupv3_se2_i2c {
qcom/khaje-devon-evt-overlay.dts
+27
View File
@@ -22,3 +22,30 @@
qcom,board-id = <0 0xA000>; qcom,board-id = <0 0xA000>;
}; };
&qupv3_se2_i2c {
status = "ok"
aw9610x_sar@12 {
compatible = "awinic,aw9610x_sar_0";
reg = <0x12>;
sar-gpio-vcc-enable;
sar-gpio_3v0_en = <&tlmm 67 0x00>;
pinctrl-names = "default";
pinctrl-0 = <&capsense_sar_gpio_pins>;
interrupt-parent = <&tlmm>;
interrupts = <106 0x02>;
irq-gpio = <&tlmm 106 0x02>;
chip_name = "AW96105";
sar-num = <0>;
cap_vcc-supply = <&pm6125_l21>;
aw9610x,channel_number = <0x5>;
ch0_name = "Ch0capsense_reference";
ch1_name = "Ch1capsense_top_left";
ch2_name = "Ch2capsense_top_right";
ch3_name = "Ch3capsense_reference";
ch4_name = "Ch4capsense_bottom";
ref_channel = <0x9>;
hardware_version = <0>;
aw9610x,using-firmware;
aw9610x,firmware_name = "aw9610x_0";
};
};