: arm/dts: i2c change for samsung RN4V bring up

remove previous I2C Instance overlay
add I2C input-enable in I2C sleep for nfc I2C only

Change-Id: I76b2ea84aca581b3874bb0812e7d20c546007df7
Signed-off-by: zhangjun10 <zhangj10@motorola.com>
Reviewed-on: https://gerrit.mot.com/2131760
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
zhangjun10 authored and Carlos Pinho committed 2023-05-31 17:01:04 -03:00
1 parent db26ccb505
commit 0bf712d4d4
1 file changed
+84 -19
+84 -19
View File
@@ -32,25 +32,6 @@
};
};
&qupv3_se1_i2c {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
sec-nfc@27 {
compatible = "sec-nfc";
reg = <0x27>;
sec-nfc,ven-gpio = <&tlmm 69 0x00>;
sec-nfc,firm-gpio = <&tlmm 31 0x00>;
sec-nfc,irq-gpio = <&tlmm 70 0x00>;
sec-nfc,clk_req-gpio = <&tlmm 112 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <70 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
};
};
&soc {
qcom,tz_gpio {
@@ -83,8 +64,92 @@
input-enable;
};
};
qupv3_se1_i2c_pins: qupv3_se1_i2c_pins{
qupv3_se1_i2c_act: qupv3_se1_i2c_active {
mux {
pins = "gpio4", "gpio5";
function = "qup1";
};
config {
pins = "gpio4", "gpio5";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se1_i2c_sle: qupv3_se1_i2c_sleep {
mux {
pins = "gpio4", "gpio5";
function = "gpio";
};
config {
pins = "gpio4", "gpio5";
drive-strength = <2>;
bias-pull-up;
input-enable;
};
};
};
nfc {
nfc_clk_req_active {
/* active state */
mux {
/* GPIO 112: NFC CLOCK REQUEST */
pins = "gpio112";
function = "gpio";
};
config {
pins = "gpio112";
drive-strength = <2>; /* 2 MA */
bias-pull-up;
};
};
nfc_clk_req_suspend {
/* sleep state */
mux {
/* GPIO 112: NFC CLOCK REQUEST */
pins = "gpio112";
function = "gpio";
};
config {
pins = "gpio112";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
};
};
&qupv3_se1_i2c {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&qupv3_se1_i2c_act>;
pinctrl-1 = <&qupv3_se1_i2c_sle>;
sec-nfc@27 {
compatible = "sec-nfc";
reg = <0x27>;
sec-nfc,ven-gpio = <&tlmm 69 0x00>;
sec-nfc,firm-gpio = <&tlmm 31 0x00>;
sec-nfc,irq-gpio = <&tlmm 70 0x00>;
sec-nfc,clk_req-gpio = <&tlmm 112 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <70 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>;
clock-names = "OSC_NFC";
};
};
&sdhc_2 {
vdd-supply = <&L22A>;