: arm/dts: i2c change for samsung RN4V bring up
remove previous I2C Instance overlay add I2C input-enable in I2C sleep for nfc I2C only Change-Id: I76b2ea84aca581b3874bb0812e7d20c546007df7 Signed-off-by: zhangjun10 <zhangj10@motorola.com> Reviewed-on: https://gerrit.mot.com/2131760 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com> Submit-Approved: Jira Key
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db26ccb505
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1 file changed
+84
-19
@@ -32,25 +32,6 @@
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};
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};
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&qupv3_se1_i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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sec-nfc@27 {
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compatible = "sec-nfc";
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reg = <0x27>;
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sec-nfc,ven-gpio = <&tlmm 69 0x00>;
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sec-nfc,firm-gpio = <&tlmm 31 0x00>;
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sec-nfc,irq-gpio = <&tlmm 70 0x00>;
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sec-nfc,clk_req-gpio = <&tlmm 112 0x00>;
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interrupt-parent = <&tlmm>;
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interrupts = <70 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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&soc {
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qcom,tz_gpio {
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@@ -83,8 +64,92 @@
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input-enable;
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};
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};
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins{
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qupv3_se1_i2c_act: qupv3_se1_i2c_active {
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mux {
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pins = "gpio4", "gpio5";
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function = "qup1";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se1_i2c_sle: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio4", "gpio5";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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input-enable;
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};
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};
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};
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nfc {
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nfc_clk_req_active {
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/* active state */
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mux {
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/* GPIO 112: NFC CLOCK REQUEST */
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pins = "gpio112";
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function = "gpio";
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};
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config {
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pins = "gpio112";
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drive-strength = <2>; /* 2 MA */
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bias-pull-up;
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};
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};
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nfc_clk_req_suspend {
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/* sleep state */
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mux {
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/* GPIO 112: NFC CLOCK REQUEST */
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pins = "gpio112";
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function = "gpio";
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};
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config {
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pins = "gpio112";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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};
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};
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&qupv3_se1_i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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pinctrl-0 = <&qupv3_se1_i2c_act>;
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pinctrl-1 = <&qupv3_se1_i2c_sle>;
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sec-nfc@27 {
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compatible = "sec-nfc";
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reg = <0x27>;
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sec-nfc,ven-gpio = <&tlmm 69 0x00>;
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sec-nfc,firm-gpio = <&tlmm 31 0x00>;
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sec-nfc,irq-gpio = <&tlmm 70 0x00>;
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sec-nfc,clk_req-gpio = <&tlmm 112 0x00>;
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interrupt-parent = <&tlmm>;
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interrupts = <70 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active &nfc_clk_req_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend &nfc_clk_req_suspend>;
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clock-names = "OSC_NFC";
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};
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};
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&sdhc_2 {
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vdd-supply = <&L22A>;
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