Jilai Wang
83f5fa3cf4
The mailbox controller implemented in NPU works as a bridge between ipcc_mproc mailbox controller and its clients. It is required because npu driver needs to control when IPCC irq can be sent to NPUQ6. Change-Id: I2987c1820169577c6985fa922e2401f865f13b7b
39 lines
1.3 KiB
Devicetree
39 lines
1.3 KiB
Devicetree
#include <dt-bindings/soc/qcom,ipcc.h>
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&soc {
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ipcc_self_ping_apss: ipcc-self-ping-apss {
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compatible = "qcom,ipcc-self-ping";
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interrupts-extended = <&ipcc_mproc IPCC_CLIENT_APSS
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IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_LEVEL_HIGH>;
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mboxes = <&ipcc_mproc IPCC_CLIENT_APSS IPCC_MPROC_SIGNAL_SMP2P>;
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};
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ipcc_self_ping_cdsp: ipcc-self-ping-cdsp {
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compatible = "qcom,ipcc-self-ping";
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interrupts-extended = <&ipcc_mproc IPCC_CLIENT_CDSP
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IPCC_MPROC_SIGNAL_PING IRQ_TYPE_LEVEL_HIGH>;
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mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_PING>;
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};
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ipcc_self_ping_adsp: ipcc-self-ping-adsp {
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compatible = "qcom,ipcc-self-ping";
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interrupts-extended = <&ipcc_mproc IPCC_CLIENT_LPASS
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IPCC_MPROC_SIGNAL_PING IRQ_TYPE_LEVEL_HIGH>;
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mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_PING>;
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};
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ipcc_self_ping_slpi: ipcc-self-ping-slpi {
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compatible = "qcom,ipcc-self-ping";
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interrupts-extended = <&ipcc_mproc IPCC_CLIENT_SLPI
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IPCC_MPROC_SIGNAL_PING IRQ_TYPE_LEVEL_HIGH>;
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mboxes = <&ipcc_mproc IPCC_CLIENT_SLPI IPCC_MPROC_SIGNAL_PING>;
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};
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ipcc_self_ping_npu: ipcc-self-ping-npu {
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compatible = "qcom,ipcc-self-ping";
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interrupts-extended = <&ipcc_mproc IPCC_CLIENT_NPU
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IPCC_MPROC_SIGNAL_PING IRQ_TYPE_LEVEL_HIGH>;
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mboxes = <&msm_npu IPCC_CLIENT_NPU IPCC_MPROC_SIGNAL_PING>;
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};
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};
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