Archana Sriram
6043b174ee
Update gpu_bw_tbl in terms of operating point for gpubw on SDM439 and correct the table for MSM8937. Change-Id: I15c5f07281e052673a9fe6ce4345a5675890cd0c
248 lines
5.7 KiB
Devicetree
248 lines
5.7 KiB
Devicetree
&soc {
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msm_bus: qcom,kgsl-busmon {
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label = "kgsl-busmon";
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compatible = "qcom,kgsl-busmon";
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};
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gpu_bw_tbl: gpu-bw-tbl {
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compatible = "operating-points-v2";
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opp-0 { opp-hz = /bits/ 64 < 0 >; }; /* OFF */
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opp-100 { opp-hz = /bits/ 64 < 769 >; }; /* 1. 100 MHz */
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opp-211 { opp-hz = /bits/ 64 < 1611 >; }; /* 2. 211 MHz */
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opp-278 { opp-hz = /bits/ 64 < 2124 >; }; /* 3. 278 MHz */
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opp-384 { opp-hz = /bits/ 64 < 2929 >; }; /* 4. 384 MHz */
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opp-537 { opp-hz = /bits/ 64 < 4101 >; }; /* 5. 537 MHz */
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opp-557 { opp-hz = /bits/ 64 < 4248 >; }; /* 6. 557 MHz */
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opp-700 { opp-hz = /bits/ 64 < 5346 >; }; /* 7. 700 MHz */
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opp-748 { opp-hz = /bits/ 64 < 5712 >; }; /* 8. 748 MHz */
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opp-806 { opp-hz = /bits/ 64 < 6152 >; }; /* 9. 806 MHz */
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opp-922 { opp-hz = /bits/ 64 < 7031 >; }; /* 10. 922 MHz */
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};
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gpubw: qcom,gpubw {
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compatible = "qcom,devbw";
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governor = "bw_vbif";
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qcom,src-dst-ports = <26 512>;
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operating-points-v2 = <&gpu_bw_tbl>;
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/*
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* active-only flag is used while registering the bus
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* governor.It helps release the bus vote when the CPU
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* subsystem is inactiv3
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*/
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qcom,active-only;
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};
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msm_gpu: qcom,kgsl-3d0@1c00000 {
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label = "kgsl-3d0";
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compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
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status = "ok"
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reg = <0x1c00000 0x40000
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0xa0000 0x6fff>;
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reg-names = "kgsl_3d0_reg_memory", "qfprom_memory";
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interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "kgsl_3d0_irq";
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qcom,id = <0>;
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qcom,chipid = <0x05000500>;
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qcom,initial-pwrlevel = <2>;
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qcom,idle-timeout = <80>; //msecs
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qcom,strtstp-sleepwake;
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qcom,highest-bank-bit = <14>;
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qcom,snapshot-size = <1048576>; //bytes
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clocks = <&gcc GCC_OXILI_GFX3D_CLK>,
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<&gcc GCC_OXILI_AHB_CLK>,
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<&gcc GCC_BIMC_GFX_CLK>,
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<&gcc GCC_BIMC_GPU_CLK>,
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<&gcc GCC_OXILI_TIMER_CLK>,
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<&gcc GCC_OXILI_AON_CLK>;
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clock-names = "core_clk", "iface_clk",
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"mem_iface_clk", "alt_mem_iface_clk",
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"rbbmtimer_clk", "alwayson_clk";
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/* Bus Scale Settings */
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qcom,gpubw-dev = <&gpubw>;
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qcom,bus-control;
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qcom,bus-width = <16>;
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qcom,msm-bus,name = "grp3d";
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qcom,msm-bus,num-cases = <11>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<26 512 0 0>, /* off */
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<26 512 0 806400>, /* 1. 100.80 MHz */
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<26 512 0 1689600>, /* 2. 211.20 MHz */
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<26 512 0 2227200>, /* 3. 278.40 MHz */
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<26 512 0 3072000>, /* 4. 384.00 MHz */
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<26 512 0 4300800>, /* 5. 537.60 MHz */
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<26 512 0 4454400>, /* 6. 556.80 MHz */
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<26 512 0 5299200>, /* 7. 662.40 MHz */
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<26 512 0 5990400>, /* 8. 748.80 MHz */
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<26 512 0 6451200>, /* 9. 806.40 MHz */
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<26 512 0 7372800>; /* 10. 921.60 MHz */
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/* GDSC regulator names */
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regulator-names = "vddcx", "vdd";
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/* GDSC oxili regulators */
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vddcx-supply = <&gdsc_oxili_cx>;
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vdd-supply = <&gdsc_oxili_gx>;
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/* CPU latency parameter */
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qcom,pm-qos-active-latency = <360>;
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qcom,pm-qos-wakeup-latency = <360>;
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/* Quirks */
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qcom,gpu-quirk-two-pass-use-wfi;
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qcom,gpu-quirk-dp2clockgating-disable;
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qcom,gpu-quirk-lmloadkill-disable;
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/* Enable context aware freq. scaling */
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qcom,enable-ca-jump;
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/* Context aware jump busy penalty in us */
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qcom,ca-busy-penalty = <12000>;
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/* Context aware jump target power level */
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qcom,ca-target-pwrlevel = <1>;
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/* Enable gpu cooling device */
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#cooling-cells = <2>;
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/* GPU Mempools */
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qcom,gpu-mempools {
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#address-cells= <1>;
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#size-cells = <0>;
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compatible = "qcom,gpu-mempools";
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qcom,mempool-max-pages = <32768>;
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/* 4K Page Pool configuration */
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qcom,gpu-mempool@0 {
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reg = <0>;
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qcom,mempool-page-size = <4096>;
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};
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/* 64K Page Pool configuration */
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qcom,gpu-mempool@1 {
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reg = <1>;
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qcom,mempool-page-size = <65536>;
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};
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};
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qcom,gpu-coresights {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,gpu-coresight";
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/* Trace bus */
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qcom,gpu-coresight@0 {
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reg = <0>;
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coresight-name = "coresight-gfx";
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coresight-atid = <67>;
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port {
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gfx_out_funnel_mm: endpoint {
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remote-endpoint =
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<&funnel_mm_in_gfx>;
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};
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};
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};
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};
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/* Power levels */
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qcom,gpu-pwrlevels {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,gpu-pwrlevels";
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/* TURBO */
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <450000000>;
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qcom,bus-freq = <9>;
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qcom,bus-min = <9>;
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qcom,bus-max = <9>;
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};
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/* NOM+ */
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <400000000>;
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qcom,bus-freq = <7>;
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qcom,bus-min = <6>;
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qcom,bus-max = <9>;
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};
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/* NOM */
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <375000000>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <5>;
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qcom,bus-max = <8>;
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};
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/* SVS+ */
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <300000000>;
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qcom,bus-freq = <5>;
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qcom,bus-min = <4>;
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qcom,bus-max = <7>;
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};
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/* SVS */
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <216000000>;
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qcom,bus-freq = <3>;
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qcom,bus-min = <1>;
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qcom,bus-max = <4>;
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};
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/* XO */
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-freq = <19200000>;
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qcom,bus-freq = <0>;
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qcom,bus-min = <0>;
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qcom,bus-max = <0>;
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};
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};
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};
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kgsl_msm_iommu: qcom,kgsl-iommu@1c40000 {
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compatible = "qcom,kgsl-smmu-v2";
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reg = <0x1c40000 0x10000>;
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clocks = <&gcc GCC_OXILI_AHB_CLK>,
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<&gcc GCC_BIMC_GFX_CLK>;
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clock-names = "gpu_ahb_clk", "gcc_bimc_gfx_clk";
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qcom,secure_align_mask = <0xfff>;
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qcom,retention;
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gfx3d_user: gfx3d_user {
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compatible = "qcom,smmu-kgsl-cb";
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label = "gfx3d_user";
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iommus = <&kgsl_smmu 0>;
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qcom,iommu-dma = "disabled";
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qcom,gpu-offset = <0x48000>;
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};
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};
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};
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