Chinmay Sawarkar
f9115a9ea5
Add the default SKU index for Kona. Change-Id: Ia6042e1aec5a09d04be8267b29e9624243aaed2f
122 lines
3.5 KiB
Devicetree
122 lines
3.5 KiB
Devicetree
#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/msm/msm-bus-ids.h>
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#include <dt-bindings/clock/qcom,videocc-kona.h>
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&soc {
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msm_vidc: qcom,vidc@aa00000 {
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compatible = "qcom,msm-vidc", "qcom,kona-vidc";
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status = "ok"
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sku-index = <0>;
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reg = <0x0aa00000 0x00100000>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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/* IOMMU Config */
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#address-cells = <1>;
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#size-cells = <1>;
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/* LLCC Cache */
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cache-slice-names = "vidsc0";
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/* Supply */
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iris-ctl-supply = <&mvs0c_gdsc>;
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vcodec-supply = <&mvs0_gdsc>;
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/* Clocks */
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clock-names = "gcc_video_axi0",
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"core_clk", "vcodec_clk";
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clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
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<&clock_videocc VIDEO_CC_MVS0C_CLK>,
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<&clock_videocc VIDEO_CC_MVS0_CLK>;
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qcom,proxy-clock-names = "gcc_video_axi0",
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"core_clk", "vcodec_clk";
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/* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/
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qcom,clock-configs = <0x0 0x1 0x1>;
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qcom,allowed-clock-rates = <239999999 338000000
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366000000 444000000>;
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resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>,
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<&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>;
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reset-names = "video_axi_reset", "video_core_reset";
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qcom,reg-presets = <0xB0088 0x0>;
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/* Buses */
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bus_cnoc {
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compatible = "qcom,msm-vidc,bus";
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label = "cnoc";
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qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
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qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
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qcom,mode = "performance";
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qcom,bus-range-kbps = <762 762>;
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};
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venus_bus_ddr {
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compatible = "qcom,msm-vidc,bus";
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label = "venus-ddr";
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qcom,bus-master = <MSM_BUS_MASTER_LLCC>;
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qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>;
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qcom,mode = "venus-ddr";
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qcom,bus-range-kbps = <762 15000000>;
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};
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venus_bus_llcc {
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compatible = "qcom,msm-vidc,bus";
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label = "venus-llcc";
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qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;
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qcom,bus-slave = <MSM_BUS_SLAVE_LLCC>;
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qcom,mode = "venuc-llcc";
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qcom,bus-range-kbps = <2288 15000000>;
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};
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/* MMUs */
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non_secure_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_ns";
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iommus = <&apps_smmu 0x2100 0x0400>;
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qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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buffer-types = <0xfff>;
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virtual-addr-pool = <0x25800000 0xba800000>;
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};
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secure_non_pixel_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_non_pixel";
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iommus = <&apps_smmu 0x2104 0x0400>;
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qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/
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buffer-types = <0x480>;
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virtual-addr-pool = <0x01000000 0x24800000>;
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qcom,secure-context-bank;
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};
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secure_bitstream_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_bitstream";
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iommus = <&apps_smmu 0x2101 0x0404>;
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qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/
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buffer-types = <0x241>;
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virtual-addr-pool = <0x00500000 0xdfb00000>;
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qcom,secure-context-bank;
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};
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secure_pixel_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_pixel";
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iommus = <&apps_smmu 0x2103 0x0400>;
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qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/
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buffer-types = <0x106>;
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virtual-addr-pool = <0x00500000 0xdfb00000>;
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qcom,secure-context-bank;
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};
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};
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};
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