Chetan C R
a3fd6c8d4b
Add cpu clock controller support for SDM429 and SDM439 targets. Change-Id: I0dd455dd1734ed083965878167f51dfef5051e19
173 lines
4.6 KiB
Devicetree
173 lines
4.6 KiB
Devicetree
#include "msm8937.dtsi"
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#include "sdm439-pm8953.dtsi"
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#include "sdm439-audio.dtsi"
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#include "sdm439-pmi632.dtsi"
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&pm8953_s5 {
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regulator-min-microvolt = <1155000>;
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regulator-max-microvolt = <1350000>;
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};
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&pm8953_s5_limit {
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regulator-min-microvolt = <1155000>;
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regulator-max-microvolt = <1350000>;
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};
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&soc {
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qcom,csiphy@1b34000 {
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compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy";
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};
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qcom,csiphy@1b35000 {
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compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy";
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};
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qcom,csid@1b30000 {
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qcom,mipi-csi-vdd-supply = <&pm8953_l2>;
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};
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qcom,csid@1b30400 {
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qcom,mipi-csi-vdd-supply = <&pm8953_l2>;
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};
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qcom,csid@1b30800 {
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qcom,mipi-csi-vdd-supply = <&pm8953_l2>;
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};
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mem_acc_vreg_corner: regulator@01946004 {
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compatible = "qcom,mem-acc-regulator";
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regulator-name = "mem_acc_corner";
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regulator-min-microvolt = <1>;
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regulator-max-microvolt = <3>;
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qcom,acc-reg-addr-list =
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<0x01942138 0x01942130 0x01942120
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0x01942124 0x01946000 0x01946004>;
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qcom,acc-init-reg-config = <1 0xff>, <2 0x5555>, <6 0x55>;
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qcom,num-acc-corners = <3>;
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qcom,boot-acc-corner = <2>;
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qcom,corner1-reg-config =
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/* SVS+ => SVS+ */
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<(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
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<(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
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/* SVS+ => NOM */
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< 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
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<(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
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/* SVS+ => TURBO/NOM+ */
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< 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
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< 3 0x0>, < 4 0x0>, < 5 0x0>;
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qcom,corner2-reg-config =
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/* NOM => SVS+ */
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< 3 0x30c30c3>, < 4 0x30c3>, < 5 0x6060606>,
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/* NOM => NOM */
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<(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
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/* NOM => TURBO/NOM+ */
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< 3 0x0>, < 4 0x0>, < 5 0x0>;
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qcom,corner3-reg-config =
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/* TURBO/NOM+ => SVS+ */
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< 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
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< 3 0x30c30c3>, < 4 0x30c3>, < 5 0x6060606>,
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/* TURBO/NOM+ => NOM */
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< 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
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<(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
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/* TURBO/NOM+ => TURBO/NOM+ */
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<(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
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<(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>;
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};
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apc_vreg_corner: regulator@b018000 {
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compatible = "qcom,cpr-regulator";
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reg = <0xb018000 0x1000>, <0xb011064 0x4>, <0xa4000 0x1000>;
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reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
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interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
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regulator-name = "apc_corner";
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regulator-min-microvolt = <1>;
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regulator-max-microvolt = <7>;
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qcom,cpr-fuse-corners = <3>;
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qcom,cpr-voltage-ceiling = <1155000 1225000 1350000>;
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qcom,cpr-voltage-floor = <1050000 1050000 1090000>;
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vdd-apc-supply = <&pm8953_s5>;
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mem-acc-supply = <&mem_acc_vreg_corner>;
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qcom,cpr-ref-clk = <19200>;
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qcom,cpr-timer-delay = <5000>;
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qcom,cpr-timer-cons-up = <0>;
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qcom,cpr-timer-cons-down = <2>;
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qcom,cpr-irq-line = <0>;
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qcom,cpr-step-quotient = <10>;
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qcom,cpr-up-threshold = <2>;
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qcom,cpr-down-threshold = <4>;
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qcom,cpr-idle-clocks = <15>;
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qcom,cpr-gcnt-time = <1>;
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qcom,vdd-apc-step-up-limit = <1>;
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qcom,vdd-apc-step-down-limit = <1>;
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qcom,cpr-apc-volt-step = <5000>;
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qcom,cpr-fuse-row = <67 0>;
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qcom,cpr-fuse-target-quot = <42 24 6>;
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qcom,cpr-fuse-ro-sel = <60 57 54>;
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qcom,cpr-init-voltage-ref = <1155000 1225000 1350000>;
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qcom,cpr-fuse-init-voltage =
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<67 36 6 0>,
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<67 18 6 0>,
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<67 0 6 0>;
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qcom,cpr-fuse-quot-offset =
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<71 26 6 0>,
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<71 20 6 0>,
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<70 54 7 0>;
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qcom,cpr-fuse-quot-offset-scale = <5 5 5>;
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qcom,cpr-init-voltage-step = <10000>;
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qcom,cpr-corner-map = <1 2 3 3 3 3 3>;
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qcom,cpr-corner-frequency-map =
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<1 960000000>,
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<2 1094400000>,
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<3 1209600000>,
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<4 1248000000>,
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<5 1344000000>,
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<6 1401000000>,
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<7 1497600000>;
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qcom,speed-bin-fuse-sel = <37 34 3 0>;
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qcom,cpr-speed-bin-max-corners =
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<0 0 1 2 6>,
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<1 0 1 2 7>,
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<2 0 1 2 3>;
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qcom,cpr-fuse-revision = <69 39 3 0>;
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qcom,cpr-quot-adjust-scaling-factor-max = <0 1400 1400>;
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qcom,cpr-voltage-scaling-factor-max = <0 2000 2000>;
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qcom,cpr-scaled-init-voltage-as-ceiling;
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qcom,cpr-fuse-version-map =
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<0 (-1) 1 (-1) (-1) (-1)>,
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<(-1) (-1) 2 (-1) (-1) (-1)>,
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<(-1) (-1) 3 (-1) (-1) (-1)>,
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<(-1) (-1) (-1) (-1) (-1) (-1)>;
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qcom,cpr-quotient-adjustment =
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<(-20) (-40) (-20)>,
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<0 (-40) (20)>,
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<0 0 (20)>,
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<0 0 0>;
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qcom,cpr-init-voltage-adjustment =
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<0 0 0>,
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<(10000) (15000) (20000)>,
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<0 0 0>,
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<0 0 0>;
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qcom,cpr-enable;
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};
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qcom,clock-cpu@b111050 {
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vdd-c0-supply = <&apc_vreg_corner>;
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cpu-vdd-supply = <&apc_vreg_corner>;
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vdd-cci-supply = <&apc_vreg_corner>;
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};
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};
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&mdss_dsi {
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vdda-supply = <&pm8953_l2>;
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vddio-supply = <&pm8953_l6>;
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};
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