Chetan C R
a03b9c1c78
Add initial device tree support for SDM660 target.
This is a snapshot of dtsi files as of msm-4.14
'commit <ca4ff9398e337420b> ("fbdev: msm: Use
dynamic allocation for SID variable")'.
Change-Id: Ia13a516de919c7c6c12a064f76af1ab2a8439e2d
186 lines
3.6 KiB
Devicetree
186 lines
3.6 KiB
Devicetree
&slim_aud {
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tasha_codec {
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wsa_spkr_sd1: msm_cdc_pinctrll {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&spkr_1_sd_n_active>;
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pinctrl-1 = <&spkr_1_sd_n_sleep>;
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};
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wsa_spkr_sd2: msm_cdc_pinctrlr {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&spkr_2_sd_n_active>;
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pinctrl-1 = <&spkr_2_sd_n_sleep>;
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};
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tasha_hph_en0: msm_cdc_pinctrl_hph_en0 {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&hph_en0_active>;
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pinctrl-1 = <&hph_en0_sleep>;
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};
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tasha_hph_en1: msm_cdc_pinctrl_hph_en1 {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&hph_en1_active>;
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pinctrl-1 = <&hph_en1_sleep>;
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};
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};
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tavil_codec {
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wcd: wcd_pinctrl@5 {
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compatible = "qcom,wcd-pinctrl";
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qcom,num-gpios = <5>;
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gpio-controller;
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#gpio-cells = <2>;
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us_euro_sw_wcd_active: us_euro_sw_wcd_active {
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mux {
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pins = "gpio1";
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};
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config {
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pins = "gpio1";
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output-high;
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};
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};
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us_euro_sw_wcd_sleep: us_euro_sw_wcd_sleep {
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mux {
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pins = "gpio1";
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};
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config {
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pins = "gpio1";
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output-low;
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};
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};
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spkr_1_wcd_en_active: spkr_1_wcd_en_active {
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mux {
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pins = "gpio2";
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};
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config {
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pins = "gpio2";
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output-high;
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};
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};
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spkr_1_wcd_en_sleep: spkr_1_wcd_en_sleep {
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mux {
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pins = "gpio2";
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};
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config {
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pins = "gpio2";
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input-enable;
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};
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};
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spkr_2_wcd_en_active: spkr_2_sd_n_active {
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mux {
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pins = "gpio3";
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};
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config {
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pins = "gpio3";
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output-high;
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};
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};
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spkr_2_wcd_en_sleep: spkr_2_sd_n_sleep {
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mux {
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pins = "gpio3";
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};
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config {
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pins = "gpio3";
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input-enable;
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};
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};
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hph_en0_wcd_active: hph_en0_wcd_active {
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mux {
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pins = "gpio4";
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};
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config {
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pins = "gpio4";
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output-high;
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};
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};
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hph_en0_wcd_sleep: hph_en0_wcd_sleep {
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mux {
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pins = "gpio4";
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};
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config {
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pins = "gpio4";
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output-low;
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};
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};
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hph_en1_wcd_active: hph_en1_wcd_active {
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mux {
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pins = "gpio5";
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};
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config {
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pins = "gpio5";
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output-high;
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};
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};
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hph_en1_wcd_sleep: hph_en1_wcd_sleep {
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mux {
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pins = "gpio5";
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};
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config {
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pins = "gpio5";
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output-low;
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};
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};
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};
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wsa_spkr_wcd_sd1: msm_cdc_pinctrll {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&spkr_1_wcd_en_active>;
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pinctrl-1 = <&spkr_1_wcd_en_sleep>;
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};
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wsa_spkr_wcd_sd2: msm_cdc_pinctrlr {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&spkr_2_wcd_en_active>;
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pinctrl-1 = <&spkr_2_wcd_en_sleep>;
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};
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tavil_us_euro_sw: msm_cdc_pinctrl_us_euro_sw {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&us_euro_sw_wcd_active>;
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pinctrl-1 = <&us_euro_sw_wcd_sleep>;
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};
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tavil_hph_en0: msm_cdc_pinctrl_hph_en0 {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&hph_en0_wcd_active>;
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pinctrl-1 = <&hph_en0_wcd_sleep>;
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};
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tavil_hph_en1: msm_cdc_pinctrl_hph_en1 {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&hph_en1_wcd_active>;
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pinctrl-1 = <&hph_en1_wcd_sleep>;
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};
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};
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};
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