Young Kwak
a6c01053f1
Add GPU tzone-names to get the GPU temperature on kona. CRs-Fixed: 2765368 Change-Id: I94f9be58af734862582c78bf39ffddfda4f4aeec
351 lines
8.6 KiB
Devicetree
351 lines
8.6 KiB
Devicetree
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#define MHZ_TO_KBPS(mhz, w) ((mhz * 1000000 * w) / (1024))
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&soc {
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pil_gpu: qcom,kgsl-hyp {
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compatible = "qcom,pil-tz-generic";
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qcom,pas-id = <13>;
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qcom,firmware-name = "a650_zap";
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};
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msm_bus: qcom,kgsl-busmon {
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label = "kgsl-busmon";
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compatible = "qcom,kgsl-busmon";
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operating-points-v2 = <&gpu_opp_table>;
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};
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gpubw: qcom,gpubw {
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compatible = "qcom,devbw-ddr";
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governor = "bw_vbif";
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qcom,src-dst-ports = <26 512>;
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operating-points-v2 = <&suspendable_ddr_bw_opp_table>;
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};
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gpu_opp_table: gpu-opp-table {
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compatible = "operating-points-v2";
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opp-480000000 {
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opp-hz = /bits/ 64 <480000000>;
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opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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};
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opp-381000000 {
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opp-hz = /bits/ 64 <381000000>;
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opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS>;
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};
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opp-290000000 {
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opp-hz = /bits/ 64 <290000000>;
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opp-microvolt = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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};
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};
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msm_gpu: qcom,kgsl-3d0@3d00000 {
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label = "kgsl-3d0";
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compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
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status = "ok"
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reg = <0x3d00000 0x40000>, <0x3d61000 0x800>,
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<0x3de0000 0x10000>, <0x3d8b000 0x2000>,
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<0x06900000 0x80000>;
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reg-names = "kgsl_3d0_reg_memory", "cx_dbgc", "rscc",
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"isense_cntl", "qdss_gfx";
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interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "kgsl_3d0_irq";
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qcom,id = <0>;
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qcom,chipid = <0x06050000>;
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qcom,initial-pwrlevel = <2>;
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qcom,idle-timeout = <80>; /* msecs */
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qcom,no-nap;
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qcom,highest-bank-bit = <16>;
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qcom,min-access-length = <32>;
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qcom,ubwc-mode = <4>;
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qcom,snapshot-size = <0x200000>; /* bytes */
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qcom,gpu-qdss-stm = <0x161c0000 0x40000>; /* base addr, size */
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#cooling-cells = <2>;
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qcom,tzone-names = "gpuss-0-usr", "gpuss-1-usr";
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qcom,pm-qos-active-latency = <44>;
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clocks = <&clock_gpucc GPU_CC_CXO_CLK>,
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<&clock_gcc GCC_DDRSS_GPU_AXI_CLK>,
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<&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,
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<&clock_gpucc GPU_CC_CX_GMU_CLK>,
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<&clock_gpucc GPU_CC_AHB_CLK>,
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<&clock_cpucc L3_GPU_VOTE_CLK>;
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clock-names = "rbbmtimer_clk", "mem_clk",
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"mem_iface_clk", "gmu_clk",
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"gpu_cc_ahb", "l3_vote";
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qcom,isense-clk-on-level = <1>;
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/* Bus Scale Settings */
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qcom,gpubw-dev = <&gpubw>;
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qcom,bus-control;
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/* GDSC regulator names */
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regulator-names = "vddcx", "vdd";
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/* GDSC oxili regulators */
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vddcx-supply = <&gpu_cx_gdsc>;
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vdd-supply = <&gpu_gx_gdsc>;
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/* GPU OPP data */
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operating-points-v2 = <&gpu_opp_table>;
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nvmem-cells = <&gpu_lm_efuse>, <&gpu_speed_bin>;
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nvmem-cell-names = "isense_slope", "speed_bin";
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qcom,bus-accesses-ddr7 = <970>;
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qcom,bus-accesses-ddr8 = <1162>;
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/* bus table */
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qcom,gpu-bus-table-0 {
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compatible = "qcom,gpu-bus-table",
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"qcom,gpu-bus-table-ddr7";
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qcom,msm-bus,name = "grp3d";
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qcom,msm-bus,num-cases = <12>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<26 512 0 MHZ_TO_KBPS(0, 4)>, /* index=0 */
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<26 512 0 MHZ_TO_KBPS(200, 4)>, /* index=1 */
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<26 512 0 MHZ_TO_KBPS(300, 4)>, /* index=2 */
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<26 512 0 MHZ_TO_KBPS(451, 4)>, /* index=3 */
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<26 512 0 MHZ_TO_KBPS(547, 4)>, /* index=4 */
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<26 512 0 MHZ_TO_KBPS(681, 4)>, /* index=5 */
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<26 512 0 MHZ_TO_KBPS(768, 4)>, /* index=6 */
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<26 512 0 MHZ_TO_KBPS(1017, 4)>, /* index=7 */
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<26 512 0 MHZ_TO_KBPS(1353, 4)>, /* index=8 */
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<26 512 0 MHZ_TO_KBPS(1555, 4)>, /* index=9 */
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<26 512 0 MHZ_TO_KBPS(1804, 4)>, /* index=10 */
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<26 512 0 MHZ_TO_KBPS(2092, 4)>; /* index=11 */
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};
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qcom,gpu-bus-table-1 {
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compatible = "qcom,gpu-bus-table",
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"qcom,gpu-bus-table-ddr8";
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qcom,msm-bus,name = "grp3d";
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qcom,msm-bus,num-cases = <12>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<26 512 0 MHZ_TO_KBPS(0, 4)>, /* index=0 */
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<26 512 0 MHZ_TO_KBPS(200, 4)>, /* index=1 */
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<26 512 0 MHZ_TO_KBPS(300, 4)>, /* index=2 */
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<26 512 0 MHZ_TO_KBPS(451, 4)>, /* index=3 */
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<26 512 0 MHZ_TO_KBPS(547, 4)>, /* index=4 */
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<26 512 0 MHZ_TO_KBPS(681, 4)>, /* index=5 */
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<26 512 0 MHZ_TO_KBPS(768, 4)>, /* index=6 */
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<26 512 0 MHZ_TO_KBPS(1017, 4)>, /* index=7 */
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<26 512 0 MHZ_TO_KBPS(1555, 4)>, /* index=8 */
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<26 512 0 MHZ_TO_KBPS(1804, 4)>, /* index=9 */
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<26 512 0 MHZ_TO_KBPS(2092, 4)>, /* index=10 */
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<26 512 0 MHZ_TO_KBPS(2736, 4)>; /* index=11 */
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};
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qcom,l3-pwrlevels {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,l3-pwrlevels";
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qcom,l3-pwrlevel@0 {
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reg = <0>;
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qcom,l3-freq = <0>;
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};
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qcom,l3-pwrlevel@1 {
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reg = <1>;
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qcom,l3-freq = <864000000>;
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};
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qcom,l3-pwrlevel@2 {
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reg = <2>;
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qcom,l3-freq = <1344000000>;
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};
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};
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/* GPU Mempools */
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qcom,gpu-mempools {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,gpu-mempools";
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/* 4K Page Pool configuration */
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qcom,gpu-mempool@0 {
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reg = <0>;
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qcom,mempool-page-size = <4096>;
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qcom,mempool-reserved = <2048>;
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qcom,mempool-allocate;
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};
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/* 8K Page Pool configuration */
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qcom,gpu-mempool@1 {
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reg = <1>;
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qcom,mempool-page-size = <8192>;
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qcom,mempool-reserved = <1024>;
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qcom,mempool-allocate;
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};
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/* 64K Page Pool configuration */
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qcom,gpu-mempool@2 {
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reg = <2>;
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qcom,mempool-page-size = <65536>;
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qcom,mempool-reserved = <256>;
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};
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/* 1M Page Pool configuration */
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qcom,gpu-mempool@3 {
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reg = <3>;
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qcom,mempool-page-size = <1048576>;
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qcom,mempool-reserved = <32>;
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};
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};
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/* Power levels */
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qcom,gpu-pwrlevels {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,gpu-pwrlevels";
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <480000000>;
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qcom,bus-freq-ddr7 = <11>;
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qcom,bus-min-ddr7 = <11>;
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qcom,bus-max-ddr7 = <11>;
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qcom,bus-freq-ddr8 = <11>;
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qcom,bus-min-ddr8 = <11>;
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qcom,bus-max-ddr8 = <11>;
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};
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <381000000>;
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qcom,bus-freq-ddr7 = <9>;
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qcom,bus-min-ddr7 = <7>;
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qcom,bus-max-ddr7 = <11>;
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qcom,bus-freq-ddr8 = <8>;
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qcom,bus-min-ddr8 = <7>;
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qcom,bus-max-ddr8 = <11>;
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};
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <290000000>;
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qcom,bus-freq-ddr7 = <2>;
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qcom,bus-min-ddr7 = <1>;
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qcom,bus-max-ddr7 = <9>;
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qcom,bus-freq-ddr8 = <2>;
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qcom,bus-min-ddr8 = <1>;
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qcom,bus-max-ddr8 = <8>;
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};
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <0>;
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qcom,bus-freq = <0>;
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qcom,bus-min = <0>;
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qcom,bus-max = <0>;
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};
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};
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};
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kgsl_msm_iommu: qcom,kgsl-iommu@3da0000 {
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compatible = "qcom,kgsl-smmu-v2";
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reg = <0x03da0000 0x10000>;
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/* CB5(ATOS) & CB5/6/7 are protected by HYP */
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qcom,protect = <0xa0000 0xc000>;
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clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,
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<&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
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<&clock_gpucc GPU_CC_AHB_CLK>;
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clock-names = "gcc_gpu_memnoc_gfx",
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"gcc_gpu_snoc_dvm_gfx",
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"gpu_cc_ahb";
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qcom,secure_align_mask = <0xfff>;
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qcom,retention;
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qcom,hyp_secure_alloc;
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gfx3d_user: gfx3d_user {
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compatible = "qcom,smmu-kgsl-cb";
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label = "gfx3d_user";
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iommus = <&kgsl_smmu 0x0 0x401>;
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qcom,iommu-dma = "disabled";
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qcom,gpu-offset = <0xa8000>;
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};
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gfx3d_secure: gfx3d_secure {
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compatible = "qcom,smmu-kgsl-cb";
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label = "gfx3d_secure";
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iommus = <&kgsl_smmu 0x2 0x400>;
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qcom,iommu-dma = "disabled";
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};
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};
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gmu: qcom,gmu@3d6a000 {
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label = "kgsl-gmu";
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compatible = "qcom,gpu-gmu";
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reg = <0x3d6a000 0x30000>,
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<0xb290000 0x10000>,
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<0xb490000 0x10000>;
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reg-names = "kgsl_gmu_reg",
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"kgsl_gmu_pdc_cfg",
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"kgsl_gmu_pdc_seq";
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interrupts = <0 304 IRQ_TYPE_LEVEL_HIGH>,
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<0 305 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "kgsl_hfi_irq", "kgsl_gmu_irq";
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qcom,msm-bus,name = "cnoc";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<26 10036 0 0>, /* CNOC off */
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<26 10036 0 100>; /* CNOC on */
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regulator-names = "vddcx", "vdd";
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vddcx-supply = <&gpu_cx_gdsc>;
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vdd-supply = <&gpu_gx_gdsc>;
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clocks = <&clock_gpucc GPU_CC_CX_GMU_CLK>,
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<&clock_gpucc GPU_CC_CXO_CLK>,
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<&clock_gcc GCC_DDRSS_GPU_AXI_CLK>,
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<&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,
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<&clock_gpucc GPU_CC_AHB_CLK>,
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<&clock_aop QDSS_CLK>;
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clock-names = "gmu_clk", "cxo_clk", "axi_clk",
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"memnoc_clk", "gpu_cc_ahb",
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"apb_pclk";
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/* AOP mailbox for sending ACD enable and disable messages */
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mboxes = <&qmp_aop 0>;
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mbox-names = "aop";
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gmu_user: gmu_user {
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compatible = "qcom,smmu-gmu-user-cb";
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iommus = <&kgsl_smmu 0x4 0x400>;
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qcom,iommu-dma = "disabled";
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};
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gmu_kernel: gmu_kernel {
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compatible = "qcom,smmu-gmu-kernel-cb";
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iommus = <&kgsl_smmu 0x5 0x400>;
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qcom,iommu-dma = "disabled";
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};
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};
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};
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