Kenny Kessler
6f78313042
Add the Cypress Capsense DLKM. Change-Id: Ia38e38d0042431be56ed20ec800b9b70bca032c9 Signed-off-by: Kenny Kessler <kenny.kessler@motorola.com> Reviewed-on: https://gerrit.mot.com/1099054 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Kenneth Kessler <kennykessler@motorola.com> Submit-Approved: Jira Key
150 lines
5.7 KiB
C
150 lines
5.7 KiB
C
/******************************************************************************
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* File Name: ProgrammingSteps.h
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* Version 1.0
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*
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* Description:
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* This header file contains high level definitions and function declarations
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* associated with programming of the target PSoC 4 device
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*
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* Note:
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*
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*******************************************************************************
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* Copyright (2013), Cypress Semiconductor Corporation.
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*******************************************************************************
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* This software is owned by Cypress Semiconductor Corporation (Cypress) and is
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* protected by and subject to worldwide patent protection (United States and
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* foreign), United States copyright laws and international treaty provisions.
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* Cypress hereby grants to licensee a personal, non-exclusive, non-transferable
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* license to copy, use, modify, create derivative works of, and compile the
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* Cypress Source Code and derivative works for the sole purpose of creating
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* custom software in support of licensee product to be used only in conjunction
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* with a Cypress integrated circuit as specified in the applicable agreement.
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* Any reproduction, modification, translation, compilation, or representation of
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* this software except as specified above is prohibited without the express
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* written permission of Cypress.
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*
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* Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH
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* REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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* Cypress reserves the right to make changes without further notice to the
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* materials described herein. Cypress does not assume any liability arising out
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* of the application or use of any product or circuit described herein. Cypress
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* does not authorize its products for use as critical components in life-support
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* systems where a malfunction or failure may reasonably be expected to result in
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* significant injury to the user. The inclusion of Cypress' product in a life-
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* support systems application implies that the manufacturer assumes all risk of
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* such use and in doing so indemnifies Cypress against all charges. Use may be
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* limited by and subject to the applicable Cypress software license agreement.
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******************************************************************************/
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#ifndef __PROGRAMMINGSTEPS_H
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#define __PROGRAMMINGSTEPS_H
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#include "cycapsense_hssp.h"
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/******************************************************************************
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* Macro definitions
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******************************************************************************/
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/* Return value definitions for high level Programming functions */
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#ifndef FAILURE
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#define FAILURE 0
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#endif
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#ifndef SUCCESS
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#define SUCCESS (!FAILURE)
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#endif
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/* Return value of PollSromStatus function */
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#define SROM_SUCCESS 0x01
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/* Error codes returned by Swd_PacketAck whenever any top-level step returns a
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failure status*/
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/* This bit field is set if programmer fails to acquire the device in 1.5 ms */
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#define PORT_ACQUIRE_TIMEOUT_ERROR 0x10
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/* This bit field is set if the SROM does not return the success status code
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within the SROM Polling timeout duration*/
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#define SROM_TIMEOUT_ERROR 0x20
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/* This bit field is set in case of JTAG ID mismatch or Flash data verification
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mismatch or Checksum data mismatch */
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#define VERIFICATION_ERROR 0x40
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/* This bit field is set if wrong transition of chip protection settings is
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detected */
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#define TRANSITION_ERROR 0x80
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/* Constants for Address Space of CPU */
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#if defined CY8C40xx_FAMILY
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#define CPUSS_SYSREQ 0x40100004
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#define CPUSS_SYSARG 0x40100008
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#else
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#define CPUSS_SYSREQ 0x40000004
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#define CPUSS_SYSARG 0x40000008
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#endif
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#define TEST_MODE 0x40030014
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#define SRAM_PARAMS_BASE 0x20000100
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#define SFLASH_MACRO 0x0FFFF000
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#define SFLASH_CPUSS_PROTECTION 0x0FFFF07C
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/* SROM Constants */
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#define SROM_KEY1 0xB6
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#define SROM_KEY2 0xD3
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#define SROM_SYSREQ_BIT 0x80000000
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#define SROM_PRIVILEGED_BIT 0x10000000
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#define SROM_STATUS_SUCCEEDED 0xA0000000
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#define SROM_STATUS_FAILED 0xF0000000
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/* SROM Commands */
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#define SROM_CMD_GET_SILICON_ID 0x00
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#define SROM_CMD_LOAD_LATCH 0x04
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#define SROM_CMD_PROGRAM_ROW 0x06
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#define SROM_CMD_ERASE_ALL 0x0A
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#define SROM_CMD_CHECKSUM 0x0B
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#define SROM_CMD_WRITE_PROTECTION 0x0D
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#if defined CY8C40xx_FAMILY
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#define SROM_CMD_SET_IMO_48MHZ 0x15
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#endif
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/* Chip Level Protection */
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#define CHIP_PROT_VIRGIN 0x00
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#define CHIP_PROT_OPEN 0x01
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#define CHIP_PROT_PROTECTED 0x02
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#define CHIP_PROT_KILL 0x04
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/* Mask for status code returned by polling SROM */
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#define SROM_STATUS_SUCCESS_MASK 0xF0000000
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/* Constant for computing checksum of entire flash */
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#define CHECKSUM_ENTIRE_FLASH 0x8000
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/* Constant DAP ID of ARM Cortex M0 CPU */
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#define CM0_DAP_ID 0x0BC11477
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#define CM0PLUS_DAP_ID 0x0BC11477
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/* Constant maximum number of rows in PSoC 4 */
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#define ROWS_PER_ARRAY 256
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/******************************************************************************
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* Function Prototypes
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******************************************************************************/
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unsigned char DeviceAcquire(void);
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unsigned char VerifySiliconId(struct hssp_data *d);
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unsigned char EraseAllFlash(struct hssp_data *d);
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unsigned char ChecksumPrivileged(struct hssp_data *d);
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unsigned char ProgramFlash(struct hssp_data *d);
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unsigned char VerifyFlash(struct hssp_data *d);
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unsigned char ProgramProtectionSettings(struct hssp_data *d);
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unsigned char VerifyProtectionSettings(struct hssp_data *d);
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unsigned char VerifyChecksum(struct hssp_data *d);
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unsigned char VerifySwRevision(struct hssp_data *d);
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void ExitProgrammingMode(void);
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unsigned char ReadHsspErrorStatus(void);
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unsigned char ReadSromStatus(void);
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#endif /* __PROGRAMMINGSTEPS_H */
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/* [] END OF FILE */
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