Jagadeesh Kona
5bcd5606db
This reverts commit 42946d7138.
Change-Id: Ia70325b392b7c8f18984f12948342301cabd2acb
394 lines
7.1 KiB
Devicetree
394 lines
7.1 KiB
Devicetree
#include "kona.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. kona v2";
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compatible = "qcom,kona";
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qcom,msm-id = <356 0x20000>;
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};
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&CPU4 {
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dynamic-power-coefficient = <533>;
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};
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&CPU5 {
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dynamic-power-coefficient = <533>;
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};
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&CPU6 {
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dynamic-power-coefficient = <533>;
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};
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&CPU7 {
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dynamic-power-coefficient = <642>;
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};
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&clock_camcc {
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compatible = "qcom,camcc-kona-v2", "syscon";
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};
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&clock_videocc {
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compatible = "qcom,videocc-kona-v2", "syscon";
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};
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&clock_npucc {
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compatible = "qcom,npucc-kona-v2", "syscon";
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};
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&spss_utils {
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qcom,spss-dev-firmware-name = "spss2d"; /* 8 chars max */
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qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */
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qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */
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};
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#include "kona-v2-gpu.dtsi"
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&cpu0_cpu_l3_latmon {
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qcom,core-dev-table =
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< 300000 300000000 >,
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< 403200 403200000 >,
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< 518400 518400000 >,
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< 691200 614400000 >,
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< 883200 825600000 >,
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< 1075200 921600000 >,
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< 1171200 1017600000 >,
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< 1344000 1132800000 >,
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< 1420800 1228800000 >,
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< 1516800 1324800000 >,
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< 1612800 1516800000 >,
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< 1804800 1612800000 >;
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};
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&cpu4_cpu_l3_latmon {
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qcom,core-dev-table =
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< 300000 300000000 >,
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< 825600 614400000 >,
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< 1171200 825600000 >,
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< 1478400 1017600000 >,
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< 1670400 1228800000 >,
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< 2054400 1324800000 >,
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< 2419200 1516800000 >,
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< 2841600 1612800000 >;
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};
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&cpu7_cpu_l3_latmon {
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qcom,core-dev-table =
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< 300000 300000000 >,
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< 825600 614400000 >,
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< 1171200 825600000 >,
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< 1478400 1017600000 >,
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< 1670400 1228800000 >,
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< 2054400 1324800000 >,
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< 2419200 1516800000 >,
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< 2841600 1612800000 >;
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};
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&cpu0_cpu_llcc_latmon {
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qcom,core-dev-table =
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< 300000 MHZ_TO_MBPS( 150, 16) >,
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< 787200 MHZ_TO_MBPS( 300, 16) >,
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< 1516800 MHZ_TO_MBPS( 466, 16) >,
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< 1804800 MHZ_TO_MBPS( 600, 16) >;
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};
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&cpu4_cpu_llcc_latmon {
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qcom,core-dev-table =
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< 300000 MHZ_TO_MBPS( 150, 16) >,
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< 710400 MHZ_TO_MBPS( 300, 16) >,
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< 1056000 MHZ_TO_MBPS( 466, 16) >,
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< 1286400 MHZ_TO_MBPS( 600, 16) >,
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< 1862400 MHZ_TO_MBPS( 806, 16) >,
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< 2419200 MHZ_TO_MBPS( 933, 16) >,
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< 2841600 MHZ_TO_MBPS( 1000, 16) >;
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};
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&cpu0_llcc_ddr_latmon {
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qcom,cachemiss-ev = <0x1000>;
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ddr4-map {
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qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
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qcom,core-dev-table =
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< 300000 MHZ_TO_MBPS( 200, 4) >,
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< 787200 MHZ_TO_MBPS( 451, 4) >,
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< 1171200 MHZ_TO_MBPS( 547, 4) >,
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< 1516800 MHZ_TO_MBPS( 768, 4) >,
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< 1804800 MHZ_TO_MBPS( 1017, 4) >;
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};
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ddr5-map {
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qcom,ddr-type = <DDR_TYPE_LPDDR5>;
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qcom,core-dev-table =
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< 300000 MHZ_TO_MBPS( 200, 4) >,
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< 787200 MHZ_TO_MBPS( 451, 4) >,
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< 1171200 MHZ_TO_MBPS( 547, 4) >,
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< 1516800 MHZ_TO_MBPS( 768, 4) >,
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< 1804800 MHZ_TO_MBPS( 1017, 4) >;
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};
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};
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&cpu4_llcc_ddr_latmon {
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qcom,cachemiss-ev = <0x1000>;
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ddr4-map {
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qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
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qcom,core-dev-table =
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< 300000 MHZ_TO_MBPS( 200, 4) >,
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< 710400 MHZ_TO_MBPS( 451, 4) >,
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< 825600 MHZ_TO_MBPS( 547, 4) >,
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< 1056000 MHZ_TO_MBPS( 768, 4) >,
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< 1286400 MHZ_TO_MBPS(1017, 4) >,
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< 1574400 MHZ_TO_MBPS(1353, 4) >,
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< 1862400 MHZ_TO_MBPS(1555, 4) >,
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< 2419200 MHZ_TO_MBPS(1804, 4) >,
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< 2745600 MHZ_TO_MBPS(2092, 4) >,
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< 2841600 MHZ_TO_MBPS(2736, 4) >;
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};
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ddr5-map {
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qcom,ddr-type = <DDR_TYPE_LPDDR5>;
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qcom,core-dev-table =
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< 300000 MHZ_TO_MBPS( 200, 4) >,
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< 710400 MHZ_TO_MBPS( 451, 4) >,
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< 825600 MHZ_TO_MBPS( 547, 4) >,
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< 1056000 MHZ_TO_MBPS( 768, 4) >,
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< 1286400 MHZ_TO_MBPS(1017, 4) >,
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< 1862400 MHZ_TO_MBPS(1555, 4) >,
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< 2419200 MHZ_TO_MBPS(1804, 4) >,
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< 2745600 MHZ_TO_MBPS(2092, 4) >,
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< 2841600 MHZ_TO_MBPS(2736, 4) >;
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};
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};
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&cpu4_computemon {
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ddr4-map {
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qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
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qcom,core-dev-table =
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< 1862400 MHZ_TO_MBPS( 200, 4) >,
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< 2745600 MHZ_TO_MBPS(1017, 4) >,
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< 2841600 MHZ_TO_MBPS(2092, 4) >;
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};
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ddr5-map {
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qcom,ddr-type = <DDR_TYPE_LPDDR5>;
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qcom,core-dev-table =
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< 1862400 MHZ_TO_MBPS( 200, 4) >,
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< 2745600 MHZ_TO_MBPS(1017, 4) >,
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< 2841600 MHZ_TO_MBPS(2736, 4) >;
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};
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};
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&cpu4_qoslatmon {
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qcom,cachemiss-ev = <0x1000>;
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};
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/* NPU overrides */
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&msm_npu {
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qcom,npu-pwrlevels {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,npu-pwrlevels";
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initial-pwrlevel = <5>;
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qcom,npu-pwrlevel@0 {
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reg = <0>;
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vreg = <1>;
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clk-freq = <19200000
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100000000
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300000000
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300000000
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300000000
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300000000
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200000000
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40000000
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300000000
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100000000
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19200000
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50000000
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50000000
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100000000
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100000000
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100000000
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19200000
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100000000
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19200000
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50000000
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200000000
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200000000
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50000000
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19200000
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300000000
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300000000
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19200000
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300000000>;
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};
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qcom,npu-pwrlevel@1 {
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reg = <1>;
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vreg = <2>;
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clk-freq = <19200000
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200000000
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406000000
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406000000
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406000000
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406000000
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267000000
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40000000
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403000000
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200000000
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19200000
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50000000
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50000000
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200000000
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200000000
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200000000
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19200000
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200000000
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19200000
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50000000
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406000000
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406000000
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50000000
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19200000
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406000000
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406000000
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19200000
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400000000>;
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};
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qcom,npu-pwrlevel@2 {
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reg = <2>;
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vreg = <3>;
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clk-freq = <19200000
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333000000
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533000000
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533000000
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533000000
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533000000
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403000000
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75000000
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533000000
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214000000
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19200000
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50000000
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100000000
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214000000
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214000000
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214000000
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19200000
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214000000
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19200000
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50000000
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533000000
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533000000
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50000000
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19200000
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533000000
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533000000
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19200000
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500000000>;
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};
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qcom,npu-pwrlevel@3 {
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reg = <3>;
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vreg = <4>;
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clk-freq = <19200000
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428000000
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730000000
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730000000
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730000000
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730000000
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533000000
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75000000
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700000000
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300000000
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19200000
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100000000
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200000000
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300000000
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300000000
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300000000
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19200000
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300000000
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19200000
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100000000
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730000000
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730000000
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100000000
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19200000
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730000000
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730000000
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19200000
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660000000>;
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};
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qcom,npu-pwrlevel@4 {
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reg = <4>;
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vreg = <6>;
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clk-freq = <19200000
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500000000
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920000000
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920000000
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920000000
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920000000
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700000000
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75000000
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806000000
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300000000
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19200000
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100000000
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200000000
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300000000
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300000000
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300000000
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19200000
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300000000
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19200000
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100000000
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920000000
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920000000
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100000000
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19200000
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920000000
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920000000
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19200000
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800000000>;
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};
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qcom,npu-pwrlevel@5 {
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reg = <5>;
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vreg = <7>;
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clk-freq = <19200000
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500000000
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1000000000
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1000000000
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1000000000
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1000000000
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700000000
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75000000
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806000000
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300000000
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19200000
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100000000
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200000000
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300000000
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300000000
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300000000
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19200000
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300000000
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19200000
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100000000
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1000000000
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1000000000
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100000000
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19200000
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1000000000
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1000000000
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19200000
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800000000>;
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};
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};
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};
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&cpufreq_hw {
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "dcvsh0_int", "dcvsh1_int", "dcvsh2_int";
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};
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