WHY:sar sensor need seperated firmware HOW:support multi firmware Change-Id: I2a77adb3dea88b57f9f4a85ad463f1d992dfdae4 Signed-off-by: wunan3 <wunan3@lenovo.com> Reviewed-on: https://gerrit.mot.com/2237527 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Hong Zhang <zhangh12@motorola.com> Reviewed-by: Wang Wang <wangwang1@lenovo.com> Submit-Approved: Jira Key
483 lines
9.9 KiB
C
483 lines
9.9 KiB
C
#ifndef _AW9610X_H_
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#define _AW9610X_H_
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#include <linux/regmap.h>
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#include <linux/timer.h>
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#include <linux/workqueue.h>
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#include <linux/hrtimer.h>
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#include <linux/mutex.h>
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#include <linux/cdev.h>
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#include <linux/leds.h>
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#include <linux/regulator/consumer.h>
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#define AW_POWER_ON
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#define AW9610X_CHIP_ID (0xa961)
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#define AW_SAR_SUCCESS (0)
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#define AW_VCC_MIN_UV (2800000)
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#define AW_VCC_MAX_UV (3600000)
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#define AW_SPE_REG_NUM (8)
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#define AW_CLA1_SPE_REG_NUM (6)
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#define AW_SPE_REG_DWORD (8)
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#define AW_DATA_PROCESS_FACTOR (1024)
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#define AW_CHANNEL_NUMBER_TWO 0x02
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#define AW_CHANNEL_NUMBER_THREE 0x03
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#define AW_CHANNEL_NUMBER_FOUR 0x04
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#define AW_CHANNEL_NUMBER_FIVE 0x05
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#if 0
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#define AWLOGD(dev, format, arg...) \
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do {\
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dev_printk(KERN_DEBUG, dev, \
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"[%s:%d] "format"\n", __func__, __LINE__, ##arg);\
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} while (0)
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#define AWLOGI(dev, format, arg...) \
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do {\
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dev_printk(KERN_INFO, dev, \
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"[%s:%d] "format"\n", __func__, __LINE__, ##arg);\
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} while (0)
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#define AWLOGE(dev, format, arg...) \
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do {\
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dev_printk(KERN_ERR, dev, \
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"[%s:%d] "format"\n", __func__, __LINE__, ##arg);\
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} while (0)
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#endif
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/**********************************************
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* cfg load situation
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**********************************************/
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enum aw9610x_cfg_situ {
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AW_CFG_UNLOAD,
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AW_CFG_LOADED,
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};
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/**********************************************
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*spereg cali flag
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**********************************************/
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enum aw9610x_cali_flag {
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AW_NO_CALI,
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AW_CALI,
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};
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enum aw9610x_sar_vers {
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AW9610X = 2,
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AW9610XA = 6,
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AW9610XB = 0xa,
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};
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enum aw9610x_operation_mode {
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AW9610X_ACTIVE_MODE = 1,
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AW9610X_SLEEP_MODE,
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AW9610X_DEEPSLEEP_MODE,
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};
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enum aw9610x_operation_ap_mode {
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AW9610X_SLEEP_AP_MODE = 0,
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AW9610X_ACTIVE_AP_MODE,
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AW9610X_DEEPSLEEP_AP_MODE,
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};
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/**********************************************
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*spereg addr offset
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**********************************************/
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enum aw9610x_spereg_addr_offset {
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AW_CL1SPE_CALI_OS = 20,
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AW_CL1SPE_DEAL_OS = 60,
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AW_CL2SPE_CALI_OS = 4,
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AW_CL2SPE_DEAL_OS = 4,
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};
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/**********************************************
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*the flag of i2c read/write
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**********************************************/
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enum aw9610x_function_flag {
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AW9610X_FUNC_OFF,
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AW9610X_FUNC_ON,
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};
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/**********************************************
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*the flag of i2c read/write
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**********************************************/
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enum aw9610x_i2c_flags {
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AW9610X_I2C_WR,
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AW9610X_I2C_RD,
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};
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/*********************************************************
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* aw9610x error flag:
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* @AW_MALLOC_FAILED: malloc space failed.
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* @AW_CHIPID_FAILED: the chipid is error.
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* @AW_IRQIO_FAILED: irq gpio invalid.
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* @AW_IRQ_REQUEST_FAILED: irq requst failed.
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* @AW_INPUT_ALLOCATE_FILED : inpt malloc failed.
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* @AW_INPUT_REGISTER_FAILED : inpt_dev register failed.
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* @AW_CFG_LOAD_TIME_FAILED : cfg situation not confirmed.
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* @AW_TRIM_ERROR : the chip no trim.
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* @AW_IRQGPIO_FAILED : irq gpio is invalid.
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* @AW_MULTIPLE_SAR_FAILED : sar-num is error in aw9610x.dtsi
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**********************************************************/
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enum aw9610x_err_flags {
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AW_MALLOC_FAILED = 200,
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AW_CHIPID_FAILED,
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AW_IRQIO_FAILED,
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AW_IRQ_REQUEST_FAILED,
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AW_INPUT_ALLOCATE_FILED,
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AW_INPUT_REGISTER_FAILED,
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AW_CFG_LOAD_TIME_FAILED,
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AW_TRIM_ERROR,
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AW_IRQGPIO_FAILED,
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AW_MULTIPLE_SAR_FAILED,
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AW_VERS_ERR,
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};
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/**********************************************
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* mutiple sar define
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**********************************************/
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enum aw9610x_multiple_sar {
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AW_SAR0,
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AW_SAR1,
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AW_SAR_MAX,
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};
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/**********************************************
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* mutiple channel define
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**********************************************/
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enum aw9610x_ichannel {
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AW_CHANNEL0,
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AW_CHANNEL1,
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AW_CHANNEL2,
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AW_CHANNEL3,
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AW_CHANNEL4,
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AW_CHANNEL5,
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AW_CHANNEL_MAX,
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};
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/************************************************************
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* Interrupts near or far from the threshold will be triggered
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*************************************************************/
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enum aw9610x_irq_trigger_position {
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FAR,
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TRIGGER_TH0,
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TRIGGER_TH1 = 0x03,
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TRIGGER_TH2 = 0x07,
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TRIGGER_TH3 = 0x0f,
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};
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struct aw_i2c_package {
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uint8_t addr_bytes;
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uint8_t data_bytes;
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uint8_t reg_num;
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uint8_t init_addr[4];
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uint8_t *p_reg_data;
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};
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struct aw_pad {
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uint8_t curr_state;
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uint8_t last_state;
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struct input_dev *input;
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uint8_t *name;
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};
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struct aw9610x {
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uint8_t cali_flag;
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uint8_t power_prox;
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uint8_t vers;
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uint8_t mode_flag0;
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uint8_t mode_flag1;
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uint8_t pad;
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uint32_t aw_channel_number;
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uint32_t aw_ref_channel;
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const char *aw_ch_name[12];
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int32_t vcc_3v0_Pin;
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int32_t pwr_by_gpio;
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uint32_t sar_num;
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#ifdef CONFIG_USE_HARDWARE_VERSION
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uint32_t hw_version;
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#endif
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int32_t irq_gpio;
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int32_t to_irq;
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uint32_t irq_status;
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uint32_t hostirqen;
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uint32_t first_irq_flag;
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uint32_t mode;
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uint32_t int_state;
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uint16_t read_reg;
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bool read_flag;
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bool pwprox_dete;
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bool firmware_flag;
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bool satu_release;
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bool power_enable;
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struct work_struct ps_notify_work;
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struct notifier_block ps_notif;
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bool ps_is_present;
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struct delayed_work cfg_work;
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struct i2c_client *i2c;
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struct device *dev;
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struct delayed_work dworker; /* work struct for worker function */
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struct aw_bin *aw_bin;
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struct aw_i2c_package aw_i2c_package;
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struct aw_pad *aw_pad;
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struct regulator *vcc;
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uint8_t satu_flag[6];
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uint32_t spedata[8];
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uint32_t satu_data[6];
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uint32_t nvspe_data[8];
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uint8_t chip_name[9];
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uint8_t cfg_name[20];
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uint8_t cfg_vers[2];
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};
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struct aw9610x_cfg {
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int len;
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unsigned int data[];
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};
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struct aw_pad pad_event[] =
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{
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar0_pad0",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar0_pad1",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar0_pad2",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar0_pad3",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar0_pad4",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar0_pad5",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar1_pad0",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar1_pad1",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar1_pad2",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar1_pad3",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar1_pad4",
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},
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{
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.curr_state = 0,
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.last_state = 0,
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//.name = "sar1_pad5",
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},
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};
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uint32_t attr_buf[] = {
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8, 10,
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9, 100,
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10, 1000,
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};
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#ifdef USE_SENSORS_CLASS
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struct sensors_classdev sensors_capsensor_chs[AW_CHANNEL_MAX] = {
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[0 ... AW_CHANNEL_MAX-1] = {
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//.name = "sar0_pad0",
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.vendor = "awinic",
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.version = 1,
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.type = SENSOR_TYPE_MOTO_CAPSENSE,
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.max_range = "5",
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.resolution = "5.0",
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.sensor_power = "0.12",
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.min_delay = 0, /* in microseconds */
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.fifo_reserved_event_count = 0,
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.fifo_max_event_count = 0,
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.enabled = 0,
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.delay_msec = 100,
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.sensors_enable = NULL,
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.sensors_poll_delay = NULL,
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}
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};
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#endif
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/******************************************************
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* Register Detail
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******************************************************/
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uint32_t aw9610x_reg_default[] = {
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0x0000, 0x00003f3f,
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0x0004, 0x00000064,
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0x0008, 0x0017c11e,
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0x000c, 0x05000000,
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0x0010, 0x00093ffd,
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0x0014, 0x19240009,
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0x0018, 0xd81c0207,
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0x001c, 0xff000000,
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0x0020, 0x00241900,
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0x0024, 0x00093ff7,
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0x0028, 0x58020009,
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0x002c, 0xd81c0207,
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0x0030, 0xff000000,
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0x0034, 0x00025800,
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0x0038, 0x00093fdf,
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0x003c, 0x7d3b0009,
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0x0040, 0xd81c0207,
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0x0044, 0xff000000,
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0x0048, 0x003b7d00,
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0x004c, 0x00093f7f,
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0x0050, 0xe9310009,
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0x0054, 0xd81c0207,
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0x0058, 0xff000000,
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0x005c, 0x0031e900,
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0x0060, 0x00093dff,
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0x0064, 0x1a0c0009,
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0x0068, 0xd81c0207,
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0x006c, 0xff000000,
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0x0070, 0x000c1a00,
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0x0074, 0x80093fff,
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0x0078, 0x043d0009,
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0x007c, 0xd81c0207,
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0x0080, 0xff000000,
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0x0084, 0x003d0400,
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0x00a0, 0xe6400000,
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0x00a4, 0x00000000,
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0x00a8, 0x010408d2,
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0x00ac, 0x00000000,
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0x00b0, 0x00000000,
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0x00b8, 0x00005fff,
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0x00bc, 0x00000000,
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0x00c0, 0x00000000,
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0x00c4, 0x00000000,
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0x00c8, 0x00000000,
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0x00cc, 0x00000000,
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0x00d0, 0x00000000,
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0x00d4, 0x00000000,
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0x00d8, 0x00000000,
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0x00dc, 0xe6447800,
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0x00e0, 0x78000000,
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0x00e4, 0x010408d2,
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0x00e8, 0x00000000,
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0x00ec, 0x00000000,
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0x00f4, 0x00005fff,
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0x00f8, 0x00000000,
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0x00fc, 0x00000000,
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0x0100, 0x00000000,
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0x0104, 0x00000000,
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0x0108, 0x00000000,
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0x010c, 0x02000000,
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0x0110, 0x00000000,
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0x0114, 0x00000000,
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0x0118, 0xe6447800,
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0x011c, 0x78000000,
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0x0120, 0x010408d2,
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0x0124, 0x00000000,
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0x0128, 0x00000000,
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0x0130, 0x00005fff,
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0x0134, 0x00000000,
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0x0138, 0x00000000,
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0x013c, 0x00000000,
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0x0140, 0x00000000,
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0x0144, 0x00000000,
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0x0148, 0x02000000,
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0x014c, 0x00000000,
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0x0150, 0x00000000,
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0x0154, 0xe6447800,
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0x0158, 0x78000000,
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0x015c, 0x010408d2,
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0x0160, 0x00000000,
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0x0164, 0x00000000,
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0x016c, 0x00005fff,
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0x0170, 0x00000000,
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0x0174, 0x00000000,
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0x0178, 0x00000000,
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0x017c, 0x00000000,
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0x0180, 0x00000000,
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0x0184, 0x02000000,
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0x0188, 0x00000000,
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0x018c, 0x00000000,
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0x0190, 0xe6447800,
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0x0194, 0x78000000,
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0x0198, 0x010408d2,
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0x019c, 0x00000000,
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0x01a0, 0x00000000,
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0x01a8, 0x00005fff,
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0x01ac, 0x00000000,
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0x01b0, 0x00000000,
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0x01b4, 0x00000000,
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0x01b8, 0x00000000,
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0x01bc, 0x00000000,
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0x01c0, 0x02000000,
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0x01c4, 0x00000000,
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0x01c8, 0x00000000,
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0x01cc, 0xe6407800,
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0x01d0, 0x78000000,
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0x01d4, 0x010408d2,
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0x01d8, 0x00000000,
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0x01dc, 0x00000000,
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0x01e4, 0x00005fff,
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0x01e8, 0x00000000,
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0x01ec, 0x00000000,
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0x01f0, 0x00000000,
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0x01f4, 0x00000000,
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0x01f8, 0x00000000,
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0x01fc, 0x02000000,
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0x0200, 0x00000000,
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0x0204, 0x00000000,
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0x0208, 0x00000008,
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0x020c, 0x0000000d,
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0x41fc, 0x00000000,
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0x4400, 0x00000000,
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0x4410, 0x00000000,
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0x4420, 0x00000000,
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0x4430, 0x00000000,
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0x4440, 0x00000000,
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0x4450, 0x00000000,
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0x4460, 0x00000000,
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0x4470, 0x00000000,
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0xf080, 0x00003018,
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0xf084, 0x00000fff,
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0xf800, 0x00000000,
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0xf804, 0x00002e00,
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0xf8d0, 0x00000001,
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0xf8d4, 0x00000000,
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0xff00, 0x00000301,
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0xff0c, 0x01000000,
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0xffe0, 0x00000000,
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0xfff4, 0x00004011,
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0x0090, 0x00000000,
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0x0094, 0x00000000,
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0x0098, 0x00000000,
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0x009c, 0x3f3f3f3f,
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};
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#endif
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