Lucas Stach db3db8b23f drm/etnaviv: flush shader L1 cache after user commandstream ...

commit 4f8dbadef085ab447a01a8d4806a3f629fea05ed upstream.

The shader L1 cache is a writeback cache for shader loads/stores
and thus must be flushed before any BOs backing the shader buffers
are potentially freed.

Cc: stable@vger.kernel.org
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[uli: backport to 4.19]
Signed-off-by: Ulrich Hecht <uli@kernel.org>

2025-02-07 03:34:28 +01:00

..

drm

drm/etnaviv: flush shader L1 cache after user commandstream

2025-02-07 03:34:28 +01:00

host1x

gpu: host1x: mipi: Update tegra_mipi_request() to be node based

2024-03-26 18:22:37 -04:00

ipu-v3

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vga

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Makefile

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