/ { psci { compatible = "arm,psci-1.0"; method = "smc"; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu-map { cluster0 { }; cluster1 { core0 { cpu = <&CPU0>; }; core1 { cpu = <&CPU1>; }; core2 { cpu = <&CPU2>; }; core3 { cpu = <&CPU3>; }; }; }; CPU0: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x100>; enable-method = "psci"; cpu-release-addr = <0x0 0x90000000>; capacity-dmips-mhz = <1024>; sched-energy-costs = <&CPU_COST_0>; next-level-cache = <&L2_1>; #cooling-cells = <2>; L2_1: l2-cache { compatible = "arm,arch-cache"; cache-level = <2>; }; L1_I_100: l1-icache { compatible = "arm,arch-cache"; }; L1_D_100: l1-dcache { compatible = "arm,arch-cache"; }; }; CPU1: cpu@101 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x101>; enable-method = "psci"; cpu-release-addr = <0x0 0x90000000>; capacity-dmips-mhz = <1024>; sched-energy-costs = <&CPU_COST_0>; next-level-cache = <&L2_1>; #cooling-cells = <2>; L1_I_101: l1-icache { compatible = "arm,arch-cache"; }; L1_D_101: l1-dcache { compatible = "arm,arch-cache"; }; }; CPU2: cpu@102 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x102>; enable-method = "psci"; cpu-release-addr = <0x0 0x90000000>; capacity-dmips-mhz = <1024>; sched-energy-costs = <&CPU_COST_0>; next-level-cache = <&L2_1>; #cooling-cells = <2>; L1_I_102: l1-icache { compatible = "arm,arch-cache"; }; L1_D_102: l1-dcache { compatible = "arm,arch-cache"; }; }; CPU3: cpu@103 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x103>; enable-method = "psci"; cpu-release-addr = <0x0 0x90000000>; capacity-dmips-mhz = <1024>; sched-energy-costs = <&CPU_COST_0>; next-level-cache = <&L2_1>; #cooling-cells = <2>; L1_I_103: l1-icache { compatible = "arm,arch-cache"; }; L1_D_103: l1-dcache { compatible = "arm,arch-cache"; }; }; }; energy_costs: energy-costs { CPU_COST_0: core-cost0 { busy-cost-data = < 656 159 682 172 748 207 827 244 853 256 893 283 958 327 1024 343 >; }; }; };