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(CR) some device config for athena

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- add bathena build config l(CR) guamp
    - EKGUAM-1086

Change-Id: I8185c451630b154b9f4b204adabc75eb0d516f68
Reviewed-on: https://gerrit.mot.com/1818180
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: <xu.caoming@tinno.com>
SLTApproved: <xu.caoming@tinno.com>
SME-Granted: <xu.caoming@tinno.com>
Submit-Approved: <xu.caoming@tinno.com>
Tested-by: <xu.caoming@tinno.com>
(cherry picked from commit ae10912f0dcb02ad07bb0d75d2846598a040986f)
Reviewed-on: https://gerrit.mot.com/2056781
Submit-Approved: Jira Key
Reviewed-by: Suting Xie <xiest1@motorola.com>
This commit is contained in:
Chang Jian authored and Michael Bestas committed 2025-07-19 16:49:24 +03:00
1 parent 1308286638
commit eea1669e45
1 file changed
+40 -42
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arch/arm64/boot/dts/vendor/qcom/bengal-bathena-nfc.dtsi
Vendored
+40 -42
View File
@@ -16,56 +16,54 @@
};
};
&soc {
tlmm: pinctrl@400000 {
nfc {
nfc_enable_active: nfc_enable_active {
/* active state */
mux {
/* 2: Enable 31: Firmware */
pins = "gpio2", "gpio31";
};
config {
pins = "gpio2", "gpio31";
};
&tlmm {
nfc {
nfc_enable_active: nfc_enable_active {
/* active state */
mux {
/* 2: Enable 31: Firmware */
pins = "gpio2", "gpio31";
};
nfc_enable_suspend: nfc_enable_suspend {
/* sleep state */
mux {
/* 2: Enable 31: Firmware */
pins = "gpio2", "gpio31";
};
config {
pins = "gpio2", "gpio31";
};
config {
pins = "gpio2", "gpio31";
};
};
qupv3_se0_spi_pins: qupv3_se0_spi_pins {
qupv3_se0_spi_active: qupv3_se0_spi_active {
mux {
pins = "gpio0", "gpio1",
"gpio3";
};
config {
pins = "gpio0", "gpio1",
"gpio3";
};
nfc_enable_suspend: nfc_enable_suspend {
/* sleep state */
mux {
/* 2: Enable 31: Firmware */
pins = "gpio2", "gpio31";
};
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
mux {
pins = "gpio0", "gpio1",
"gpio3";
};
config {
pins = "gpio2", "gpio31";
};
};
};
qupv3_se0_spi_pins: qupv3_se0_spi_pins {
qupv3_se0_spi_active: qupv3_se0_spi_active {
mux {
pins = "gpio0", "gpio1",
"gpio3";
};
config {
pins = "gpio0", "gpio1",
"gpio3";
};
config {
pins = "gpio0", "gpio1",
"gpio3";
};
};
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
mux {
pins = "gpio0", "gpio1",
"gpio3";
};
config {
pins = "gpio0", "gpio1",
"gpio3";
};
};
};