From 317a01ab275a0ffb5ea5b7a7865908828d56ff5a Mon Sep 17 00:00:00 2001 From: Puneeth Prabhu Date: Wed, 13 Oct 2021 18:14:37 +0530 Subject: [PATCH 1/9] ARM: dts: msm: add support for mi2s and tdm Add support for mi2s and tdm selection options for core vote and clk attributes. Configure tdm slots from dtsi. Disable wcn-bt for kona. Change-Id: Ieb13c9d0a6c8633a0792769711d00ea825be0a27 --- bindings/sound/qcom-audio-dev.txt | 4 ++++ qcom/kona-audio-overlay-ar.dtsi | 6 +++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/bindings/sound/qcom-audio-dev.txt b/bindings/sound/qcom-audio-dev.txt index b6674c266caa..ffef44091880 100644 --- a/bindings/sound/qcom-audio-dev.txt +++ b/bindings/sound/qcom-audio-dev.txt @@ -2007,6 +2007,10 @@ Optional properties: - qcom,msm-mi2s-master: This property is used to inform machine driver if MSM is the clock master of mi2s. 1 means master and 0 means slave. The first entry is primary mi2s; the second entry is secondary mi2s, and so on. +- qcom,tdm-clk-attribute: This property is used to set the clock attribute for tdm. + The first entry is primary tdm; the second entry is secondary tdm, and so on. +- qcom,mi2s-clk-attribute: This property is used to set the clock attribute for mi2s. + The first entry is primary mi2s; the second entry is secondary mi2s, and so on. - qcom,msm-mbhc-hphl-swh: This property is used to distinguish headset HPHL switch type on target typically the switch type will be normally open or normally close, value for this property 0 for normally close and 1 for diff --git a/qcom/kona-audio-overlay-ar.dtsi b/qcom/kona-audio-overlay-ar.dtsi index 67596564bef9..8cc61d5db1f4 100644 --- a/qcom/kona-audio-overlay-ar.dtsi +++ b/qcom/kona-audio-overlay-ar.dtsi @@ -214,8 +214,12 @@ &kona_snd_ar { qcom,model = "kona-mtp-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>; - qcom,wcn-bt = <1>; + qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <0>, <0>; + qcom,wcn-bt = <0>; qcom,ext-disp-audio-rx = <1>; + qcom,tdm-max-slots = <8>; + qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; qcom,audio-routing = "AMIC1", "MIC BIAS1", "MIC BIAS1", "Analog Mic1", From 585c1b2933409a3628079a291647eb279e3d8a6e Mon Sep 17 00:00:00 2001 From: Rajesh Bharathwaj Date: Thu, 14 Oct 2021 16:21:56 -0700 Subject: [PATCH 2/9] ARM: dts: qcom: add battery fg profile for ar-glass Adding 650maH battery profile for AR Glass reference device. Change-Id: Id7b122b3cc70ed5374a0418fc23c9db10b78222b --- qcom/fg-gen4-batterydata-goertek-650mah.dtsi | 123 +++++++++++++++++++ qcom/kona-arglass.dtsi | 9 +- 2 files changed, 128 insertions(+), 4 deletions(-) create mode 100644 qcom/fg-gen4-batterydata-goertek-650mah.dtsi diff --git a/qcom/fg-gen4-batterydata-goertek-650mah.dtsi b/qcom/fg-gen4-batterydata-goertek-650mah.dtsi new file mode 100644 index 000000000000..f85b7aa395d7 --- /dev/null +++ b/qcom/fg-gen4-batterydata-goertek-650mah.dtsi @@ -0,0 +1,123 @@ +qcom,5376013_goertek_oracle_650mah_pm8150b_sept23rd2021 { + /* #5376013_Goertek_Oracle_650mAH_averaged_MasterSlave_Sept23rd2021*/ + qcom,max-voltage-uv = <4480000>; + qcom,fg-cc-cv-threshold-mv = <4470>; + qcom,nom-batt-capacity-mah = <650>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "goertek_oracle_650mah_pm8150b_sept23rd2021"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x3b 0xf2 0x34 0x0b>; + qcom,rslow-low-coeffs = <0x3f 0x0d 0x0c 0xea>; + qcom,checksum = <0x4B53>; + qcom,gui-version = "PM855GUI - 1.0.0.14"; + qcom,fg-profile-data = [ + 09 00 2F 01 + F8 05 9C 03 + 0F FC 00 00 + 3D CC 0D A2 + CC 87 E0 C2 + F1 C5 80 87 + 52 00 3B F2 + 34 0B FE D5 + 9A E2 CE 07 + 32 00 6E F2 + 15 E2 4A E2 + 62 13 97 F2 + FA C5 F1 1A + 15 07 DE CD + 60 00 42 00 + 40 00 3E 00 + 39 00 3D 00 + 3C 00 41 00 + 51 00 54 00 + 4C 00 60 00 + 34 00 3F 00 + 40 00 38 00 + 44 00 36 00 + 61 64 4A 00 + 3B E8 3E 00 + 60 F0 21 00 + 28 08 23 18 + 30 18 3D 00 + 2A 18 53 40 + 30 58 2A 07 + 33 00 D8 00 + 6F 1C 14 0B + 1C 02 59 0D + 6E 19 D9 13 + 4E 0D 1E 1B + B6 18 43 33 + 78 3D 80 03 + 4F 1B 3C 1F + 2A 05 63 0B + 30 05 C3 19 + 85 0A EC 0D + 6B 0B C4 17 + 68 1A C5 2D + 60 3B 85 20 + ED 1E 75 F5 + 3E F3 40 F5 + FE 19 3D EA + 97 04 D5 CA + E3 17 1E A2 + BA 84 0E CA + 87 C0 09 80 + B6 03 29 FD + B7 03 1C 05 + 00 F8 87 E4 + 04 D2 CB DF + 50 E2 8D CC + E4 25 30 00 + E8 E6 85 02 + EF 06 7E 00 + CE 07 32 00 + 15 03 56 02 + C3 05 C9 05 + 62 04 42 02 + C4 02 49 01 + EB 05 60 00 + 39 00 46 00 + 47 64 4B 00 + 52 08 53 10 + 52 08 51 00 + 50 00 3F 08 + 60 08 54 00 + 5B 20 5B 38 + 58 48 6B 15 + 74 00 5E 08 + 6B 10 60 00 + 6C 00 60 00 + 77 08 69 08 + 70 00 5F 20 + 73 38 7E 48 + 60 18 6F 00 + 72 08 8B 10 + D8 08 7F 23 + 9F 04 F1 02 + 83 05 E1 1C + 27 22 DF 3D + 4E 4A C7 18 + 7B 02 65 04 + A4 03 8E 17 + 3F 0A 8C 21 + 99 05 4E 02 + 25 04 9A 1C + 3B 02 F0 05 + 4A 02 C4 18 + 0F 02 69 05 + 49 02 87 00 + 38 22 36 05 + 9E 02 C3 05 + 65 1C 21 02 + D7 04 89 03 + B0 18 07 02 + 67 05 59 02 + 91 00 10 03 + C0 00 FA 00 + 93 02 00 00 + ]; +}; diff --git a/qcom/kona-arglass.dtsi b/qcom/kona-arglass.dtsi index 44430885b67b..1b183b52e3f2 100644 --- a/qcom/kona-arglass.dtsi +++ b/qcom/kona-arglass.dtsi @@ -126,9 +126,9 @@ }; &vendor { - kona_xrfusion_batterydata: qcom,battery-data { + kona_arglass_batterydata: qcom,battery-data { qcom,batt-id-range-pct = <15>; - #include "fg-gen4-batterydata-goertek-6100mah.dtsi" + #include "fg-gen4-batterydata-goertek-650mah.dtsi" }; }; @@ -388,7 +388,7 @@ "sbux_res", "vph_voltage", "chg_temp"; - qcom,battery-data = <&kona_xrfusion_batterydata>; + qcom,battery-data = <&kona_arglass_batterydata>; qcom,sw-jeita-enable; qcom,wd-bark-time-secs = <16>; qcom,suspend-input-on-debug-batt; @@ -398,12 +398,13 @@ &pm8150b_fg { status = "ok"; - qcom,battery-data = <&kona_xrfusion_batterydata>; + qcom,battery-data = <&kona_arglass_batterydata>; qcom,hold-soc-while-full; qcom,linearize-soc; qcom,five-pin-battery; qcom,cl-wt-enable; qcom,soc-scale-mode-en; + qcom,fg-force-load-profile; /* ESR fast calibration */ qcom,fg-esr-timer-chg-fast = <0 7>; qcom,fg-esr-timer-dischg-fast = <0 7>; From b577d5fe158dd673bfe657a005e42c6cf488f2a7 Mon Sep 17 00:00:00 2001 From: Shilpa Suresh Date: Mon, 16 Aug 2021 10:02:11 +0530 Subject: [PATCH 3/9] ARM: dts: msm: Update 8937-coresight dtsi for 4.19 Make appropriate changes to the msm8937-coresight.dtsi file to comply with the new design of the coresight driver files in 4.19 kernel. Change-Id: Ib3557bd12f86f8a2548f878fd97a28e8a0bc4ee0 --- qcom/msm8937-coresight.dtsi | 86 ++++++++++++++++++------------------- 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/qcom/msm8937-coresight.dtsi b/qcom/msm8937-coresight.dtsi index cbaa44a993a3..68477095a580 100644 --- a/qcom/msm8937-coresight.dtsi +++ b/qcom/msm8937-coresight.dtsi @@ -1,7 +1,7 @@ &soc { tmc_etr: tmc@6028000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b961>; + arm,primecell-periphid = <0x000bb961>; reg = <0x6028000 0x1000>, <0x6044000 0x15000>; @@ -10,9 +10,9 @@ interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "byte-cntr-irq"; - arm,buffer-size = <0x100000>; - arm,sg-enable; + arm,buffer-size = <0x400000>; qcom,force-reg-dump; + arm,scatter-gather; coresight-name = "coresight-tmc-etr"; coresight-csr = <&csr>; @@ -32,7 +32,7 @@ tmc_etf: tmc@6027000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b961>; + arm,primecell-periphid = <0x000bb961>; reg = <0x6027000 0x1000>; reg-names = "tmc-base"; @@ -73,7 +73,7 @@ replicator: replicator@6026000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b909>; + arm,primecell-periphid = <0x000bb909>; reg = <0x6026000 0x1000>; reg-names = "replicator-base"; @@ -108,7 +108,7 @@ funnel_in0: funnel@6021000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6021000 0x1000>; reg-names = "funnel-base"; @@ -178,7 +178,7 @@ funnel_center: funnel@6100000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6100000 0x1000>; reg-names = "funnel-base"; @@ -222,7 +222,7 @@ funnel_right: funnel@6120000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6120000 0x1000>; reg-names = "funnel-base"; @@ -266,7 +266,7 @@ funnel_mm: funnel@6130000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6130000 0x1000>; reg-names = "funnel-base"; @@ -327,7 +327,7 @@ funnel_cam: funnel@6132000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6132000 0x1000>; reg-names = "funnel-base"; @@ -347,7 +347,7 @@ funnel_apss: funnel@61a1000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x61a1000 0x1000>; reg-names = "funnel-base"; @@ -613,7 +613,7 @@ stm: stm@6002000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b962>; + arm,primecell-periphid = <0x000bb962>; reg = <0x6002000 0x1000>, <0x9280000 0x180000>; @@ -634,7 +634,7 @@ cti0: cti@6010000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6010000 0x1000>; reg-names = "cti-base"; @@ -647,7 +647,7 @@ cti1: cti@6011000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6011000 0x1000>; reg-names = "cti-base"; @@ -660,7 +660,7 @@ cti2: cti@6012000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6012000 0x1000>; reg-names = "cti-base"; @@ -673,7 +673,7 @@ cti3: cti@6013000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6013000 0x1000>; reg-names = "cti-base"; @@ -686,7 +686,7 @@ cti4: cti@6014000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6014000 0x1000>; reg-names = "cti-base"; @@ -699,7 +699,7 @@ cti5: cti@6015000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6015000 0x1000>; reg-names = "cti-base"; @@ -712,7 +712,7 @@ cti6: cti@6016000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6016000 0x1000>; reg-names = "cti-base"; @@ -725,7 +725,7 @@ cti7: cti@6017000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6017000 0x1000>; reg-names = "cti-base"; @@ -738,7 +738,7 @@ cti8: cti@6018000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6018000 0x1000>; reg-names = "cti-base"; @@ -751,7 +751,7 @@ cti9: cti@6019000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6019000 0x1000>; reg-names = "cti-base"; @@ -764,7 +764,7 @@ cti10: cti@601a000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601a000 0x1000>; reg-names = "cti-base"; @@ -777,7 +777,7 @@ cti11: cti@601b000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601b000 0x1000>; reg-names = "cti-base"; @@ -790,7 +790,7 @@ cti12: cti@601c000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601c000 0x1000>; reg-names = "cti-base"; @@ -803,7 +803,7 @@ cti13: cti@601d000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601d000 0x1000>; reg-names = "cti-base"; @@ -816,7 +816,7 @@ cti14: cti@601e000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601e000 0x1000>; reg-names = "cti-base"; @@ -829,7 +829,7 @@ cti15: cti@601f000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601f000 0x1000>; reg-names = "cti-base"; @@ -842,7 +842,7 @@ cti_cpu0: cti@61b8000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x61b8000 0x1000>; reg-names = "cti-base"; @@ -857,7 +857,7 @@ cti_cpu1: cti@61b9000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x61b9000 0x1000>; reg-names = "cti-base"; @@ -872,7 +872,7 @@ cti_cpu2: cti@61ba000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x61ba000 0x1000>; reg-names = "cti-base"; @@ -887,7 +887,7 @@ cti_cpu3: cti@61bb000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x61bb000 0x1000>; reg-names = "cti-base"; @@ -902,7 +902,7 @@ cti_cpu4: cti@6198000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6198000 0x1000>; reg-names = "cti-base"; @@ -917,7 +917,7 @@ cti_cpu5: cti@6199000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6199000 0x1000>; reg-names = "cti-base"; @@ -932,7 +932,7 @@ cti_cpu6: cti@619a000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x619a000 0x1000>; reg-names = "cti-base"; @@ -947,7 +947,7 @@ cti_cpu7: cti@619b000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x619b000 0x1000>; reg-names = "cti-base"; @@ -962,7 +962,7 @@ cti_modem_cpu0: cti@6124000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6124000 0x1000>; reg-names = "cti-base"; @@ -976,7 +976,7 @@ /* Venus CTI */ cti_video_cpu0: cti@6035000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6035000 0x1000>; reg-names = "cti-base"; @@ -991,7 +991,7 @@ /* Pronto CTI */ cti_wcn_cpu0: cti@6039000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6039000 0x1000>; reg-names = "cti-base"; @@ -1006,7 +1006,7 @@ /* LPASS CTI */ cti_audio_cpu0: cti@613c000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x613c000 0x1000>; reg-names = "cti-base"; @@ -1019,7 +1019,7 @@ cti_rpm_cpu0: cti@610c000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x610c000 0x1000>; reg-names = "cti-base"; @@ -1122,7 +1122,7 @@ tpda: tpda@6003000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b969>; + arm,primecell-periphid = <0x000bb969>; reg = <0x6003000 0x1000>; reg-names = "tpda-base"; @@ -1158,7 +1158,7 @@ tpdm_dcc: tpdm@6110000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b968>; + arm,primecell-periphid = <0x000bb968>; reg = <0x6110000 0x1000>; reg-names = "tpdm-base"; From 6ebb59b5999012660a232a5eff2ae301e6cd2467 Mon Sep 17 00:00:00 2001 From: Chandan Uddaraju Date: Mon, 29 Mar 2021 17:38:57 -0700 Subject: [PATCH 4/9] ARM: dts: msm: add NT36672E panel support on kona Add NT36672E FHD video mode panel support on kona CDP platform. Change-Id: I5f1ba341a73fc85b3e63547ff71e08f0b032c82f --- ...si-panel-nt36672e-fhd-plus-60hz-video.dtsi | 312 ++++++++++++++++++ qcom/kona-cdp-lcd.dtsi | 13 + qcom/kona-cdp.dtsi | 9 + qcom/kona-sde-display.dtsi | 13 + 4 files changed, 347 insertions(+) create mode 100644 qcom/dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi diff --git a/qcom/dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi b/qcom/dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi new file mode 100644 index 000000000000..92f70b56493e --- /dev/null +++ b/qcom/dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi @@ -0,0 +1,312 @@ +&mdss_mdp { + dsi_nt36672e_fhd_plus_60_video: qcom,mdss_dsi_nt36672e_fhd_plus_60_video { + qcom,mdss-dsi-panel-name = + "nt36672e 60 Hz fhd plus video mode panel without DSC"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + qcom,mdss-dsi-tx-eot-append; + qcom,adjust-timer-wakeup-ms = <1>; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <39000 16000 33750 + 39800 13250 34450 7500 3000>; + qcom,mdss-dsi-panel-peak-brightness = <6450000>; + qcom,mdss-dsi-panel-blackness-level = <4961>; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2408>; + qcom,mdss-dsi-h-front-porch = <76>; + qcom,mdss-dsi-h-back-porch = <56>; + qcom,mdss-dsi-h-pulse-width = <12>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <10>; + qcom,mdss-dsi-v-front-porch = <46>; + qcom,mdss-dsi-v-pulse-width = <10>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 B0 00 + 39 01 00 00 00 00 02 C0 00 + 39 01 00 00 00 00 11 C1 89 28 00 08 00 AA 02 0E 00 2B 00 07 0D B7 0C B7 + 39 01 00 00 00 00 03 C2 1B A0 + 39 01 00 00 00 00 02 FF 20 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 01 66 + 39 01 00 00 00 00 02 06 40 + 39 01 00 00 00 00 02 07 38 + 39 01 00 00 00 00 02 2F 83 + 39 01 00 00 00 00 02 69 91 + 39 01 00 00 00 00 02 95 D1 + 39 01 00 00 00 00 02 96 D1 + 39 01 00 00 00 00 02 F2 64 + 39 01 00 00 00 00 02 F3 54 + 39 01 00 00 00 00 02 F4 64 + 39 01 00 00 00 00 02 F5 54 + 39 01 00 00 00 00 02 F6 64 + 39 01 00 00 00 00 02 F7 54 + 39 01 00 00 00 00 02 F8 64 + 39 01 00 00 00 00 02 F9 54 + 39 01 00 00 00 00 02 FF 24 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 01 0F + 39 01 00 00 00 00 02 03 0C + 39 01 00 00 00 00 02 05 1D + 39 01 00 00 00 00 02 08 2F + 39 01 00 00 00 00 02 09 2E + 39 01 00 00 00 00 02 0A 2D + 39 01 00 00 00 00 02 0B 2C + 39 01 00 00 00 00 02 11 17 + 39 01 00 00 00 00 02 12 13 + 39 01 00 00 00 00 02 13 15 + 39 01 00 00 00 00 02 15 14 + 39 01 00 00 00 00 02 16 16 + 39 01 00 00 00 00 02 17 18 + 39 01 00 00 00 00 02 1B 01 + 39 01 00 00 00 00 02 1D 1D + 39 01 00 00 00 00 02 20 2F + 39 01 00 00 00 00 02 21 2E + 39 01 00 00 00 00 02 22 2D + 39 01 00 00 00 00 02 23 2C + 39 01 00 00 00 00 02 29 17 + 39 01 00 00 00 00 02 2A 13 + 39 01 00 00 00 00 02 2B 15 + 39 01 00 00 00 00 02 2F 14 + 39 01 00 00 00 00 02 30 16 + 39 01 00 00 00 00 02 31 18 + 39 01 00 00 00 00 02 32 04 + 39 01 00 00 00 00 02 34 10 + 39 01 00 00 00 00 02 35 1F + 39 01 00 00 00 00 02 36 1F + 39 01 00 00 00 00 02 4D 14 + 39 01 00 00 00 00 02 4E 36 + 39 01 00 00 00 00 02 4F 36 + 39 01 00 00 00 00 02 53 36 + 39 01 00 00 00 00 02 71 30 + 39 01 00 00 00 00 02 79 11 + 39 01 00 00 00 00 02 7A 82 + 39 01 00 00 00 00 02 7B 8F + 39 01 00 00 00 00 02 7D 04 + 39 01 00 00 00 00 02 80 04 + 39 01 00 00 00 00 02 81 04 + 39 01 00 00 00 00 02 82 13 + 39 01 00 00 00 00 02 84 31 + 39 01 00 00 00 00 02 85 00 + 39 01 00 00 00 00 02 86 00 + 39 01 00 00 00 00 02 87 00 + 39 01 00 00 00 00 02 90 13 + 39 01 00 00 00 00 02 92 31 + 39 01 00 00 00 00 02 93 00 + 39 01 00 00 00 00 02 94 00 + 39 01 00 00 00 00 02 95 00 + 39 01 00 00 00 00 02 9C F4 + 39 01 00 00 00 00 02 9D 01 + 39 01 00 00 00 00 02 A0 0F + 39 01 00 00 00 00 02 A2 0F + 39 01 00 00 00 00 02 A3 02 + 39 01 00 00 00 00 02 A4 04 + 39 01 00 00 00 00 02 A5 04 + 39 01 00 00 00 00 02 C6 C0 + 39 01 00 00 00 00 02 C9 00 + 39 01 00 00 00 00 02 D9 80 + 39 01 00 00 00 00 02 E9 02 + 39 01 00 00 00 00 02 FF 25 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 18 22 + 39 01 00 00 00 00 02 19 E4 + 39 01 00 00 00 00 02 21 40 + 39 01 00 00 00 00 02 66 D8 + 39 01 00 00 00 00 02 68 50 + 39 01 00 00 00 00 02 69 10 + 39 01 00 00 00 00 02 6B 00 + 39 01 00 00 00 00 02 6D 0D + 39 01 00 00 00 00 02 6E 48 + 39 01 00 00 00 00 02 72 41 + 39 01 00 00 00 00 02 73 4A + 39 01 00 00 00 00 02 74 D0 + 39 01 00 00 00 00 02 77 62 + 39 01 00 00 00 00 02 79 7E + 39 01 00 00 00 00 02 7D 03 + 39 01 00 00 00 00 02 7E 15 + 39 01 00 00 00 00 02 7F 00 + 39 01 00 00 00 00 02 84 4D + 39 01 00 00 00 00 02 CF 80 + 39 01 00 00 00 00 02 D6 80 + 39 01 00 00 00 00 02 D7 80 + 39 01 00 00 00 00 02 EF 20 + 39 01 00 00 00 00 02 F0 84 + 39 01 00 00 00 00 02 FF 26 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 81 0F + 39 01 00 00 00 00 02 83 01 + 39 01 00 00 00 00 02 84 03 + 39 01 00 00 00 00 02 85 01 + 39 01 00 00 00 00 02 86 03 + 39 01 00 00 00 00 02 87 01 + 39 01 00 00 00 00 02 88 05 + 39 01 00 00 00 00 02 8A 1A + 39 01 00 00 00 00 02 8B 11 + 39 01 00 00 00 00 02 8C 24 + 39 01 00 00 00 00 02 8E 42 + 39 01 00 00 00 00 02 8F 11 + 39 01 00 00 00 00 02 90 11 + 39 01 00 00 00 00 02 91 11 + 39 01 00 00 00 00 02 9A 80 + 39 01 00 00 00 00 02 9B 04 + 39 01 00 00 00 00 02 9C 00 + 39 01 00 00 00 00 02 9D 00 + 39 01 00 00 00 00 02 9E 00 + 39 01 00 00 00 00 02 FF 27 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 01 68 + 39 01 00 00 00 00 02 20 81 + 39 01 00 00 00 00 02 21 6A + 39 01 00 00 00 00 02 25 81 + 39 01 00 00 00 00 02 26 94 + 39 01 00 00 00 00 02 6E 00 + 39 01 00 00 00 00 02 6F 00 + 39 01 00 00 00 00 02 70 00 + 39 01 00 00 00 00 02 71 00 + 39 01 00 00 00 00 02 72 00 + 39 01 00 00 00 00 02 75 00 + 39 01 00 00 00 00 02 76 00 + 39 01 00 00 00 00 02 77 00 + 39 01 00 00 00 00 02 7D 09 + 39 01 00 00 00 00 02 7E 67 + 39 01 00 00 00 00 02 80 23 + 39 01 00 00 00 00 02 82 09 + 39 01 00 00 00 00 02 83 67 + 39 01 00 00 00 00 02 88 01 + 39 01 00 00 00 00 02 89 10 + 39 01 00 00 00 00 02 A5 10 + 39 01 00 00 00 00 02 A6 23 + 39 01 00 00 00 00 02 A7 01 + 39 01 00 00 00 00 02 B6 40 + 39 01 00 00 00 00 02 E5 02 + 39 01 00 00 00 00 02 E6 D3 + 39 01 00 00 00 00 02 EB 03 + 39 01 00 00 00 00 02 EC 28 + 39 01 00 00 00 00 02 FF 2A + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 00 91 + 39 01 00 00 00 00 02 03 20 + 39 01 00 00 00 00 02 07 50 + 39 01 00 00 00 00 02 0A 70 + 39 01 00 00 00 00 02 0C 04 + 39 01 00 00 00 00 02 0D 40 + 39 01 00 00 00 00 02 0F 01 + 39 01 00 00 00 00 02 11 E0 + 39 01 00 00 00 00 02 15 0F + 39 01 00 00 00 00 02 16 A4 + 39 01 00 00 00 00 02 19 0F + 39 01 00 00 00 00 02 1A 78 + 39 01 00 00 00 00 02 1B 23 + 39 01 00 00 00 00 02 1D 36 + 39 01 00 00 00 00 02 1E 3E + 39 01 00 00 00 00 02 1F 3E + 39 01 00 00 00 00 02 20 3E + 39 01 00 00 00 00 02 28 FD + 39 01 00 00 00 00 02 29 12 + 39 01 00 00 00 00 02 2A E1 + 39 01 00 00 00 00 02 2D 0A + 39 01 00 00 00 00 02 30 49 + 39 01 00 00 00 00 02 33 96 + 39 01 00 00 00 00 02 34 FF + 39 01 00 00 00 00 02 35 40 + 39 01 00 00 00 00 02 36 DE + 39 01 00 00 00 00 02 37 F9 + 39 01 00 00 00 00 02 38 45 + 39 01 00 00 00 00 02 39 D9 + 39 01 00 00 00 00 02 3A 49 + 39 01 00 00 00 00 02 4A F0 + 39 01 00 00 00 00 02 7A 09 + 39 01 00 00 00 00 02 7B 40 + 39 01 00 00 00 00 02 7F F0 + 39 01 00 00 00 00 02 83 0F + 39 01 00 00 00 00 02 84 A4 + 39 01 00 00 00 00 02 87 0F + 39 01 00 00 00 00 02 88 78 + 39 01 00 00 00 00 02 89 23 + 39 01 00 00 00 00 02 8B 36 + 39 01 00 00 00 00 02 8C 7D + 39 01 00 00 00 00 02 8D 7D + 39 01 00 00 00 00 02 8E 7D + 39 01 00 00 00 00 02 FF 20 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 11 B0 00 00 00 17 00 49 00 6A 00 89 00 9F 00 B6 00 C8 + 39 01 00 00 00 00 11 B1 00 D9 01 10 01 3A 01 7A 01 A9 01 F2 02 2D 02 2E + 39 01 00 00 00 00 11 B2 02 64 02 A3 02 CA 03 00 03 1E 03 4A 03 59 03 6A + 39 01 00 00 00 00 0F B3 03 7D 03 93 03 AB 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 11 B4 00 00 00 1B 00 51 00 71 00 90 00 A7 00 BF 00 D1 + 39 01 00 00 00 00 11 B5 00 E2 01 1A 01 43 01 83 01 B2 01 FA 02 34 02 36 + 39 01 00 00 00 00 11 B6 02 6B 02 A8 02 D0 03 03 03 21 03 4D 03 5B 03 6B + 39 01 00 00 00 00 0F B7 03 7E 03 94 03 AC 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 11 B8 00 00 00 1B 00 51 00 72 00 92 00 A8 00 BF 00 D1 + 39 01 00 00 00 00 11 B9 00 E2 01 18 01 42 01 81 01 AF 01 F5 02 2F 02 31 + 39 01 00 00 00 00 11 BA 02 68 02 A6 02 CD 03 01 03 1F 03 4A 03 59 03 6A + 39 01 00 00 00 00 0F BB 03 7D 03 93 03 AB 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 02 FF 21 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 11 B0 00 00 00 17 00 49 00 6A 00 89 00 9F 00 B6 00 C8 + 39 01 00 00 00 00 11 B1 00 D9 01 10 01 3A 01 7A 01 A9 01 F2 02 2D 02 2E + 39 01 00 00 00 00 11 B2 02 64 02 A3 02 CA 03 00 03 1E 03 4A 03 59 03 6A + 39 01 00 00 00 00 0F B3 03 7D 03 93 03 AB 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 11 B4 00 00 00 1B 00 51 00 71 00 90 00 A7 00 BF 00 D1 + 39 01 00 00 00 00 11 B5 00 E2 01 1A 01 43 01 83 01 B2 01 FA 02 34 02 36 + 39 01 00 00 00 00 11 B6 02 6B 02 A8 02 D0 03 03 03 21 03 4D 03 5B 03 6B + 39 01 00 00 00 00 0F B7 03 7E 03 94 03 AC 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 11 B8 00 00 00 1B 00 51 00 72 00 92 00 A8 00 BF 00 D1 + 39 01 00 00 00 00 11 B9 00 E2 01 18 01 42 01 81 01 AF 01 F5 02 2F 02 31 + 39 01 00 00 00 00 11 BA 02 68 02 A6 02 CD 03 01 03 1F 03 4A 03 59 03 6A + 39 01 00 00 00 00 0F BB 03 7D 03 93 03 AB 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 02 FF 2C + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 61 1F + 39 01 00 00 00 00 02 62 1F + 39 01 00 00 00 00 02 7E 03 + 39 01 00 00 00 00 02 6A 14 + 39 01 00 00 00 00 02 6B 36 + 39 01 00 00 00 00 02 6C 36 + 39 01 00 00 00 00 02 6D 36 + 39 01 00 00 00 00 02 53 04 + 39 01 00 00 00 00 02 54 04 + 39 01 00 00 00 00 02 55 04 + 39 01 00 00 00 00 02 56 0F + 39 01 00 00 00 00 02 58 0F + 39 01 00 00 00 00 02 59 0F + 39 01 00 00 00 00 02 FF F0 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 5A 00 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 51 FF + 15 01 00 00 00 00 02 53 24 + 15 01 00 00 00 00 02 55 01 + 05 01 00 00 78 00 01 11 + 05 01 00 00 64 00 01 29 + ]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 10 00 01 28 + 05 01 00 00 32 00 01 10 + ]; + }; + }; + }; +}; diff --git a/qcom/kona-cdp-lcd.dtsi b/qcom/kona-cdp-lcd.dtsi index a73e6a220bf6..c5013f270110 100644 --- a/qcom/kona-cdp-lcd.dtsi +++ b/qcom/kona-cdp-lcd.dtsi @@ -40,6 +40,19 @@ /delete-property/ qcom,platform-en-gpio; }; +&dsi_nt36672e_fhd_plus_60_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_lab_ibb>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + /delete-property/ qcom,platform-en-gpio; +}; + &dsi_sharp_qsync_wqhd_cmd { qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; diff --git a/qcom/kona-cdp.dtsi b/qcom/kona-cdp.dtsi index 19e30f642276..383a18b7722d 100644 --- a/qcom/kona-cdp.dtsi +++ b/qcom/kona-cdp.dtsi @@ -309,6 +309,15 @@ qcom,platform-en-gpio = <&tlmm 60 0>; }; +&dsi_nt36672e_fhd_plus_60_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 75 0>; + qcom,platform-en-gpio = <&tlmm 60 0>; +}; + &dsi_sharp_1080_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; diff --git a/qcom/kona-sde-display.dtsi b/qcom/kona-sde-display.dtsi index 5a6bf555a783..22911ac42389 100644 --- a/qcom/kona-sde-display.dtsi +++ b/qcom/kona-sde-display.dtsi @@ -23,6 +23,7 @@ #include "dsi-panel-xrsmrtvwr-jdi-dual-video.dtsi" #include "dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi" #include "dsi-panel-arglass-seeya-dual-1080p-video.dtsi" +#include "dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi" #include &tlmm { @@ -557,6 +558,18 @@ }; }; +&dsi_nt36672e_fhd_plus_60_video { + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 1f 1e 05 + 05 03 02 04 00 12 14]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_sharp_1080_cmd { qcom,ulps-enabled; qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; From 97af62688bdd7e5143fd4bb047d6909b1073c2ac Mon Sep 17 00:00:00 2001 From: Shadab Naseem Date: Fri, 16 Apr 2021 19:23:53 +0530 Subject: [PATCH 5/9] ARM: dts: msm: Add devicetree files for Tron board of Kona Add DT files for Tron board of kona platform Change-Id: I407bf5ed18d6c1a578c420f67316634082ba5ecd --- qcom/Makefile | 3 +++ qcom/kona-cdp-lcd-tron-overlay.dts | 14 ++++++++++++++ qcom/kona-cdp-lcd-tron.dts | 14 ++++++++++++++ 3 files changed, 31 insertions(+) create mode 100644 qcom/kona-cdp-lcd-tron-overlay.dts create mode 100644 qcom/kona-cdp-lcd-tron.dts diff --git a/qcom/Makefile b/qcom/Makefile index 3fb5707b3aab..ad5308120d65 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -2,6 +2,7 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) dtbo-$(CONFIG_ARCH_KONA) += \ kona-cdp-overlay.dtbo \ kona-cdp-lcd-overlay.dtbo \ + kona-cdp-lcd-tron-overlay.dtbo \ kona-mtp-overlay.dtbo \ kona-mtp-ws-overlay.dtbo \ kona-sa-mtp-overlay.dtbo \ @@ -15,6 +16,7 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) kona-cdp-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-cdp-lcd-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb +kona-cdp-lcd-tron-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-mtp-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-mtp-ws-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-sa-mtp-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb @@ -36,6 +38,7 @@ dtb-$(CONFIG_ARCH_KONA) += kona-rumi.dtb \ kona-arglass.dtb \ kona-cdp.dtb \ kona-cdp-lcd.dtb \ + kona-cdp-lcd-tron.dtb \ kona-qrd.dtb \ kona-v2-rumi.dtb \ kona-v2-mtp.dtb \ diff --git a/qcom/kona-cdp-lcd-tron-overlay.dts b/qcom/kona-cdp-lcd-tron-overlay.dts new file mode 100644 index 000000000000..efee808e20c0 --- /dev/null +++ b/qcom/kona-cdp-lcd-tron-overlay.dts @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +#include "kona-cdp-lcd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona CDP (LCD) tron"; + compatible = "qcom,kona-cdp", "qcom,kona", "qcom,cdp"; + qcom,board-id = <0x01020001 0>; +}; + +&mdm0 { + status = "disabled"; +}; diff --git a/qcom/kona-cdp-lcd-tron.dts b/qcom/kona-cdp-lcd-tron.dts new file mode 100644 index 000000000000..b367423cc726 --- /dev/null +++ b/qcom/kona-cdp-lcd-tron.dts @@ -0,0 +1,14 @@ +/dts-v1/; + +#include "kona.dtsi" +#include "kona-cdp-lcd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona CDP (LCD) tron"; + compatible = "qcom,kona-cdp", "qcom,kona", "qcom,cdp"; + qcom,board-id = <0x01020001 0>; +}; + +&mdm0 { + status = "disabled"; +}; From 8d93cd54bf59d08fc83c63e5d050c46eca6f96ca Mon Sep 17 00:00:00 2001 From: Prashant Beniwal Date: Mon, 19 Apr 2021 13:58:56 +0530 Subject: [PATCH 6/9] ARM: dts: msm: add touch support on tron target This change adds touch support for NT36672E FHD video mode panel on tron LCD CDP platform. Change-Id: I117e447e5be3d23449735602cb677c209a4a45ba --- qcom/kona-cdp.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/qcom/kona-cdp.dtsi b/qcom/kona-cdp.dtsi index 19e30f642276..8235ac305e32 100644 --- a/qcom/kona-cdp.dtsi +++ b/qcom/kona-cdp.dtsi @@ -202,6 +202,26 @@ panel = <&dsi_r66451_amoled_144hz_cmd>; }; + + novatek@62 { + compatible = "novatek,NVT-ts"; + reg = <0x62>; + + interrupt-parent = <&tlmm>; + interrupts = <39 0x2008>; + + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", + "pmx_ts_release"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + pinctrl-2 = <&pmx_ts_release>; + + novatek,reset-gpio = <&tlmm 38 0x00>; + novatek,irq-gpio = <&tlmm 39 0x2008>; + + panel = <&dsi_nt36672e_fhd_plus_60_video>; + + }; }; &vendor { From 1b6b002137d34e13435bb2ed5de4e453911e152c Mon Sep 17 00:00:00 2001 From: Zhenlin Lian Date: Thu, 28 Oct 2021 18:04:55 +0800 Subject: [PATCH 7/9] ARM: dts: msm: Set msm_vidc compatiable with qcs8250-vidc for RB5 kona-vidc is for kona mobile. qcs8250-vidc is for kona IoT. Change-Id: I5ba3bc337d439daeb868122dc9e10919a6743921 --- qcom/kona-v2.1-iot-rb5.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/qcom/kona-v2.1-iot-rb5.dtsi b/qcom/kona-v2.1-iot-rb5.dtsi index a81bced50570..4b2aa986b610 100644 --- a/qcom/kona-v2.1-iot-rb5.dtsi +++ b/qcom/kona-v2.1-iot-rb5.dtsi @@ -196,6 +196,10 @@ }; &soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,qcs8250-vidc"; + }; + clk40M: can_clock { compatible = "fixed-clock"; #clock-cells = <0>; From 53d0e5b9f6a26789b8a68524dd2191cc8f4c7833 Mon Sep 17 00:00:00 2001 From: Asha Magadi Venkateshamurthy Date: Tue, 26 Jan 2021 21:48:20 +0530 Subject: [PATCH 8/9] ARM: dts: msm: Update adc peripherals for SPF targets Update SPMI based adc drivers instead of qpnp drivers for SPF targets to take care of the driver changes for vadc, temp-alarm, chg, bms, adc_tm, required for msm-4.19 kernel. Change-Id: I2db5ae18c7d7aaa93079b89c261884ba8708ba75 --- qcom/pm8916.dtsi | 104 ++++++++------ qcom/pm8937.dtsi | 265 +++++++++++++++++++----------------- qcom/pm8953.dtsi | 230 +++++++++++++++---------------- qcom/qm215-pm8916.dtsi | 231 ++++++++++++++++--------------- qcom/qm215-qrd-smb1360.dtsi | 3 + qcom/sdm439-pm8953.dtsi | 4 +- 6 files changed, 433 insertions(+), 404 deletions(-) diff --git a/qcom/pm8916.dtsi b/qcom/pm8916.dtsi index f10c0094586d..f5059b43cf63 100644 --- a/qcom/pm8916.dtsi +++ b/qcom/pm8916.dtsi @@ -1,3 +1,4 @@ +#include #include #include @@ -76,63 +77,67 @@ pm8916_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100 0x100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,vadc-poll-eoc; - qcom,pmic-revid = <&pm8916_revid>; - #thermal-sensor-cells = <1>; + #io-channel-cells = <1>; - chan@8 { + die_temp { + reg = ; label = "die_temp"; - reg = <8>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@9 { + ref_625mv { + reg = ; label = "ref_625mv"; - reg = <9>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@a { + ref_1250v { + reg = ; label = "ref_1250v"; - reg = <0xa>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; + }; + + ref_buf_625mv { + reg = ; + label = "ref_buf_625mv"; + qcom,pre-scaling = <1 1>; + }; + + ref_vdd { + reg = ; + label = "ref_vdd"; + qcom,pre-scaling = <1 1>; + }; + + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; }; }; - pm8916_tz: qcom,temp-alarm@2400 { + pm8916_tz: temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400 0x100>; - interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; - label = "pm8916_tz"; - qcom,channel-num = <8>; - qcom,threshold-set = <0>; - qcom,temp_alarm-vadc = <&pm8916_vadc>; + interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm8916_vadc VADC_DIE_TEMP>; + io-channel-names = "thermal"; #thermal-sensor-cells = <0>; }; + pm8916_adc_tm_iio: adc_tm_iio { + compatible = "qcom,adc-tm5-iio"; + reg = <0x3500 0x100>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + }; + pm8916_adc_tm: vadc@3400 { - compatible = "qcom,adc-tm-rev2"; + compatible = "qcom,qpnp-adc-tm"; reg = <0x3400 0x100>; #address-cells = <1>; #size-cells = <0>; @@ -142,10 +147,15 @@ interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; - qcom,adc-bit-resolution = <15>; qcom,adc-vdd-reference = <1800>; - qcom,adc_tm-vadc = <&pm8916_vadc>; + #thermal-sensor-cells = <1>; qcom,pmic-revid = <&pm8916_revid>; + io-channels = <&pm8916_vadc VADC_REF_625MV>, + <&pm8916_vadc VADC_REF_1250MV>, + <&pm8916_vadc VADC_VDD_VADC>, + <&pm8916_vadc VADC_GND_REF>; + io-channel-names = "ref_625mv", "ref_1250v", "ref_vdd", + "ref_gnd"; }; pm8916_chg: qcom,charger { @@ -170,7 +180,9 @@ qcom,batt-cold-percentage = <80>; qcom,tchg-mins = <232>; qcom,resume-soc = <99>; - qcom,chg-vadc = <&pm8916_vadc>; + io-channels = <&pm8916_vadc VADC_VBAT_SNS>, + <&pm8916_vadc VADC_LR_MUX1_BAT_THERM>; + io-channel-names = "vbat_sns", "batt_therm"; qcom,chg-adc_tm = <&pm8916_adc_tm>; status = "disabled"; @@ -231,7 +243,15 @@ qcom,s3-ocv-tolerence-uv = <1200>; qcom,s2-fifo-length = <5>; qcom,low-soc-fifo-length = <2>; - qcom,bms-vadc = <&pm8916_vadc>; + io-channels = <&pm8916_vadc VADC_REF_625MV>, + <&pm8916_vadc VADC_REF_1250MV>, + <&pm8916_vadc VADC_VBAT_SNS>, + <&pm8916_vadc VADC_LR_MUX1_BAT_THERM>, + <&pm8916_vadc VADC_DIE_TEMP>, + <&pm8916_vadc VADC_LR_MUX2_BAT_ID>; + io-channel-names = "ref_625mv", "ref_1250v", + "vbat_sns", "batt_therm", + "die_temp", "batt_id"; qcom,bms-adc_tm = <&pm8916_adc_tm>; qcom,pmic-revid = <&pm8916_revid>; diff --git a/qcom/pm8937.dtsi b/qcom/pm8937.dtsi index 2a9ed1933f21..701ad1c52687 100644 --- a/qcom/pm8937.dtsi +++ b/qcom/pm8937.dtsi @@ -1,3 +1,7 @@ +#include +#include +#include + &spmi_bus { qcom,pm8937@0 { @@ -37,14 +41,12 @@ }; }; - pm8937_temp_alarm: qcom,temp-alarm@2400 { + pm8937_tz: qcom,temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400 0x100>; interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; - label = "pm8937_tz"; - qcom,channel-num = <8>; - qcom,threshold-set = <0>; - qcom,temp_alarm-vadc = <&pm8937_vadc>; + io-channels = <&pm8937_vadc VADC_DIE_TEMP>; + io-channel-names = "thermal"; #thermal-sensor-cells = <0>; }; @@ -104,185 +106,197 @@ pm8937_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100 0x100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,vadc-poll-eoc; - #thermal-sensor-cells = <1>; + #io-channel-cells = <1>; + io-channel-ranges; pinctrl-names = "default"; pinctrl-0 = <&pa_therm1_default &cas_therm_default>; - chan@5 { + /* Channel nodes */ + vcoin { + reg = ; label = "vcoin"; - reg = <5>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@7 { + vph_pwr { + reg = ; label = "vph_pwr"; - reg = <7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@8 { + die_temp { + reg = ; label = "die_temp"; - reg = <8>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@9 { + ref_625mv { + reg = ; label = "ref_625mv"; - reg = <9>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@a { + ref_1250v { + reg = ; label = "ref_1250v"; - reg = <0xa>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@c { + ref_buf_625mv { + reg = ; label = "ref_buf_625mv"; - reg = <0xc>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@36 { + ref_vdd { + reg = ; + label = "ref_vdd"; + qcom,pre-scaling = <1 1>; + }; + + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@11 { + pa_therm1 { + reg = ; label = "pa_therm1"; - reg = <0x11>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@32 { + xo_therm { + reg = ; label = "xo_therm"; - reg = <0x32>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@3c { + xo_therm_buf { + reg = ; label = "xo_therm_buf"; - reg = <0x3c>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@13 { + case_therm { + reg = ; label = "case_therm"; - reg = <0x13>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + }; + + pm8937_adc_tm_iio: adc_tm_iio { + compatible = "qcom,adc-tm5-iio"; + reg = <0x3500 0x100>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + io-channels = <&pm8937_vadc VADC_P_MUX2_1_1>, + <&pm8937_vadc VADC_LR_MUX3_XO_THERM>, + <&pm8937_vadc + VADC_LR_MUX3_BUF_XO_THERM>, + <&pm8937_vadc VADC_P_MUX4_1_1>; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm_buf { + reg = ; + label = "xo_therm_buf"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + case_therm { + reg = ; + label = "case_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; }; pm8937_adc_tm: vadc@3400 { - compatible = "qcom,adc-tm-rev2"; + compatible = "qcom,qpnp-adc-tm"; reg = <0x3400 0x100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, <0x0 0x34 0x3 IRQ_TYPE_EDGE_RISING>, <0x0 0x34 0x4 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set", + interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,adc_tm-vadc = <&pm8937_vadc>; #thermal-sensor-cells = <1>; + qcom,adc-vdd-reference = <1800>; + io-channels = <&pm8937_vadc VADC_REF_625MV>, + <&pm8937_vadc VADC_REF_1250MV>, + <&pm8937_vadc VADC_VDD_VADC>, + <&pm8937_vadc VADC_GND_REF>; + io-channel-names = "ref_625mv", "ref_1250v", "ref_vdd", + "ref_gnd"; - chan@36 { + pa_therm0 { label = "pa_therm0"; - reg = <0x36>; + reg = ; + io-channels = <&pm8937_vadc VADC_LR_MUX7_HW_ID>; + io-channel-names = "pa_therm0"; qcom,decimation = <0>; qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; + qcom,ratiometric; + qcom,scale-fn-type = <2>; qcom,hw-settle-time = <2>; qcom,fast-avg-setup = <0>; qcom,btm-channel-number = <0x48>; qcom,thermal-node; }; - chan@7 { + vph_pwr { label = "vph_pwr"; - reg = <0x7>; + reg = ; + io-channels = <&pm8937_vadc VADC_VSYS>; + io-channel-names = "vph_pwr"; qcom,decimation = <0>; qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; + qcom,scale-fn-type = <0>; qcom,hw-settle-time = <0>; qcom,fast-avg-setup = <0>; qcom,btm-channel-number = <0x68>; }; }; - }; pm8937_1: qcom,pm8937@1 { @@ -307,7 +321,7 @@ pa-therm1-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_vadc 0x11>; + thermal-sensors = <&pm8937_adc_tm_iio VADC_P_MUX2_1_1>; thermal-governor = "user_space"; wake-capable-sensor; @@ -323,7 +337,7 @@ xo-therm-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_vadc 0x32>; + thermal-sensors = <&pm8937_adc_tm_iio VADC_LR_MUX3_XO_THERM>; thermal-governor = "user_space"; wake-capable-sensor; @@ -339,7 +353,8 @@ xo-therm-buf-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_vadc 0x3c>; + thermal-sensors = <&pm8937_adc_tm_iio + VADC_LR_MUX3_BUF_XO_THERM>; thermal-governor = "user_space"; wake-capable-sensor; @@ -355,7 +370,7 @@ case-therm-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_vadc 0x13>; + thermal-sensors = <&pm8937_adc_tm_iio VADC_P_MUX4_1_1>; thermal-governor = "user_space"; wake-capable-sensor; @@ -371,7 +386,7 @@ pa-therm0-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_adc_tm 0x36>; + thermal-sensors = <&pm8937_adc_tm VADC_LR_MUX7_HW_ID>; thermal-governor = "user_space"; wake-capable-sensor; @@ -385,10 +400,10 @@ }; pm8937_tz { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-governor = "step_wise"; - thermal-sensors = <&pm8937_temp_alarm>; + thermal-sensors = <&pm8937_tz>; wake-capable-sensor; trips { diff --git a/qcom/pm8953.dtsi b/qcom/pm8953.dtsi index 05a07ecfdedd..ba8b0711e65e 100644 --- a/qcom/pm8953.dtsi +++ b/qcom/pm8953.dtsi @@ -1,3 +1,7 @@ +#include +#include +#include + &spmi_bus { qcom,pm8953@0 { @@ -41,10 +45,8 @@ compatible = "qcom,spmi-temp-alarm"; reg = <0x2400 0x100>; interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; - label = "pm8953_tz"; - qcom,channel-num = <8>; - qcom,threshold-set = <0>; - qcom,temp_alarm-vadc = <&pm8953_vadc>; + io-channels = <&pm8953_vadc VADC_DIE_TEMP>; + io-channel-names = "thermal"; #thermal-sensor-cells = <0>; }; @@ -103,178 +105,166 @@ pm8953_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100 0x100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,vadc-poll-eoc; - #thermal-sensor-cells = <1>; + #io-channel-cells = <1>; + io-channel-ranges; pinctrl-names = "default"; pinctrl-0 = <&pa_therm1_default &cas_therm_default>; - chan@5 { + /* Channel nodes */ + vcoin { + reg = ; label = "vcoin"; - reg = <5>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@7 { + vph_pwr { + reg = ; label = "vph_pwr"; - reg = <7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@8 { + die_temp { + reg = ; label = "die_temp"; - reg = <8>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@9 { + ref_625mv { + reg = ; label = "ref_625mv"; - reg = <9>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@a { + ref_1250v { + reg = ; label = "ref_1250v"; - reg = <0xa>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@c { + ref_buf_625mv { + reg = ; label = "ref_buf_625mv"; - reg = <0xc>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@36 { + ref_vdd { + reg = ; + label = "ref_vdd"; + qcom,pre-scaling = <1 1>; + }; + + ref_gnd { + reg = ; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@11 { + pa_therm1 { + reg = ; label = "pa_therm1"; - reg = <0x11>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - - chan@32 { + xo_therm { + reg = ; label = "xo_therm"; - reg = <0x32>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@3c { + xo_therm_buf { + reg = ; label = "xo_therm_buf"; - reg = <0x3c>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@13 { + case_therm { + reg = ; label = "case_therm"; - reg = <0x13>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + }; + + pm8953_adc_tm_iio: adc_tm_iio { + compatible = "qcom,adc-tm5-iio"; + reg = <0x3500 0x100>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + io-channels = <&pm8953_vadc VADC_LR_MUX3_BUF_XO_THERM>; + + xo_therm_buf { + reg = ; + label = "xo_therm_buf"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; }; pm8953_adc_tm: vadc@3400 { - compatible = "qcom,adc-tm-rev2"; + compatible = "qcom,qpnp-adc-tm"; reg = <0x3400 0x100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, <0x0 0x34 0x3 IRQ_TYPE_EDGE_RISING>, <0x0 0x34 0x4 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set", + interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,adc_tm-vadc = <&pm8953_vadc>; #thermal-sensor-cells = <1>; + qcom,adc-vdd-reference = <1800>; + io-channels = <&pm8953_vadc VADC_REF_625MV>, + <&pm8953_vadc VADC_REF_1250MV>, + <&pm8953_vadc VADC_VDD_VADC>, + <&pm8953_vadc VADC_GND_REF>; + io-channel-names = "ref_625mv", "ref_1250v", "ref_vdd", + "ref_gnd"; - chan@36 { + pa_therm0 { label = "pa_therm0"; - reg = <0x36>; + reg = ; + io-channels = <&pm8953_vadc VADC_LR_MUX7_HW_ID>; + io-channel-names = "pa_therm0"; qcom,pre-div-channel-scaling = <0>; qcom,decimation = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; + qcom,ratiometric; + qcom,scale-fn-type = <2>; qcom,hw-settle-time = <2>; qcom,btm-channel-number = <0x48>; qcom,fast-avg-setup = <0>; qcom,thermal-node; }; - chan@32 { + xo_therm { label = "xo_therm"; - reg = <0x32>; + reg = ; + io-channels = <&pm8953_vadc + VADC_LR_MUX3_XO_THERM>; + io-channel-names = "xo_therm"; qcom,pre-div-channel-scaling = <0>; qcom,decimation = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; + qcom,ratiometric; + qcom,scale-fn-type = <4>; qcom,hw-settle-time = <2>; qcom,btm-channel-number = <0x68>; qcom,fast-avg-setup = <0>; @@ -329,7 +319,7 @@ xo-therm-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8953_adc_tm 0x32>; + thermal-sensors = <&pm8953_adc_tm VADC_LR_MUX3_XO_THERM>; thermal-governor = "user_space"; wake-capable-sensor; @@ -345,7 +335,8 @@ xo-therm-buf-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8953_vadc 0x3c>; + thermal-sensors = <&pm8953_adc_tm_iio + VADC_LR_MUX3_BUF_XO_THERM>; thermal-governor = "user_space"; wake-capable-sensor; @@ -358,9 +349,10 @@ }; }; - pm8953_tz { - polling-delay-passive = <0>; + pm8953_temp_alarm: pm8953_tz { + polling-delay-passive = <100>; polling-delay = <0>; + thermal-governor = "step_wise"; thermal-sensors = <&pm8953_tz>; wake-capable-sensor; diff --git a/qcom/qm215-pm8916.dtsi b/qcom/qm215-pm8916.dtsi index 2433e885a68b..13797f130d83 100644 --- a/qcom/qm215-pm8916.dtsi +++ b/qcom/qm215-pm8916.dtsi @@ -198,165 +198,159 @@ }; &pm8916_vadc { - chan@0 { + #thermal-sensor-cells = <1>; + usb_in { + reg = ; label = "usb_in"; - reg = <0>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <7>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 10>; }; - chan@2 { + ireg_fb { + reg = ; label = "ireg_fb"; - reg = <2>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <6>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <10 81>; }; - chan@5 { + vcoin { + reg = ; label = "vcoin"; - reg = <5>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@6 { + vbat_sns { + reg = ; label = "vbat_sns"; - reg = <6>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@7 { + vph_pwr { + reg = ; label = "vph_pwr"; - reg = <7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@b { + chg_temp { + reg = ; label = "chg_temp"; - reg = <0xb>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@11 { + skin_therm { + reg = ; label = "skin_therm"; - reg = <0x11>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@30 { + batt_therm { + reg = ; label = "batt_therm"; - reg = <0x30>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; qcom,calibration-type = "ratiometric"; - qcom,scale-function = <26>; - qcom,hw-settle-time = <0xb>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <2000>; + qcom,pre-scaling = <1 1>; }; - chan@31 { + batt_id { + reg = ; label = "batt_id"; - reg = <0x31>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0xb>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <2000>; + qcom,pre-scaling = <1 1>; }; - chan@36 { + pa_therm0 { + reg = ; label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@32 { + xo_therm { + reg = ; label = "xo_therm"; - reg = <0x32>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@3c { + xo_therm_buf { + reg = ; label = "xo_therm_buf"; - reg = <0x3c>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8916_adc_tm_iio { + io-channels = <&pm8916_vadc VADC_LR_MUX3_BUF_XO_THERM>, + <&pm8916_vadc VADC_LR_MUX3_XO_THERM>, + <&pm8916_vadc VADC_LR_MUX7_HW_ID>, + <&pm8916_vadc VADC_P_MUX2_1_1>; + io-channel-names = "xo_therm_buf", "xo_therm", "pa_therm0", + "skin_therm"; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm_buf { + reg = ; + label = "xo_therm_buf"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + skin_therm { + reg = ; + label = "skin_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; }; &pm8916_adc_tm { - /* Channel Node */ - chan@30 { + /* Channel Nodes */ + batt_therm { + reg = ; label = "batt_therm"; - reg = <0x30>; - qcom,decimation = <0>; + io-channels = <&pm8916_vadc VADC_LR_MUX1_BAT_THERM>; + io-channel-names = "batt_therm"; qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <8>; + qcom,decimation = <0>; + qcom,ratiometric; qcom,hw-settle-time = <0xb>; + qcom,scale-fn-type = <8>; qcom,fast-avg-setup = <0x2>; qcom,btm-channel-number = <0x48>; }; - chan@6 { + vbat_sns { + reg = ; label = "vbat_sns"; - reg = <0x6>; - qcom,decimation = <0>; + io-channels = <&pm8916_vadc VADC_VBAT_SNS>; + io-channel-names = "vbat_sns"; qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; + qcom,decimation = <0>; qcom,hw-settle-time = <0xb>; + qcom,scale-fn-type = <0>; qcom,fast-avg-setup = <0x2>; qcom,btm-channel-number = <0x68>; }; @@ -367,7 +361,8 @@ xo-therm-buf-adc { polling-delay-passive = <0>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x3c>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_LR_MUX3_BUF_XO_THERM>; thermal-governor = "user_space"; trips { @@ -382,7 +377,8 @@ xo-therm-adc { polling-delay-passive = <0>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x32>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_LR_MUX3_XO_THERM>; thermal-governor = "user_space"; trips { @@ -397,7 +393,8 @@ pa-therm0-adc { polling-delay-passive = <0>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x36>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_LR_MUX7_HW_ID>; thermal-governor = "user_space"; trips { @@ -412,7 +409,8 @@ skin-therm-adc { polling-delay-passive = <0>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x11>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_P_MUX2_1_1>; thermal-governor = "user_space"; trips { @@ -433,7 +431,7 @@ }; pm8916_tz { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-governor = "step_wise"; thermal-sensors = <&pm8916_tz>; @@ -462,7 +460,8 @@ xo-therm-step { polling-delay-passive = <1000>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x32>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_LR_MUX3_XO_THERM>; thermal-governor = "step_wise"; trips { diff --git a/qcom/qm215-qrd-smb1360.dtsi b/qcom/qm215-qrd-smb1360.dtsi index 84e9e78b983f..97568702a5ff 100644 --- a/qcom/qm215-qrd-smb1360.dtsi +++ b/qcom/qm215-qrd-smb1360.dtsi @@ -1,4 +1,5 @@ #include "qm215-qrd.dtsi" +#include &pm8916_chg { qcom,use-external-charger; @@ -71,6 +72,8 @@ qcom,cool-bat-mv = <4200>; qcom,warm-bat-ma = <1000>; qcom,cool-bat-ma = <1000>; + io-channels = <&pm8916_vadc VADC_LR_MUX2_BAT_ID>; + io-channel-names = "batt_id"; status= "okay"; }; }; diff --git a/qcom/sdm439-pm8953.dtsi b/qcom/sdm439-pm8953.dtsi index c3b2649e8b1d..27b9179e421d 100644 --- a/qcom/sdm439-pm8953.dtsi +++ b/qcom/sdm439-pm8953.dtsi @@ -271,7 +271,7 @@ pa-therm0 { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8953_adc_tm 0x36>; + thermal-sensors = <&pm8953_adc_tm VADC_LR_MUX7_HW_ID>; thermal-governor = "user_space"; wake-capable-sensor; @@ -287,7 +287,7 @@ &pm8953_vadc { pinctrl-0 = <&pa_therm1_default>; - /delete-node/ chan@13; + /delete-node/ case_therm; }; &pm8953_mpps { From ea06905be792234524cbadeac8ea1ac670294246 Mon Sep 17 00:00:00 2001 From: Soumya Managoli Date: Mon, 8 Nov 2021 11:16:39 +0530 Subject: [PATCH 9/9] ARM: dts: msm: Add audio support on Khaje ATP Enable sound node for Khaje ATP. Change-Id: Ib82ce27b610128bb65cb245f0f68de80c2163e4f --- qcom/khaje-atp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/qcom/khaje-atp.dtsi b/qcom/khaje-atp.dtsi index 298556373991..50b6b9a1f194 100644 --- a/qcom/khaje-atp.dtsi +++ b/qcom/khaje-atp.dtsi @@ -1,6 +1,7 @@ #include #include #include +#include "bengal-audio-overlay.dtsi" #include "khaje-sde-display.dtsi" #include "khaje-pm7250b.dtsi"