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arm/dts: Capri: txd/tm mipi clk update

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Capri 2nd/3rd txd/tm panels
mipi clk update

Change-Id: I63dee7b620ef412fbf19a981503808498793a3cd
Signed-off-by: hujing3 <hujing3@lenovo.com>
Reviewed-on: https://gerrit.mot.com/1790901
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Wang Wang <wangwang1@lenovo.com>
Submit-Approved: Jira Key
This commit is contained in:
hujing3 authored and Carlos Pinho committed 2023-05-31 17:01:02 -03:00
1 parent 81f3b0abdd
commit b27430a9bc
1 file changed
+51 -51
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qcom/bengal-capri-display.dtsi
+51 -51
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@@ -179,8 +179,8 @@
//Capri panel#3
&dsi_tm_ili9882n_652_video {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2e>;
qcom,mdss-dsi-t-clk-post = <0x0A>;
qcom,mdss-dsi-t-clk-pre = <0x21>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
"src_byte_clk0", "src_pixel_clk0",
"shadow_byte_clk0", "shadow_pixel_clk0";
@@ -208,11 +208,11 @@
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings =
[23 1F 07 09 05 02 04 a0
23 1F 07 09 05 02 04 a0
23 1F 07 09 05 02 04 a0
23 1F 07 09 05 02 04 a0
23 19 08 08 05 02 04 a0];
[1F 1C 05 06 03 02 04 a0
1F 1C 05 06 03 02 04 a0
1F 1C 05 06 03 02 04 a0
1F 1C 05 06 03 02 04 a0
1F 0F 05 06 03 02 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
@@ -263,8 +263,8 @@
//Capri plus panel#2
&dsi_txd_ili9882n_652_video {
qcom,mdss-dsi-t-clk-post = <0x0A>;
qcom,mdss-dsi-t-clk-pre = <0x1E>;
qcom,mdss-dsi-t-clk-post = <0x0D>;
qcom,mdss-dsi-t-clk-pre = <0x2E>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
"src_byte_clk0", "src_pixel_clk0",
"shadow_byte_clk0", "shadow_pixel_clk0";
@@ -289,48 +289,6 @@
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,platform-reset-gpio = <&tlmm 82 0>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings =
[1E 1C 04 06 02 02 04 a0
1E 1C 04 06 02 02 04 a0
1E 1C 04 06 02 02 04 a0
1E 1C 04 06 02 02 04 a0
1E 0E 04 05 02 02 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
//Capri plus panel#3
&dsi_tianma_ili9882n_652_video {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2e>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
"src_byte_clk0", "src_pixel_clk0",
"shadow_byte_clk0", "shadow_pixel_clk0";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <16>;
qcom,mdss-dsi-bl-max-level = <1637>;
qcom,bklt-dcs-2bytes-enabled;
qcom,mdss-brightness-max-level = <1637>;
qcom,mdss-dsi-hbm-type = "lcd-dcs-only";
qcom,mdss-dsi-panel-hbm-is-51cmd;
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command =[06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <4>;
qcom,mdss-dsi-panel-status-valid-params = <1>;
qcom,mdss-dsi-no-panel-on-read-support;
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,platform-reset-gpio = <&tlmm 82 0>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings =
@@ -345,6 +303,48 @@
};
};
//Capri plus panel#3
&dsi_tianma_ili9882n_652_video {
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2f>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
"src_byte_clk0", "src_pixel_clk0",
"shadow_byte_clk0", "shadow_pixel_clk0";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <16>;
qcom,mdss-dsi-bl-max-level = <1637>;
qcom,bklt-dcs-2bytes-enabled;
qcom,mdss-brightness-max-level = <1637>;
qcom,mdss-dsi-hbm-type = "lcd-dcs-only";
qcom,mdss-dsi-panel-hbm-is-51cmd;
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command =[06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <4>;
qcom,mdss-dsi-panel-status-valid-params = <1>;
qcom,mdss-dsi-no-panel-on-read-support;
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,platform-reset-gpio = <&tlmm 82 0>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings =
[24 1E 08 09 05 02 04 a0
24 1E 08 09 05 02 04 a0
24 1E 08 09 05 02 04 a0
24 1E 08 09 05 02 04 a0
24 1A 08 09 05 02 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&mot_dummy_vid_qhd {
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
"src_byte_clk0", "src_pixel_clk0",