From 59866a5d3d4e40ce881dcd571b153a027b007a42 Mon Sep 17 00:00:00 2001
From: Vinayak Menon <vinmenon@qti.qualcomm.com>
Date: Thu, 10 Sep 2020 12:49:27 +0530
Subject: [PATCH 01/38] ARM: dts: msm: switch off kpti on some targets

Switch off kpti on targets not vulnerable and thus
does not require the mitigation.

Change-Id: I9aec5e5db1e4aa91c0633bf0b3665978af6a6a6f
---
 qcom/bengal.dtsi | 2 +-
 qcom/kona.dtsi   | 2 +-
 qcom/lagoon.dtsi | 2 +-
 qcom/lito.dtsi   | 2 +-
 qcom/scuba.dtsi  | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/qcom/bengal.dtsi b/qcom/bengal.dtsi
index 57c71b8e3382..8ca1a988bc7f 100644
--- a/qcom/bengal.dtsi
+++ b/qcom/bengal.dtsi
@@ -446,7 +446,7 @@
 	};
 
 	chosen {
-		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
+		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 kpti=off";
 	};
 
 	soc: soc { };
diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi
index b5e7f665f6b1..1adc0969a984 100644
--- a/qcom/kona.dtsi
+++ b/qcom/kona.dtsi
@@ -347,7 +347,7 @@
 	};
 
 	chosen {
-		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
+		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 kpti=off";
 	};
 
 	firmware: firmware {
diff --git a/qcom/lagoon.dtsi b/qcom/lagoon.dtsi
index b59baf1311f1..7c2b7e3817fe 100644
--- a/qcom/lagoon.dtsi
+++ b/qcom/lagoon.dtsi
@@ -325,7 +325,7 @@
 	};
 
 	chosen {
-		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 earlycon=msm_geni_serial,0x98c000";
+		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 earlycon=msm_geni_serial,0x98c000 kpti=off";
 	};
 
 	soc: soc { };
diff --git a/qcom/lito.dtsi b/qcom/lito.dtsi
index 3c95d8663d61..238902bb5a67 100644
--- a/qcom/lito.dtsi
+++ b/qcom/lito.dtsi
@@ -528,7 +528,7 @@
 	};
 
 	chosen {
-		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 earlycon=msm_geni_serial,0x888000";
+		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 earlycon=msm_geni_serial,0x888000 kpti=off";
 	};
 
 	soc: soc { };
diff --git a/qcom/scuba.dtsi b/qcom/scuba.dtsi
index e2bd59da09ec..0167a7ac449d 100644
--- a/qcom/scuba.dtsi
+++ b/qcom/scuba.dtsi
@@ -324,7 +324,7 @@
 	};
 
 	chosen {
-		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
+		bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 kpti=off";
 	};
 
 	soc: soc { };

From 1571d842d7c998e5c480a740ac088a4cc89606d6 Mon Sep 17 00:00:00 2001
From: Kavya Nunna <knunna@qti.qualcomm.com>
Date: Tue, 8 Sep 2020 10:53:02 +0530
Subject: [PATCH 02/38] ARM: dts: msm: Add pmic support for litomagnus

Add pmk8350 support and update parent for pm8008
for litomagnus.

Change-Id: I32e76d72e1167322f9a50fdd09ce2fc6c615872f
---
 qcom/litomagnus-cdp.dtsi | 8 ++++++++
 qcom/litomagnus-mtp.dtsi | 8 ++++++++
 qcom/litomagnus.dtsi     | 5 +++++
 3 files changed, 21 insertions(+)

diff --git a/qcom/litomagnus-cdp.dtsi b/qcom/litomagnus-cdp.dtsi
index f8657a3de8c7..de3dcd32ed2e 100644
--- a/qcom/litomagnus-cdp.dtsi
+++ b/qcom/litomagnus-cdp.dtsi
@@ -3,3 +3,11 @@
 &soc {
 
 };
+
+&pm8150_rtc {
+	status = "disabled";
+};
+
+&pmk8350_adc_tm {
+	status = "disabled";
+};
diff --git a/qcom/litomagnus-mtp.dtsi b/qcom/litomagnus-mtp.dtsi
index 17bffaf7b93c..f7fe249c44bc 100644
--- a/qcom/litomagnus-mtp.dtsi
+++ b/qcom/litomagnus-mtp.dtsi
@@ -3,3 +3,11 @@
 &soc {
 
 };
+
+&pm8150_rtc {
+	status = "disabled";
+};
+
+&pmk8350_adc_tm {
+	status = "disabled";
+};
diff --git a/qcom/litomagnus.dtsi b/qcom/litomagnus.dtsi
index 14a56234266e..40e796f62513 100644
--- a/qcom/litomagnus.dtsi
+++ b/qcom/litomagnus.dtsi
@@ -1,6 +1,11 @@
 #include "lito-v2.dtsi"
+#include "pmk8350.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Litomagnus";
 	compatible = "qcom,lito";
 };
+
+&pm8008_regulators {
+	vdd_l6-supply = <&BOB>;
+};

From fa50e452a75aea1f8d156c691992ac3b543944cb Mon Sep 17 00:00:00 2001
From: Asha Magadi Venkateshamurthy <c_amagad@qti.qualcomm.com>
Date: Thu, 10 Sep 2020 13:58:17 +0530
Subject: [PATCH 03/38] ARM: dts: msm: add default cachemiss-ev for ddr memlat
 on sdm660

cachemiss event if not configured, driver will not set to default
value resulting in probe error. So setting cachemiss-ev to default
0x17 which is L2DM_EV.

Change-Id: Ic90cbbf93fbf9073874aa39aa5869cef6e45160f
---
 qcom/sdm660.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qcom/sdm660.dtsi b/qcom/sdm660.dtsi
index 4deeb1605318..f851f2cf4838 100644
--- a/qcom/sdm660.dtsi
+++ b/qcom/sdm660.dtsi
@@ -1105,6 +1105,7 @@
 			compatible = "qcom,arm-memlat-mon";
 			qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;
 			qcom,target-dev = <&cpu0_cpu_ddr_lat>;
+			qcom,cachemiss-ev = <0x17>;
 			qcom,core-dev-table =
 				< 902400 MHZ_TO_MBPS(200, 4) >,
 				< 1401600 MHZ_TO_MBPS(547, 4) >,
@@ -1130,6 +1131,7 @@
 			compatible = "qcom,arm-memlat-mon";
 			qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;
 			qcom,target-dev = <&cpu4_cpu_ddr_lat>;
+			qcom,cachemiss-ev = <0x17>;
 			qcom,core-dev-table =
 				< 1113600 MHZ_TO_MBPS(200, 4) >,
 				< 1401600 MHZ_TO_MBPS(1017, 4) >,

From b9421c4f05aab67ce6c4efae1fb684fde9882393 Mon Sep 17 00:00:00 2001
From: Faiyaz Mohammed <faiyazm@qti.qualcomm.com>
Date: Mon, 14 Sep 2020 11:34:58 +0530
Subject: [PATCH 04/38] ARM: dts: msm: reduce common cma region into 16MB

For low ram Scuba, reduce the common cma region from 32MB
into 16MB to save memory.

Change-Id: I77a323c7cc86da03b09da40dc5b34aafa274e5d8
---
 qcom/scuba-low-ram.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/qcom/scuba-low-ram.dtsi b/qcom/scuba-low-ram.dtsi
index 8a6b97e58792..30f105a2291d 100644
--- a/qcom/scuba-low-ram.dtsi
+++ b/qcom/scuba-low-ram.dtsi
@@ -34,6 +34,10 @@
 			alignment = <0x0 0x400000>;
 			size = <0x0 0x400000>;
 		};
+
+		linux,cma {
+			size = <0x0 0x1000000>;
+		};
 	};
 };
 

From 46c1ca948157a9cdddc178a27c82018cbbca4a34 Mon Sep 17 00:00:00 2001
From: Mohammed Siddiq <msiddiq@qti.qualcomm.com>
Date: Mon, 14 Sep 2020 14:10:12 +0530
Subject: [PATCH 05/38] ARM: dts: msm: Add cnss-enable-self-recovery flag for
 kona

Add cnss-enable-self-recovery flag for kona. It enables
self recovery on link down. Update the documentation
for the cnss-enable-self-recovery flag.

Change-Id: Ifd9f3c23ec8e6c56874f6964cd8134520c2e9c6d
---
 bindings/cnss/cnss-wlan.txt | 2 ++
 qcom/kona.dtsi              | 1 +
 2 files changed, 3 insertions(+)

diff --git a/bindings/cnss/cnss-wlan.txt b/bindings/cnss/cnss-wlan.txt
index a8526d3cd24b..e59298c28f7d 100644
--- a/bindings/cnss/cnss-wlan.txt
+++ b/bindings/cnss/cnss-wlan.txt
@@ -77,6 +77,8 @@ Optional properties:
                              and off sequences.
   - qcom,converged-dt: Boolean property to decide whether it supports multiple
                        WLAN devices.
+  - cnss-enable-self-recovery: Boolean property to enable self recovery when
+                               recovery is trigeered with reason link down.
 
 Example:
 
diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi
index b5e7f665f6b1..3de090f5778b 100644
--- a/qcom/kona.dtsi
+++ b/qcom/kona.dtsi
@@ -4722,6 +4722,7 @@
 		cnss-daemon-support;
 		qcom,cmd_db_name = "smpf2";
 		qcom,set-wlaon-pwr-ctrl;
+		cnss-enable-self-recovery;
 
 		qcom,msm-bus,name = "msm-cnss";
 		qcom,msm-bus,num-cases = <7>;

From 03bc38df3be556a042c6d8558aadf28245db1611 Mon Sep 17 00:00:00 2001
From: Kavya Nunna <knunna@qti.qualcomm.com>
Date: Tue, 15 Sep 2020 12:00:35 +0530
Subject: [PATCH 06/38] ARM: dts: msm: Add pmic support for orchid

Add pmk8350 support and update parent for pm8008
for orchid.

Change-Id: I6c07e2264ecf969b14f476f7e683fa7983eb8d04
---
 qcom/orchid-cdp.dtsi | 8 ++++++++
 qcom/orchid-mtp.dtsi | 9 +++++++++
 qcom/orchid.dtsi     | 5 +++++
 3 files changed, 22 insertions(+)

diff --git a/qcom/orchid-cdp.dtsi b/qcom/orchid-cdp.dtsi
index ffa68adfbc8b..dadff325fc72 100644
--- a/qcom/orchid-cdp.dtsi
+++ b/qcom/orchid-cdp.dtsi
@@ -53,3 +53,11 @@
 	qcom,wsa-devs = <&wsa883x_0221>, <&wsa883x_0222>;
 	qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight";
 };
+
+&pm8150_rtc {
+	status = "disabled";
+};
+
+&pmk8350_adc_tm {
+	status = "disabled";
+};
diff --git a/qcom/orchid-mtp.dtsi b/qcom/orchid-mtp.dtsi
index ac824096d08b..3ea6d12ad323 100644
--- a/qcom/orchid-mtp.dtsi
+++ b/qcom/orchid-mtp.dtsi
@@ -53,3 +53,12 @@
 	qcom,wsa-devs = <&wsa883x_0221>, <&wsa883x_0222>;
 	qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight";
 };
+
+
+&pm8150_rtc {
+	status = "disabled";
+};
+
+&pmk8350_adc_tm {
+	status = "disabled";
+};
diff --git a/qcom/orchid.dtsi b/qcom/orchid.dtsi
index d0d72d332c93..524f94b05366 100644
--- a/qcom/orchid.dtsi
+++ b/qcom/orchid.dtsi
@@ -1,7 +1,12 @@
 #include "lito-v2.dtsi"
+#include "pmk8350.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. Orchid";
 	compatible = "qcom,orchid";
 	qcom,msm-id = <476 0x10000>;
 };
+
+&pm8008_regulators {
+	vdd_l6-supply = <&BOB>;
+};

From 84503aa0c2cd3ccf87bed6d0ef8d5172bba71f6a Mon Sep 17 00:00:00 2001
From: Vijayanand Jitta <vjitta@qti.qualcomm.com>
Date: Tue, 14 Jul 2020 01:30:56 -0700
Subject: [PATCH 07/38] ARM: dts: msm: Upgrade Kona's memory map to version 7

Upgrade Kona's memory map to version 7, which adds a
carveout of 80 KB for UEFI/XBL minidump logging.

Change-Id: Ifbb686b196a21110fa484eace50428f095749aab
---
 qcom/kona.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi
index b5e7f665f6b1..f42c2428514b 100644
--- a/qcom/kona.dtsi
+++ b/qcom/kona.dtsi
@@ -393,6 +393,12 @@
 			no-map;
 		};
 
+		reserved_xbl_uefi_log: res_xbl_uefi_log_region@80880000 {
+			compatible = "removed-dma-pool";
+			no-map;
+			reg = <0x0 0x80880000 0x0 0x14000>;
+		};
+
 		smem_mem: smem_region@80900000 {
 			no-map;
 			reg = <0x0 0x80900000 0x0 0x200000>;

From 94e8e08c6890416e6d97336c92531179e71d9521 Mon Sep 17 00:00:00 2001
From: Shashi Kant Maurya <c_smaury@qti.qualcomm.com>
Date: Mon, 14 Sep 2020 15:59:39 +0530
Subject: [PATCH 08/38] ARM: dts: msm: Correct the dev_id for hdmi cpu-dai

Add the attribute to enable ext-disp-audio dai
support and correct the dev_id for hdmi cpu-dai
on SDM660.

Change-Id: I73afb5de119f708e71549538640084cd666a90fc
---
 qcom/msm-audio.dtsi    | 2 +-
 qcom/sdm660-audio.dtsi | 6 ++++--
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/qcom/msm-audio.dtsi b/qcom/msm-audio.dtsi
index 4499da5a08d8..2d6b7050554e 100644
--- a/qcom/msm-audio.dtsi
+++ b/qcom/msm-audio.dtsi
@@ -95,7 +95,7 @@
 
 	dai_dp: qcom,msm-dai-q6-dp {
 		compatible = "qcom,msm-dai-q6-hdmi";
-		qcom,msm-dai-q6-dev-id = <24608>;
+		qcom,msm-dai-q6-dev-id = <0>;
 	};
 
 	loopback: qcom,msm-pcm-loopback {
diff --git a/qcom/sdm660-audio.dtsi b/qcom/sdm660-audio.dtsi
index ff8a0a4835b2..204fb1488c78 100644
--- a/qcom/sdm660-audio.dtsi
+++ b/qcom/sdm660-audio.dtsi
@@ -15,6 +15,7 @@
 		qcom,mi2s-audio-intf;
 		qcom,auxpcm-audio-intf;
 		qcom,wcn-btfm;
+		qcom,ext-disp-audio-rx;
 		qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
 		qcom,msm-mclk-freq = <9600000>;
 		qcom,msm-mbhc-hphl-swh = <1>;
@@ -87,7 +88,7 @@
 				<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
 				<&dai_quin_tdm_rx_0>, <&dai_quin_tdm_tx_0>,
 				<&proxy_rx>, <&proxy_tx>;
-		asoc-cpu-names = "msm-dai-q6-dp.24608",
+		asoc-cpu-names = "msm-dai-q6-dp.0",
 				"msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
 				"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
 				"msm-dai-q6-mi2s.4", "msm-dai-q6-mi2s.7",
@@ -129,6 +130,7 @@
 		qcom,mi2s-audio-intf;
 		qcom,auxpcm-audio-intf;
 		qcom,wcn-btfm;
+		qcom,ext-disp-audio-rx;
 		qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
 		qcom,audio-routing =
 			"AIF4 VI", "MCLK",
@@ -197,7 +199,7 @@
 				<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
 				<&dai_quin_tdm_rx_0>, <&dai_quin_tdm_tx_0>,
 				<&proxy_rx>, <&proxy_tx>;
-		asoc-cpu-names = "msm-dai-q6-dp.24608", "msm-dai-q6-mi2s.0",
+		asoc-cpu-names = "msm-dai-q6-dp.0", "msm-dai-q6-mi2s.0",
 				"msm-dai-q6-mi2s.1", "msm-dai-q6-mi2s.2",
 				"msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.4",
 				"msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",

From be2f985c54b71692db3fec934747eabc53ec130e Mon Sep 17 00:00:00 2001
From: Rajesh Bharathwaj <rabharat@qti.qualcomm.com>
Date: Wed, 16 Sep 2020 23:13:06 -0700
Subject: [PATCH 09/38] ARM: dts: msm: Update DMIC for SKU3 platform

Updating the DMIC and MIC_BIAS for SKU3 platform.

Change-Id: I17716a8132e30095e0c6e9b688500c57220d39df
---
 qcom/kona-xrfusion-ult.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/qcom/kona-xrfusion-ult.dtsi b/qcom/kona-xrfusion-ult.dtsi
index d9d507ca1be1..13cdd3ce0856 100644
--- a/qcom/kona-xrfusion-ult.dtsi
+++ b/qcom/kona-xrfusion-ult.dtsi
@@ -257,14 +257,16 @@
 		"MIC BIAS1", "Digital Mic2",
 		"DMIC3", "MIC BIAS1",
 		"MIC BIAS1", "Digital Mic3",
-		"DMIC4", "MIC BIAS3",
-		"MIC BIAS3", "Digital Mic4",
+		"DMIC4", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic4",
 		"DMIC5", "MIC BIAS3",
 		"MIC BIAS3", "Digital Mic5",
-		"DMIC6", "MIC BIAS4",
-		"MIC BIAS4", "Digital Mic6",
+		"DMIC6", "MIC BIAS3",
+		"MIC BIAS3", "Digital Mic6",
 		"DMIC7", "MIC BIAS4",
 		"MIC BIAS4", "Digital Mic7",
+		"DMIC8", "MIC BIAS4",
+		"MIC BIAS4", "Digital Mic8",
 		"IN1_HPHL", "HPHL_OUT",
 		"IN2_HPHR", "HPHR_OUT",
 		"IN3_AUX", "AUX_OUT",

From 8f5abb84d40446c80ef2cac7fed25cbb1c8eaa86 Mon Sep 17 00:00:00 2001
From: "Tao,Zhang" <taozha@qti.qualcomm.com>
Date: Thu, 17 Sep 2020 23:03:34 +0800
Subject: [PATCH 10/38] ARM: dts: msm: Extend pmic dump size for bengal

Extend pmic dump size to 256k for bengal.

Change-Id: Ia7904a9c760694cfa649805e1a652ef942a47061
---
 qcom/bengal.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/bengal.dtsi b/qcom/bengal.dtsi
index 57c71b8e3382..0c49322184f6 100644
--- a/qcom/bengal.dtsi
+++ b/qcom/bengal.dtsi
@@ -1317,7 +1317,7 @@
 		};
 
 		pmic {
-			qcom,dump-size = <0x10000>;
+			qcom,dump-size = <0x40000>;
 			qcom,dump-id = <0xe4>;
 		};
 

From c19d63ac8e814bc91b20dedd3827aa579a561a8f Mon Sep 17 00:00:00 2001
From: Udipto Goswami <ugoswami@qti.qualcomm.com>
Date: Fri, 18 Sep 2020 11:51:39 +0530
Subject: [PATCH 11/38] ARM: dts: msm: Add USB support for orchid

This change adds usb support on orchid.
Also the vdd-supply of usb_qmp_dp_phy has
changed for orchid so including the updated
one.

Change-Id: I6e57510d513a5338bb51024ca2cc72b95640df00
---
 qcom/orchid-cdp.dtsi | 5 +++++
 qcom/orchid-mtp.dtsi | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/qcom/orchid-cdp.dtsi b/qcom/orchid-cdp.dtsi
index dadff325fc72..5dfa8f06a5d2 100644
--- a/qcom/orchid-cdp.dtsi
+++ b/qcom/orchid-cdp.dtsi
@@ -4,6 +4,11 @@
 
 };
 
+&usb_qmp_dp_phy {
+	/delete-property/vdd-supply;
+	vdd-supply = <&L11A>;
+};
+
 &wsa_macro {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";
diff --git a/qcom/orchid-mtp.dtsi b/qcom/orchid-mtp.dtsi
index 3ea6d12ad323..2886b158a4ab 100644
--- a/qcom/orchid-mtp.dtsi
+++ b/qcom/orchid-mtp.dtsi
@@ -4,6 +4,11 @@
 
 };
 
+&usb_qmp_dp_phy {
+	/delete-property/vdd-supply;
+	vdd-supply = <&L11A>;
+};
+
 &wsa_macro {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";

From c04685dc5f05e26f465bfa74ce4425203af139ec Mon Sep 17 00:00:00 2001
From: priyankar <prigup@qti.qualcomm.com>
Date: Mon, 17 Aug 2020 19:21:01 +0530
Subject: [PATCH 12/38] ARM: dts: msm: Add SW_CTRL entry in dtsi file

This patch contains changes for adding SW_CTRL entry in:
  1- bengal.dtsi
  2- lagoon.dtsi
  3- scuba.dtsi
for BT node.

Change-Id: I70fc5feb3adbf42eac815c13c17aef602cfa3f27
---
 qcom/bengal.dtsi | 1 +
 qcom/lagoon.dtsi | 1 +
 qcom/scuba.dtsi  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/qcom/bengal.dtsi b/qcom/bengal.dtsi
index 57c71b8e3382..3e18e2853d2d 100644
--- a/qcom/bengal.dtsi
+++ b/qcom/bengal.dtsi
@@ -630,6 +630,7 @@
 
 	bluetooth: bt_wcn3990 {
 		compatible = "qca,wcn3990";
+		qca,bt-sw-ctrl-gpio = <&tlmm 87 0>; /* SW_CTRL */
 		qca,bt-vdd-io-supply =   <&L9A>;  /* IO */
 		qca,bt-vdd-core-supply = <&L17A>; /* RFA */
 		qca,bt-vdd-pa-supply =   <&L23A>; /* CH0 */
diff --git a/qcom/lagoon.dtsi b/qcom/lagoon.dtsi
index b59baf1311f1..416d88c483b9 100644
--- a/qcom/lagoon.dtsi
+++ b/qcom/lagoon.dtsi
@@ -536,6 +536,7 @@
 
 	bluetooth: bt_wcn3990 {
 		compatible = "qca,wcn3990";
+		qca,bt-sw-ctrl-gpio = <&tlmm 69 0>; /* SW_CTRL */
 		qca,bt-vdd-io-supply =   <&L11A>;  /* IO */
 		qca,bt-vdd-core-supply = <&L2E>; /* RFA */
 		qca,bt-vdd-pa-supply =   <&L10E>; /* CH0 */
diff --git a/qcom/scuba.dtsi b/qcom/scuba.dtsi
index e2bd59da09ec..99ad5e0b8466 100644
--- a/qcom/scuba.dtsi
+++ b/qcom/scuba.dtsi
@@ -2222,6 +2222,7 @@
 
 	bluetooth: bt_wcn3990 {
 		compatible = "qca,wcn3990";
+		qca,bt-sw-ctrl-gpio = <&tlmm 87 0>; /* SW_CTRL */
 		qca,bt-vdd-io-supply =   <&L15A>; /* IO */
 		qca,bt-vdd-core-supply = <&L10A>; /* RFA */
 		qca,bt-vdd-pa-supply =   <&L22A>; /* CH0 */

From 8d19057ad754972367f2cc33c3f62066989f327c Mon Sep 17 00:00:00 2001
From: Rajat Gupta <rajatgu@qti.qualcomm.com>
Date: Mon, 21 Sep 2020 06:13:09 +0530
Subject: [PATCH 13/38] ARM: dts: msm: update supply source for 0p9 supply

Update supply source for 0p9 supply for orchid target as per
specification.

Change-Id: Ibed761ee7af7debb4f0da8bc958d663b6e69fafa
---
 qcom/orchid-cdp.dtsi | 4 ++++
 qcom/orchid-mtp.dtsi | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/qcom/orchid-cdp.dtsi b/qcom/orchid-cdp.dtsi
index 5dfa8f06a5d2..e782c342d9c2 100644
--- a/qcom/orchid-cdp.dtsi
+++ b/qcom/orchid-cdp.dtsi
@@ -9,6 +9,10 @@
 	vdd-supply = <&L11A>;
 };
 
+&sde_dp {
+	vdda-0p9-supply = <&L11A>;
+};
+
 &wsa_macro {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";
diff --git a/qcom/orchid-mtp.dtsi b/qcom/orchid-mtp.dtsi
index 2886b158a4ab..cc7e19363a7e 100644
--- a/qcom/orchid-mtp.dtsi
+++ b/qcom/orchid-mtp.dtsi
@@ -9,6 +9,10 @@
 	vdd-supply = <&L11A>;
 };
 
+&sde_dp {
+	vdda-0p9-supply = <&L11A>;
+};
+
 &wsa_macro {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";

From c5c26494418592a5a76a377b97b92c373b8b7f09 Mon Sep 17 00:00:00 2001
From: Jagadeesh Kona <jkona@qti.qualcomm.com>
Date: Wed, 2 Sep 2020 13:19:49 +0530
Subject: [PATCH 14/38] dt-bindings: clk: Add support for flag to send BIMC
 logging request

Add new AOP flag "qcom,clk-stop-bimc-log" to send a BIMC logging
request to AOP during kernel panic.

Change-Id: Ic810a770387648e18c0718851c53fec72f173349
---
 bindings/clock/qcom,aop-qmp.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/bindings/clock/qcom,aop-qmp.txt b/bindings/clock/qcom,aop-qmp.txt
index 231b8a36420b..38a1b6db3228 100644
--- a/bindings/clock/qcom,aop-qmp.txt
+++ b/bindings/clock/qcom,aop-qmp.txt
@@ -7,6 +7,8 @@ Required properties :
 - mboxes : list of QMP mailbox phandle and channel identifier tuples.
 - mbox-names: List of identifier strings for each mailbox channel.
 		Must contain "qdss_clk".
+- qcom,clk-stop-bimc-log: Presence indicates a BIMC logging request will
+			  be sent to AOP during kernel panic.
 
 Example :
 	clock_qdss: qcom,aopclk {

From 9050e8e22a004e77c3e0a50fc2f957c81d922828 Mon Sep 17 00:00:00 2001
From: Taniya Das <tdas@qti.qualcomm.com>
Date: Mon, 21 Sep 2020 17:13:37 +0530
Subject: [PATCH 15/38] ARM: dts: msm: Add support for BIMC logging for Kona

Add support to send a BIMC logging request to AOPCC during
the kernel panic.

Change-Id: I04cf1b16c355a1773f62f2c90934a06fc1344dce
---
 qcom/kona.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi
index b5e7f665f6b1..e39627b58bec 100644
--- a/qcom/kona.dtsi
+++ b/qcom/kona.dtsi
@@ -2445,6 +2445,7 @@
 		#clock-cells = <1>;
 		mboxes = <&qmp_aop 0>;
 		mbox-names = "qdss_clk";
+		qcom,clk-stop-bimc-log;
 	};
 
 	clock_gcc: qcom,gcc@100000 {

From ac0fb6d41e814a72fac2cfef08a450fe5820df3b Mon Sep 17 00:00:00 2001
From: Taniya Das <tdas@qti.qualcomm.com>
Date: Mon, 21 Sep 2020 16:52:05 +0530
Subject: [PATCH 16/38] ARM: dts: msm: Update RPMH for LitoMagnus

Add support for LitoMagnus RPMH clock driver.

Change-Id: Icf72b1bf7015917f69de0f49e258cedb8eb4e4cf
---
 bindings/clock/qcom,rpmh-clk.txt | 1 +
 qcom/litomagnus.dtsi             | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/bindings/clock/qcom,rpmh-clk.txt b/bindings/clock/qcom,rpmh-clk.txt
index ee15fbe01d82..ffce1989326c 100644
--- a/bindings/clock/qcom,rpmh-clk.txt
+++ b/bindings/clock/qcom,rpmh-clk.txt
@@ -11,6 +11,7 @@ Required properties :
 		"qcom,sdm845-rpmh-clk"
 		"qcom,lito-rpmh-clk"
 		"qcom,lagoon-rpmh-clk"
+		"qcom,litomagnus-rpmh-clk"
 
 - #clock-cells : must contain 1
 
diff --git a/qcom/litomagnus.dtsi b/qcom/litomagnus.dtsi
index 40e796f62513..ee279efa444f 100644
--- a/qcom/litomagnus.dtsi
+++ b/qcom/litomagnus.dtsi
@@ -9,3 +9,8 @@
 &pm8008_regulators {
 	vdd_l6-supply = <&BOB>;
 };
+
+&rpmhcc {
+	compatible = "qcom,litomagnus-rpmh-clk";
+	#clock-cells = <1>;
+};

From 47333463b7c7dcc53e7839e7e4184518727112d3 Mon Sep 17 00:00:00 2001
From: Udipto Goswami <ugoswami@qti.qualcomm.com>
Date: Tue, 22 Sep 2020 12:08:49 +0530
Subject: [PATCH 17/38] ARM: dts: msm: Add USB DP support for LitoMagnus

This change adds support for DP on litomagnus.
The vdd-supply of usb_qmp_dp_phy has changed
for litomagnus from eldo13 to L11A.

Change-Id: I50d65412642743c9e1543c6528aa7a96a7160eb5
---
 qcom/litomagnus-cdp.dtsi | 5 +++++
 qcom/litomagnus-mtp.dtsi | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/qcom/litomagnus-cdp.dtsi b/qcom/litomagnus-cdp.dtsi
index de3dcd32ed2e..8d1659583863 100644
--- a/qcom/litomagnus-cdp.dtsi
+++ b/qcom/litomagnus-cdp.dtsi
@@ -4,6 +4,11 @@
 
 };
 
+&usb_qmp_dp_phy {
+	/delete-property/vdd-supply;
+	vdd-supply = <&L11A>;
+};
+
 &pm8150_rtc {
 	status = "disabled";
 };
diff --git a/qcom/litomagnus-mtp.dtsi b/qcom/litomagnus-mtp.dtsi
index f7fe249c44bc..aa2300413a8a 100644
--- a/qcom/litomagnus-mtp.dtsi
+++ b/qcom/litomagnus-mtp.dtsi
@@ -4,6 +4,11 @@
 
 };
 
+&usb_qmp_dp_phy {
+	/delete-property/vdd-supply;
+	vdd-supply = <&L11A>;
+};
+
 &pm8150_rtc {
 	status = "disabled";
 };

From 97da396713f74c81ad25b4422c07d8d191a271a0 Mon Sep 17 00:00:00 2001
From: Rajat Gupta <rajatgu@qti.qualcomm.com>
Date: Tue, 22 Sep 2020 12:46:41 +0530
Subject: [PATCH 18/38] ARM: dts: msm: update supply source for 0p9 supply

Update supply source for 0p9 supply for litomagnus target as per
specification.

Change-Id: I73a7280bd61888fb2410478cf2c74bd2be8a52c2
---
 qcom/litomagnus-cdp.dtsi | 4 ++++
 qcom/litomagnus-mtp.dtsi | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/qcom/litomagnus-cdp.dtsi b/qcom/litomagnus-cdp.dtsi
index 8d1659583863..e3094269e6e3 100644
--- a/qcom/litomagnus-cdp.dtsi
+++ b/qcom/litomagnus-cdp.dtsi
@@ -9,6 +9,10 @@
 	vdd-supply = <&L11A>;
 };
 
+&sde_dp {
+	vdda-0p9-supply = <&L11A>;
+};
+
 &pm8150_rtc {
 	status = "disabled";
 };
diff --git a/qcom/litomagnus-mtp.dtsi b/qcom/litomagnus-mtp.dtsi
index aa2300413a8a..d0454608b7fb 100644
--- a/qcom/litomagnus-mtp.dtsi
+++ b/qcom/litomagnus-mtp.dtsi
@@ -9,6 +9,10 @@
 	vdd-supply = <&L11A>;
 };
 
+&sde_dp {
+	vdda-0p9-supply = <&L11A>;
+};
+
 &pm8150_rtc {
 	status = "disabled";
 };

From f089ae30089ee80f229a537189f78fd712950ac1 Mon Sep 17 00:00:00 2001
From: Deepak Kumar <dkumar@qti.qualcomm.com>
Date: Tue, 22 Sep 2020 19:08:49 +0530
Subject: [PATCH 19/38] ARM: dts: msm: Remove "qcom,throttle-pwrlevel" from
 525MHz GPU clk plan

"qcom,throttle-pwrlevel" property is needed only when LM is required
for any corner in freq plan. As for 525MHz plan, LM is not required
remove this property to avoid enabling LM for 525MHz frequency.

Change-Id: Ib939581e8707d0477661427234f82a530744a054
---
 qcom/kona-v2-gpu.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/qcom/kona-v2-gpu.dtsi b/qcom/kona-v2-gpu.dtsi
index 3565dfdd803e..119e296d6a07 100644
--- a/qcom/kona-v2-gpu.dtsi
+++ b/qcom/kona-v2-gpu.dtsi
@@ -279,7 +279,6 @@
 			#size-cells = <0>;
 			qcom,speed-bin = <3>;
 			qcom,initial-pwrlevel = <4>;
-			qcom,throttle-pwrlevel = <0>;
 
 			qcom,gpu-pwrlevel@0 {
 				reg = <0>;

From ea78caf15f2a1d550be53a9d1ec78db4f2b56edb Mon Sep 17 00:00:00 2001
From: Sivakanth Vaka <svaka@qti.qualcomm.com>
Date: Thu, 28 May 2020 12:10:09 +0530
Subject: [PATCH 20/38] ARM: dts: msm: Disable the IPA hw in APQ targets

Disable the IPA H/W for APQ targets in scuba

Change-Id: I4cc81ef15030de74c816cc4c0fa03ddfa9e59e88
---
 qcom/scubap-idp.dts | 10 ++++++++++
 qcom/scubap.dts     | 10 ++++++++++
 2 files changed, 20 insertions(+)

diff --git a/qcom/scubap-idp.dts b/qcom/scubap-idp.dts
index 98f61ac7c30f..03b75e86b031 100644
--- a/qcom/scubap-idp.dts
+++ b/qcom/scubap-idp.dts
@@ -9,3 +9,13 @@
 	qcom,msm-id = <471 0x10000>;
 	qcom,board-id = <34 0>;
 };
+
+&soc {
+	qcom,rmnet-ipa {
+	status = "disabled";
+	};
+};
+
+&ipa_hw {
+	status = "disabled";
+};
diff --git a/qcom/scubap.dts b/qcom/scubap.dts
index 16ebe7928265..04a46706c943 100644
--- a/qcom/scubap.dts
+++ b/qcom/scubap.dts
@@ -8,3 +8,13 @@
 	qcom,msm-id = <471 0x10000>;
 	qcom,board-id = <0 0>;
 };
+
+&soc {
+	qcom,rmnet-ipa {
+	status = "disabled";
+	};
+};
+
+&ipa_hw {
+	status = "disabled";
+};

From d52f18ce9fa2c0114d928ff23c3ec6fcc045e8e1 Mon Sep 17 00:00:00 2001
From: Lipsa Rout <lrout@qti.qualcomm.com>
Date: Thu, 24 Sep 2020 11:25:39 +0530
Subject: [PATCH 21/38] ARM: dts: msm: Add fhd plus cmd display support for
 orchid

This change adds support for fhd plus cmd on cdp and mtp
platforms of orchid.

Change-Id: Ie3f3a715d556fee5e9abb24782b0702b60c58e36
---
 qcom/orchid-cdp.dtsi | 4 ++++
 qcom/orchid-mtp.dtsi | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/qcom/orchid-cdp.dtsi b/qcom/orchid-cdp.dtsi
index e782c342d9c2..8f9905af3638 100644
--- a/qcom/orchid-cdp.dtsi
+++ b/qcom/orchid-cdp.dtsi
@@ -13,6 +13,10 @@
 	vdda-0p9-supply = <&L11A>;
 };
 
+&sde_dsi {
+	qcom,dsi-default-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>;
+};
+
 &wsa_macro {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";
diff --git a/qcom/orchid-mtp.dtsi b/qcom/orchid-mtp.dtsi
index cc7e19363a7e..54a51ae477b7 100644
--- a/qcom/orchid-mtp.dtsi
+++ b/qcom/orchid-mtp.dtsi
@@ -13,6 +13,10 @@
 	vdda-0p9-supply = <&L11A>;
 };
 
+&sde_dsi {
+	qcom,dsi-default-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>;
+};
+
 &wsa_macro {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";

From decefdfad6431e5aefd69f7e1800f9fbac897686 Mon Sep 17 00:00:00 2001
From: "Tao,Zhang" <taozha@qti.qualcomm.com>
Date: Tue, 22 Sep 2020 23:22:07 +0800
Subject: [PATCH 22/38] ARM: dts: msm: add minidump regions for lito

Add PCU registers and FSM data collection to minidump region for
lito.

Change-Id: I7c31e363e1f7879ac89dda6f38ef9e2e303a1122
---
 qcom/lito.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/qcom/lito.dtsi b/qcom/lito.dtsi
index 238902bb5a67..d2e9eae85783 100644
--- a/qcom/lito.dtsi
+++ b/qcom/lito.dtsi
@@ -2457,6 +2457,21 @@
 			qcom,dump-size = <0x1000>;
 			qcom,dump-id = <0x163>;
 		};
+
+		osm_reg {
+			qcom,dump-size = <0x400>;
+			qcom,dump-id = <0x163>;
+		};
+
+		pcu_reg {
+			qcom,dump-size = <0x400>;
+			qcom,dump-id = <0x164>;
+		};
+
+		fsm_data {
+			qcom,dump-size = <0x400>;
+			qcom,dump-id = <0x165>;
+		};
 	};
 
 	qcom,chd_silver {

From a4ad2e7d4bfac3ee896d053da0debabf7508f1bd Mon Sep 17 00:00:00 2001
From: Kavya Nunna <knunna@qti.qualcomm.com>
Date: Thu, 24 Sep 2020 12:56:38 +0530
Subject: [PATCH 23/38] ARM: dts: msm: Remove ldoa7 node for litomagnus and
 orchid

Remove LDOA7 node as there is no APPS side consumer of
this regulator.

Change-Id: I1ea0f612ad95aaa326b91350660ed7704faddfef
---
 qcom/litomagnus.dtsi | 4 ++++
 qcom/orchid.dtsi     | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/qcom/litomagnus.dtsi b/qcom/litomagnus.dtsi
index ee279efa444f..13ff72325b39 100644
--- a/qcom/litomagnus.dtsi
+++ b/qcom/litomagnus.dtsi
@@ -14,3 +14,7 @@
 	compatible = "qcom,litomagnus-rpmh-clk";
 	#clock-cells = <1>;
 };
+
+&apps_rsc {
+	/delete-node/ rpmh-regulator-ldoa7;
+};
diff --git a/qcom/orchid.dtsi b/qcom/orchid.dtsi
index 524f94b05366..07d61cc61b34 100644
--- a/qcom/orchid.dtsi
+++ b/qcom/orchid.dtsi
@@ -10,3 +10,7 @@
 &pm8008_regulators {
 	vdd_l6-supply = <&BOB>;
 };
+
+&apps_rsc {
+	/delete-node/ rpmh-regulator-ldoa7;
+};

From 07123848161f500bce667468045da7147ee2b8dc Mon Sep 17 00:00:00 2001
From: Prasad Kumpatla <nkumpatl@qti.qualcomm.com>
Date: Wed, 23 Sep 2020 11:25:55 +0530
Subject: [PATCH 24/38] ARM: dts: msm: Add snd node for litomagnus

Sound node changes for litomagnus MTP and CDP.

Change-Id: I6e68535134ab8e02398b1a7e738bd78eb1df9a27
---
 qcom/litomagnus-cdp-overlay.dts |  8 ++++++
 qcom/litomagnus-cdp.dtsi        | 51 +++++++++++++++++++++++++++++++++
 qcom/litomagnus-mtp-overlay.dts |  8 ++++++
 qcom/litomagnus-mtp.dtsi        | 51 +++++++++++++++++++++++++++++++++
 qcom/orchid-cdp.dtsi            |  7 +++--
 qcom/orchid-mtp.dtsi            |  7 +++--
 6 files changed, 126 insertions(+), 6 deletions(-)

diff --git a/qcom/litomagnus-cdp-overlay.dts b/qcom/litomagnus-cdp-overlay.dts
index 9924e3b248ad..878110c0c308 100644
--- a/qcom/litomagnus-cdp-overlay.dts
+++ b/qcom/litomagnus-cdp-overlay.dts
@@ -11,3 +11,11 @@
 	qcom,msm-id = <400 0x20000>, <440 0x20000>;
 	qcom,board-id = <1 1>;
 };
+
+/*
+ * overriding adsp-fw-names with empty string
+ * to allow default adsp img load
+ */
+&adsp_loader {
+	adsp-fw-names="";
+};
diff --git a/qcom/litomagnus-cdp.dtsi b/qcom/litomagnus-cdp.dtsi
index e3094269e6e3..7727a0fcad47 100644
--- a/qcom/litomagnus-cdp.dtsi
+++ b/qcom/litomagnus-cdp.dtsi
@@ -13,6 +13,57 @@
 	vdda-0p9-supply = <&L11A>;
 };
 
+&swr0 {
+	wsa883x_0221: wsa883x@02170221 {
+		compatible = "qcom,wsa883x";
+		reg = <0x02 0x02170221>;
+		qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
+		qcom,bolero-handle = <&bolero>;
+		cdc-vdd-1p8-supply = <&S4A>;
+
+		qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
+		qcom,cdc-vdd-1p8-current = <20000>;
+		qcom,cdc-vdd-1p8-lpm-supported = <1>;
+		qcom,cdc-static-supplies = "cdc-vdd-1p8";
+	};
+
+	wsa883x_0222: wsa883x@02170222 {
+		compatible = "qcom,wsa883x";
+		reg = <0x02 0x02170222>;
+		qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
+		qcom,bolero-handle = <&bolero>;
+
+		cdc-vdd-1p8-supply = <&S4A>;
+		qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
+		qcom,cdc-vdd-1p8-current = <20000>;
+		qcom,cdc-vdd-1p8-lpm-supported = <1>;
+		qcom,cdc-static-supplies = "cdc-vdd-1p8";
+	};
+};
+
+&wsa881x_0211 {
+	status = "disabled";
+};
+
+&wsa881x_0212 {
+	status = "disabled";
+};
+
+&wsa881x_0213 {
+	status = "disabled";
+};
+
+&wsa881x_0214 {
+	status = "disabled";
+};
+
+&lito_snd {
+	qcom,model = "lito-orchidmtp-snd-card";
+	qcom,wsa-max-devs = <2>;
+	qcom,wsa-devs = <&wsa883x_0221>, <&wsa883x_0222>;
+	qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight";
+};
+
 &pm8150_rtc {
 	status = "disabled";
 };
diff --git a/qcom/litomagnus-mtp-overlay.dts b/qcom/litomagnus-mtp-overlay.dts
index 4bce6191228c..58a6b3463e0c 100644
--- a/qcom/litomagnus-mtp-overlay.dts
+++ b/qcom/litomagnus-mtp-overlay.dts
@@ -11,3 +11,11 @@
 	qcom,msm-id = <400 0x20000>, <440 0x20000>;
 	qcom,board-id = <8 1>;
 };
+
+/*
+ * overriding adsp-fw-names with empty string
+ * to allow default adsp img load
+ */
+&adsp_loader {
+	adsp-fw-names="";
+};
diff --git a/qcom/litomagnus-mtp.dtsi b/qcom/litomagnus-mtp.dtsi
index d0454608b7fb..d55a4e64d6c2 100644
--- a/qcom/litomagnus-mtp.dtsi
+++ b/qcom/litomagnus-mtp.dtsi
@@ -13,6 +13,57 @@
 	vdda-0p9-supply = <&L11A>;
 };
 
+&swr0 {
+	wsa883x_0221: wsa883x@02170221 {
+		compatible = "qcom,wsa883x";
+		reg = <0x02 0x02170221>;
+		qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
+		qcom,bolero-handle = <&bolero>;
+
+		cdc-vdd-1p8-supply = <&S4A>;
+		qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
+		qcom,cdc-vdd-1p8-current = <20000>;
+		qcom,cdc-vdd-1p8-lpm-supported = <1>;
+		qcom,cdc-static-supplies = "cdc-vdd-1p8";
+	};
+
+	wsa883x_0222: wsa883x@02170222 {
+		compatible = "qcom,wsa883x";
+		reg = <0x02 0x02170222>;
+		qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
+		qcom,bolero-handle = <&bolero>;
+
+		cdc-vdd-1p8-supply = <&S4A>;
+		qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
+		qcom,cdc-vdd-1p8-current = <20000>;
+		qcom,cdc-vdd-1p8-lpm-supported = <1>;
+		qcom,cdc-static-supplies = "cdc-vdd-1p8";
+	};
+};
+
+&wsa881x_0211 {
+	status = "disabled";
+};
+
+&wsa881x_0212 {
+	status = "disabled";
+};
+
+&wsa881x_0213 {
+	status = "disabled";
+};
+
+&wsa881x_0214 {
+	status = "disabled";
+};
+
+&lito_snd {
+	qcom,model = "lito-orchidmtp-snd-card";
+	qcom,wsa-max-devs = <2>;
+	qcom,wsa-devs = <&wsa883x_0221>, <&wsa883x_0222>;
+	qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight";
+};
+
 &pm8150_rtc {
 	status = "disabled";
 };
diff --git a/qcom/orchid-cdp.dtsi b/qcom/orchid-cdp.dtsi
index 8f9905af3638..40ac70644810 100644
--- a/qcom/orchid-cdp.dtsi
+++ b/qcom/orchid-cdp.dtsi
@@ -17,13 +17,14 @@
 	qcom,dsi-default-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>;
 };
 
-&wsa_macro {
+&swr0 {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";
 		reg = <0x02 0x02170221>;
 		qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
 		qcom,bolero-handle = <&bolero>;
-		cdc-vdd-1p8-supply = <&L11A>;
+
+		cdc-vdd-1p8-supply = <&S4A>;
 		qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
 		qcom,cdc-vdd-1p8-current = <20000>;
 		qcom,cdc-vdd-1p8-lpm-supported = <1>;
@@ -36,7 +37,7 @@
 		qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
 		qcom,bolero-handle = <&bolero>;
 
-		cdc-vdd-1p8-supply = <&L11A>;
+		cdc-vdd-1p8-supply = <&S4A>;
 		qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
 		qcom,cdc-vdd-1p8-current = <20000>;
 		qcom,cdc-vdd-1p8-lpm-supported = <1>;
diff --git a/qcom/orchid-mtp.dtsi b/qcom/orchid-mtp.dtsi
index 54a51ae477b7..df1c9c33685e 100644
--- a/qcom/orchid-mtp.dtsi
+++ b/qcom/orchid-mtp.dtsi
@@ -17,13 +17,14 @@
 	qcom,dsi-default-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>;
 };
 
-&wsa_macro {
+&swr0 {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";
 		reg = <0x02 0x02170221>;
 		qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
 		qcom,bolero-handle = <&bolero>;
-		cdc-vdd-1p8-supply = <&L11A>;
+		cdc-vdd-1p8-supply = <&S4A>;
+
 		qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
 		qcom,cdc-vdd-1p8-current = <20000>;
 		qcom,cdc-vdd-1p8-lpm-supported = <1>;
@@ -36,7 +37,7 @@
 		qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
 		qcom,bolero-handle = <&bolero>;
 
-		cdc-vdd-1p8-supply = <&L11A>;
+		cdc-vdd-1p8-supply = <&S4A>;
 		qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
 		qcom,cdc-vdd-1p8-current = <20000>;
 		qcom,cdc-vdd-1p8-lpm-supported = <1>;

From 62b188975290b104635da68fcdddb5e4b3a2f093 Mon Sep 17 00:00:00 2001
From: Rajat Gupta <rajatgu@qti.qualcomm.com>
Date: Thu, 24 Sep 2020 15:29:23 +0530
Subject: [PATCH 25/38] ARM: dts: msm: delete mst enable property for orchid
 target

Delete mst-enable property for orchid target to disable mst.

Change-Id: Ifc7452b5f5fc1fec083383c8decb9465f838bea7
---
 qcom/orchid.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/qcom/orchid.dtsi b/qcom/orchid.dtsi
index 07d61cc61b34..e7d6d66a9137 100644
--- a/qcom/orchid.dtsi
+++ b/qcom/orchid.dtsi
@@ -7,6 +7,10 @@
 	qcom,msm-id = <476 0x10000>;
 };
 
+&sde_dp {
+	/delete-property/ qcom,mst-enable;
+};
+
 &pm8008_regulators {
 	vdd_l6-supply = <&BOB>;
 };

From fa5c7f4ad2a5a675d05d4fdc04675994a4e6af90 Mon Sep 17 00:00:00 2001
From: Jayaprakash <jmadiset@qti.qualcomm.com>
Date: Fri, 25 Sep 2020 13:54:20 +0530
Subject: [PATCH 26/38] ARM: dts: msm: add dt nodes for sde limits for kona

Add dt node for sde limits. The properties include
sde sspp linewidth and sde bw limit constraints
for various usecases.

Change-Id: I992acb8c7801dd5fb7d4821f02a395d0e335d9a8
---
 qcom/kona-sde.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/qcom/kona-sde.dtsi b/qcom/kona-sde.dtsi
index c280379826df..5bbfbf2b0fee 100644
--- a/qcom/kona-sde.dtsi
+++ b/qcom/kona-sde.dtsi
@@ -306,6 +306,39 @@
 				<1 590 0 150000>,
 				<1 590 0 300000>;
 		};
+		qcom,sde-limits {
+			qcom,sde-linewidth-limits {
+				qcom,sde-limit-name = "sspp_linewidth_usecases";
+				qcom,sde-limit-cases = "vig", "dma", "scale", "inline_rot";
+				qcom,sde-limit-ids= <0x1 0x2 0x4 0x8>;
+				qcom,sde-limit-values = <0x1 4096>,
+							<0x5 2560>,
+							<0x2 4096>,
+							<0x9 1088>;
+			};
+
+			qcom,sde-bw-limits {
+				qcom,sde-limit-name = "sde_bwlimit_usecases";
+				qcom,sde-limit-cases = "per_vig_pipe",
+							"per_dma_pipe",
+							"total_max_bw",
+							"camera_concurrency",
+							"cwb_concurrency";
+				qcom,sde-limit-ids = <0x1 0x2 0x4 0x8 0x10>;
+				qcom,sde-limit-values = <0x1 5300000>,
+							<0x11 5300000>,
+							<0x9 4400000>,
+							<0x19 4400000>,
+							<0x2 5300000>,
+							<0x12 5300000>,
+							<0xa 4400000>,
+							<0x1a 4400000>,
+							<0x4 16600000>,
+							<0x14 16600000>,
+							<0xc 13700000>,
+							<0x1c 13700000>;
+			};
+		};
 	};
 
 	sde_dp: qcom,dp_display@ae90000 {

From 370ecfefea695a7484d0802128254238aef01a37 Mon Sep 17 00:00:00 2001
From: Kavya Nunna <knunna@qti.qualcomm.com>
Date: Mon, 28 Sep 2020 15:37:33 +0530
Subject: [PATCH 27/38] ARM: dts: msm: Enable smb1396 parallel charger for
 litomagnus MTP

Enable smb1396 master and slave charge pump nodes
for litomagnus and orchid MTP.

while at it, fix bad cell count error for pmk8350.

Change-Id: I929f082415bd8baecc67953e89787302529c4c56
---
 qcom/litomagnus-mtp.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
 qcom/orchid-mtp.dtsi     | 52 ++++++++++++++++++++++++++++++++++++++++
 qcom/pmk8350.dtsi        |  4 ++--
 3 files changed, 106 insertions(+), 2 deletions(-)

diff --git a/qcom/litomagnus-mtp.dtsi b/qcom/litomagnus-mtp.dtsi
index d55a4e64d6c2..3ea255ffb1f7 100644
--- a/qcom/litomagnus-mtp.dtsi
+++ b/qcom/litomagnus-mtp.dtsi
@@ -1,4 +1,5 @@
 #include "lito-mtp.dtsi"
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
 
 &soc {
 
@@ -71,3 +72,54 @@
 &pmk8350_adc_tm {
 	status = "disabled";
 };
+
+&pm7250b_vadc {
+	smb1390_therm@e {
+		qcom,scale-fn-type = <ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP>;
+	};
+};
+
+&pm7250b_gpios {
+	smb_stat {
+		smb_stat_default: smb_stat_default {
+			pins = "gpio6";
+			function = "normal";
+			input-enable;
+			bias-pull-up;
+			qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>;
+			power-source = <0>;
+		};
+	};
+};
+
+&qupv3_se9_i2c {
+	qcom,clk-freq-out = <100000>;
+	status = "ok";
+	#include "smb1398.dtsi"
+};
+
+&smb1396 {
+	interrupts = <0x2 0xc5 0x0 IRQ_TYPE_LEVEL_LOW>;
+	interrupt-parent = <&spmi_bus>;
+	interrupt-names = "smb1396";
+	pinctrl-names = "default";
+	qcom,enable-toggle-stat;
+	pinctrl-0 = <&smb_stat_default>;
+	status = "ok";
+};
+
+&smb1396_div2_cp_master {
+	io-channels = <&pm7250b_vadc ADC_AMUX_THM2>;
+	qcom,parallel-input-mode = <1>; /* USBIN */
+	qcom,parallel-output-mode = <2>; /* VBAT */
+	qcom,min-ilim-ua = <1000000>;
+	status = "ok";
+};
+
+&smb1396_slave {
+	status = "ok";
+};
+
+&smb1396_div2_cp_slave {
+	status = "ok";
+};
diff --git a/qcom/orchid-mtp.dtsi b/qcom/orchid-mtp.dtsi
index df1c9c33685e..04eee1465123 100644
--- a/qcom/orchid-mtp.dtsi
+++ b/qcom/orchid-mtp.dtsi
@@ -1,4 +1,5 @@
 #include "lito-mtp.dtsi"
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
 
 &soc {
 
@@ -76,3 +77,54 @@
 &pmk8350_adc_tm {
 	status = "disabled";
 };
+
+&pm7250b_vadc {
+	smb1390_therm@e {
+		qcom,scale-fn-type = <ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP>;
+	};
+};
+
+&pm7250b_gpios {
+	smb_stat {
+		smb_stat_default: smb_stat_default {
+			pins = "gpio6";
+			function = "normal";
+			input-enable;
+			bias-pull-up;
+			qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>;
+			power-source = <0>;
+		};
+	};
+};
+
+&qupv3_se9_i2c {
+	qcom,clk-freq-out = <100000>;
+	status = "ok";
+	#include "smb1398.dtsi"
+};
+
+&smb1396 {
+	interrupts = <0x2 0xc5 0x0 IRQ_TYPE_LEVEL_LOW>;
+	interrupt-parent = <&spmi_bus>;
+	interrupt-names = "smb1396";
+	pinctrl-names = "default";
+	qcom,enable-toggle-stat;
+	pinctrl-0 = <&smb_stat_default>;
+	status = "ok";
+};
+
+&smb1396_div2_cp_master {
+	io-channels = <&pm7250b_vadc ADC_AMUX_THM2>;
+	qcom,parallel-input-mode = <1>; /* USBIN */
+	qcom,parallel-output-mode = <2>; /* VBAT */
+	qcom,min-ilim-ua = <1000000>;
+	status = "ok";
+};
+
+&smb1396_slave {
+	status = "ok";
+};
+
+&smb1396_div2_cp_slave {
+	status = "ok";
+};
diff --git a/qcom/pmk8350.dtsi b/qcom/pmk8350.dtsi
index c7261d51c8b2..102b0a39dd34 100644
--- a/qcom/pmk8350.dtsi
+++ b/qcom/pmk8350.dtsi
@@ -14,8 +14,8 @@
 	qcom,pmk8350@6 {
 		compatible = "qcom,spmi-pmic";
 		reg = <6 SPMI_USID>;
-		#address-cells = <1>;
-		#size-cells = <1>;
+		#address-cells = <2>;
+		#size-cells = <0>;
 
 		pmk8350_revid: qcom,revid@100 {
 			compatible = "qcom,qpnp-revid";

From 4f436f5d21984d3b44aba1c0317956e81b6f5990 Mon Sep 17 00:00:00 2001
From: Jayaprakash <jmadiset@qti.qualcomm.com>
Date: Mon, 28 Sep 2020 18:26:56 +0530
Subject: [PATCH 28/38] ARM: dts: msm: add dpu properties for orchid target

Add changes to update supported hardware blocks and related
properties in orchid target.

Change-Id: I6f626e60d55e9af3e18bd3d573827f8b32a932d0
---
 qcom/orchid.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/qcom/orchid.dtsi b/qcom/orchid.dtsi
index e7d6d66a9137..3c3dcf99c70a 100644
--- a/qcom/orchid.dtsi
+++ b/qcom/orchid.dtsi
@@ -18,3 +18,19 @@
 &apps_rsc {
 	/delete-node/ rpmh-regulator-ldoa7;
 };
+
+&mdss_mdp {
+	qcom,sde-intf-off = <0x6b000 0x6b800>;
+	qcom,sde-intf-type = "dp", "dsi";
+	qcom,sde-sspp-type = "vig", "dma", "dma", "dma";
+	qcom,sde-sspp-off = <0x5000 0x25000 0x27000 0x29000>;
+	qcom,sde-sspp-xin-id = <0 1 5 9>;
+	qcom,sde-sspp-excl-rect = <1 1 1 1>;
+	qcom,sde-sspp-smart-dma-priority = <4 1 2 3>;
+	qcom,sde-max-per-pipe-bw-kbps = <4700000 4700000 4700000
+					4700000>;
+	qcom,sde-max-per-pipe-bw-high-kbps = <4700000 4700000 4700000
+					4700000>;
+	qcom,sde-sspp-clk-ctrl = <0x2ac 0>, <0x2ac 8>, <0x2b4 8>,
+					 <0x2c4 8>;
+};

From 316f3db63b6426d30a2462c54b890e85896dfe09 Mon Sep 17 00:00:00 2001
From: Lipsa Rout <lrout@qti.qualcomm.com>
Date: Tue, 29 Sep 2020 12:58:15 +0530
Subject: [PATCH 29/38] ARM: dts: msm: Disable dsi1 for orchid target

This change disables dsi1 for orchid target.

Change-Id: I24999772361ca43cedf48039d17c9a1e5c82eafb
---
 qcom/orchid-cdp.dtsi |  8 ++++++++
 qcom/orchid-mtp.dtsi |  8 ++++++++
 qcom/orchid.dtsi     | 12 ++++++++++++
 3 files changed, 28 insertions(+)

diff --git a/qcom/orchid-cdp.dtsi b/qcom/orchid-cdp.dtsi
index 40ac70644810..825800da044e 100644
--- a/qcom/orchid-cdp.dtsi
+++ b/qcom/orchid-cdp.dtsi
@@ -17,6 +17,14 @@
 	qcom,dsi-default-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>;
 };
 
+&sde_dsi1 {
+	status = "disabled";
+};
+
+&mdss_mdp {
+	connectors = <&sde_wb &sde_dsi &sde_dp &sde_rscc>;
+};
+
 &swr0 {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";
diff --git a/qcom/orchid-mtp.dtsi b/qcom/orchid-mtp.dtsi
index df1c9c33685e..69f00c15c19d 100644
--- a/qcom/orchid-mtp.dtsi
+++ b/qcom/orchid-mtp.dtsi
@@ -17,6 +17,14 @@
 	qcom,dsi-default-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>;
 };
 
+&sde_dsi1 {
+	status = "disabled";
+};
+
+&mdss_mdp {
+	connectors = <&sde_wb &sde_dsi &sde_dp &sde_rscc>;
+};
+
 &swr0 {
 	wsa883x_0221: wsa883x@02170221 {
 		compatible = "qcom,wsa883x";
diff --git a/qcom/orchid.dtsi b/qcom/orchid.dtsi
index e7d6d66a9137..d539b0c3cd60 100644
--- a/qcom/orchid.dtsi
+++ b/qcom/orchid.dtsi
@@ -11,6 +11,18 @@
 	/delete-property/ qcom,mst-enable;
 };
 
+&mdss_dsi1 {
+	status = "disabled";
+};
+
+&mdss_dsi_phy1 {
+	status = "disabled";
+};
+
+&mdss_dsi1_pll {
+	status = "disabled";
+};
+
 &pm8008_regulators {
 	vdd_l6-supply = <&BOB>;
 };

From 66b8f274ba2f11c8d7f3e2fd697ac1f5bf4ffb94 Mon Sep 17 00:00:00 2001
From: Nirmal Abraham <c_nabrah@qti.qualcomm.com>
Date: Thu, 1 Oct 2020 16:37:05 +0530
Subject: [PATCH 30/38] ARM: dts: msm: Update WLED configuration for sdm660

Update wled string configuration to use string1 and string2
corresponding to the LED strings connected to the panels
used with SDM660 QRD devices.

Change-Id: I958f93ba393bd01a387b580ae4405f006b77cdbd
---
 qcom/sdm660-qrd-external-codec-overlay.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/qcom/sdm660-qrd-external-codec-overlay.dts b/qcom/sdm660-qrd-external-codec-overlay.dts
index bb16e6c491f2..8d9e90be6a44 100644
--- a/qcom/sdm660-qrd-external-codec-overlay.dts
+++ b/qcom/sdm660-qrd-external-codec-overlay.dts
@@ -53,6 +53,11 @@
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 };
 
+&pm660l_wled {
+	qcom,string-cfg = <3>;
+	status = "ok";
+};
+
 &soc {
 	hbtp {
 		compatible = "qcom,hbtp-input";

From d2be94d9c323c7cf15d94b36a2b1b2a617603686 Mon Sep 17 00:00:00 2001
From: Vijayanand Jitta <vjitta@qti.qualcomm.com>
Date: Mon, 5 Oct 2020 13:07:19 +0530
Subject: [PATCH 31/38] ARM: dts: msm: Update lito's memory map

Update lito's memory map which adds a carveout
of 80 KB for UEFI/XBL minidump logging.

Change-Id: I729a730398d405b39c2d6eb630750f07597c14e9
---
 qcom/lito.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/qcom/lito.dtsi b/qcom/lito.dtsi
index d2e9eae85783..fc9371d6d870 100644
--- a/qcom/lito.dtsi
+++ b/qcom/lito.dtsi
@@ -352,6 +352,12 @@
 			no-map;
 		};
 
+		reserved_xbl_uefi_log: res_xbl_uefi_log_region@80880000 {
+			compatible = "removed-dma-pool";
+			no-map;
+			reg = <0x0 0x80880000 0x0 0x14000>;
+		};
+
 		sec_apps_mem: sec_apps_region@808ff000 {
 			compatible = "removed-dma-pool";
 			no-map;

From e0411aa2c1d37bfbb76cf14c097aeb6d470cd468 Mon Sep 17 00:00:00 2001
From: Rajesh Bharathwaj <rabharat@qti.qualcomm.com>
Date: Tue, 6 Oct 2020 13:27:24 -0700
Subject: [PATCH 32/38] ARM: dts: msm: Update battery profile for XR ref device

Updating the right PMIC battery profile for XR Kona Reference device.

Change-Id: Ibddef6fc896f250f15a77405fb420d1f953965c9
---
 qcom/fg-gen4-batterydata-goertek-6100mah.dtsi | 176 ++++++++++++------
 1 file changed, 115 insertions(+), 61 deletions(-)

diff --git a/qcom/fg-gen4-batterydata-goertek-6100mah.dtsi b/qcom/fg-gen4-batterydata-goertek-6100mah.dtsi
index 6b3aee7ec471..42b67638317f 100644
--- a/qcom/fg-gen4-batterydata-goertek-6100mah.dtsi
+++ b/qcom/fg-gen4-batterydata-goertek-6100mah.dtsi
@@ -1,69 +1,123 @@
-qcom,4295629_goertek_vdl_6100mah_pm660_jan9th2020 {
-	/* #4295629_Goertek_VDL_6100mAH_PM660_averaged_MasterSlave_Jan9th2020*/
+qcom,4295629_goertek_vdl_6100mah_pm8150b_sep18th2020 {
+	/* 4295629_Goertek_MorpheusVDL_6100mAh_avged_MasterSlave_Sept18th2020 */
 	qcom,max-voltage-uv = <4350000>;
 	qcom,fg-cc-cv-threshold-mv = <4340>;
 	qcom,nom-batt-capacity-mah = <6100>;
 	qcom,batt-id-kohm = <35>;
 	qcom,battery-beta = <4250>;
-	qcom,battery-type = "4295629_goertek_vdl_6100mah_pm660_jan9th2020";
-	qcom,checksum = <0xFBA6>;
-	qcom,gui-version = "PM660GUI - 0.0.0.45";
+	qcom,therm-room-temp = <100000>;
+	qcom,battery-type = "4295629_goertek_vdl_6100mah_pm8150b_sep18th2020";
+	qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
+	qcom,therm-center-offset = <0x70>;
+	qcom,therm-pull-up = <100>;
+	qcom,rslow-normal-coeffs = <0x4d 0xf4 0xd1 0x12>;
+	qcom,rslow-low-coeffs = <0x5e 0x15 0x67 0x07>;
+	qcom,checksum = <0xF24D>;
+	qcom,gui-version = "PM855GUI - 1.0.0.14";
 	qcom,fg-profile-data = [
-		 6B 1E 62 F4
-		 65 02 85 EC
-		 D2 1C 12 02
-		 82 0D D8 0A
-		 F8 17 76 23
-		 F1 44 B7 53
-		 67 00 00 00
-		 11 00 00 00
-		 00 00 50 C5
-		 02 C5 02 00
-		 25 00 08 00
-		 C6 DB F3 E4
-		 B7 05 9F FB
-		 D7 EA F1 12
-		 F7 06 2C 32
-		 25 06 09 20
-		 27 00 14 00
-		 5B 1F 5D FC
-		 D2 03 A9 FD
-		 D0 1C D6 02
-		 3E 0C 04 12
-		 A7 18 67 23
-		 A6 44 4B 5A
-		 69 00 00 00
-		 0F 00 00 00
-		 00 00 76 D5
-		 6C CA 06 BB
-		 1C 00 00 00
-		 1D EA F3 E4
-		 BF 06 0B FA
-		 71 FD 12 01
-		 FB FD 5F 13
-		 99 33 CC FF
-		 07 10 00 00
-		 59 19 99 45
-		 1C 00 40 00
-		 DF 00 0A FA
-		 FF 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
-		 00 00 00 00
+		 09 00 8B E2
+		 ED DD A2 DB
+		 26 D4 00 00
+		 39 B5 DC 83
+		 F7 87 C8 82
+		 DF 8D 03 80
+		 23 00 4D F4
+		 D1 12 76 04
+		 FC 02 CE 07
+		 32 00 FD EA
+		 E4 ED F5 CB
+		 20 03 47 DA
+		 69 B2 EF 1A
+		 85 01 DA BB
+		 60 00 46 00
+		 46 00 44 00
+		 38 00 30 00
+		 34 00 3B 00
+		 49 00 48 00
+		 4B 00 60 00
+		 3E 00 3C 00
+		 3C 00 39 00
+		 33 00 59 00
+		 4B 64 4A 00
+		 44 00 47 08
+		 60 F0 51 00
+		 4D 00 54 10
+		 4D 10 47 00
+		 74 20 5D 40
+		 51 50 4C 11
+		 4B 00 D8 00
+		 DB 1F 97 05
+		 05 EA 53 04
+		 44 1C CD 0B
+		 6E 0D 86 22
+		 0A 18 23 43
+		 50 5D 3E 03
+		 6F 11 84 1E
+		 FD FE 89 02
+		 19 04 D3 1C
+		 23 FA 5B 05
+		 00 03 DF 17
+		 A2 23 B1 44
+		 12 52 67 14
+		 85 1E EB E5
+		 A6 CA 6B CF
+		 DD 1C FD A2
+		 7A 05 EF B2
+		 E6 17 01 83
+		 B9 85 5E A2
+		 7D A0 09 80
+		 5B FA 8F FC
+		 EA 02 D0 03
+		 00 00 BC DD
+		 86 EA FC 07
+		 19 F2 EC D5
+		 FB 1F 17 00
+		 A9 EC 27 02
+		 05 06 B1 01
+		 CE 07 32 00
+		 84 01 37 02
+		 C9 05 EE 02
+		 DF 05 44 03
+		 58 02 50 03
+		 9E 05 4D 00
+		 3F 00 41 00
+		 42 64 47 00
+		 4A 00 42 08
+		 49 00 45 00
+		 47 00 3E 10
+		 4B 10 3F 00
+		 47 28 47 48
+		 4F 60 57 0C
+		 41 00 55 F8
+		 52 08 50 00
+		 39 00 48 00
+		 3B 08 47 10
+		 49 00 5B 20
+		 68 40 4A 58
+		 55 0F 4E 00
+		 45 00 2A 00
+		 D8 F8 05 20
+		 A7 05 32 0A
+		 96 0E CE 1C
+		 71 23 9E 45
+		 70 52 7E 18
+		 44 02 1B 05
+		 90 02 6A 11
+		 3F 0A 85 1F
+		 07 04 06 02
+		 BB 06 CE 1C
+		 EE 02 17 04
+		 13 02 9F 18
+		 88 03 67 04
+		 8C 02 6A 00
+		 08 1F 7E 06
+		 70 03 FD 05
+		 D0 1C 6B 02
+		 17 05 24 03
+		 AC 18 14 03
+		 3A 05 76 03
+		 6C 00 DF 00
+		 C0 00 FA 00
+		 59 19 00 00
 	];
 };

From 01d54ce25fa44af3c914e28c0f835516393c7a6c Mon Sep 17 00:00:00 2001
From: Nirmal Abraham <c_nabrah@qti.qualcomm.com>
Date: Tue, 29 Sep 2020 17:44:01 +0530
Subject: [PATCH 33/38] ARM: dts: msm: update dfps_data_mem address for SDM660

Update dfps_data_mem address to align the address
used by the display driver with the address where
the bootloader stores the PLL trim codes.

Change-Id: I4b8051fbcafe8275898f1be6bf127c5213ccc056
---
 qcom/sdm660.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/qcom/sdm660.dtsi b/qcom/sdm660.dtsi
index 4deeb1605318..4b822017564b 100644
--- a/qcom/sdm660.dtsi
+++ b/qcom/sdm660.dtsi
@@ -503,12 +503,12 @@
 		};
 
 		cont_splash_mem: splash_region@9d400000 {
-			reg = <0x0 0x9d400000 0x0 0x23ff000>;
+			reg = <0x0 0x9d400000 0x0 0x2300000>;
 			label = "cont_splash_mem";
 		};
 
-		dfps_data_mem: dfps_data_mem@0x9f7ff000 {
-		       reg = <0 0x9f7ff000 0 0x00001000>;
+		dfps_data_mem: dfps_data_mem@0x9f700000 {
+		       reg = <0x0 0x9f700000 0x0 0x00100000>;
 		       label = "dfps_data_mem";
 		};
 	};

From 1f583c7836a9bd12974d4d9c0a8d1c8b92b13ee4 Mon Sep 17 00:00:00 2001
From: Soumya Managoli <c_smanag@qti.qualcomm.com>
Date: Tue, 11 Aug 2020 15:04:05 +0530
Subject: [PATCH 34/38] ARM: dts: msm: tasha snd node changes for sdm660

Enable audio support for sdm660 with wcd9335 codec.

Change-Id: I7d8cc2ee8931a8ae0880b7841dbeaa817ac310ea
---
 qcom/msm-audio.dtsi                        | 56 +++++++++++++++++-----
 qcom/sdm660-audio.dtsi                     | 18 ++-----
 qcom/sdm660-qrd-external-codec-overlay.dts |  1 -
 qcom/sdm660-qrd.dtsi                       | 27 ++++++++++-
 4 files changed, 72 insertions(+), 30 deletions(-)

diff --git a/qcom/msm-audio.dtsi b/qcom/msm-audio.dtsi
index 2d6b7050554e..8b9166dc49ab 100644
--- a/qcom/msm-audio.dtsi
+++ b/qcom/msm-audio.dtsi
@@ -2,6 +2,19 @@
 	status = "okay";
 };
 
+&pm660_gpios {
+	pmi_clk {
+		pmi_clk_default: pmi_clk_default {
+			status = "ok";
+			pins = "gpio3";
+			function = "func1";
+			output-enable;
+			output-low;
+			qcom,drive-strength = <2>;
+		};
+	};
+};
+
 &soc {
 	pcm0: qcom,msm-pcm {
 		compatible = "qcom,msm-pcm-dsp";
@@ -661,12 +674,13 @@
 	};
 
 	tasha_snd: sound-9335 {
+		status = "disabled";
 		compatible = "qcom,sdm660-asoc-snd-tasha";
 		qcom,model = "sdm660-tasha-snd-card";
-		qcom,wcn-btfm;
 		qcom,mi2s-audio-intf;
 		qcom,auxpcm-audio-intf;
 		qcom,ext-disp-audio-rx;
+		qcom,wcn-btfm;
 		qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
 		qcom,audio-routing =
 			"AIF4 VI", "MCLK",
@@ -696,7 +710,6 @@
 			"MIC BIAS4", "Digital Mic5",
 			"SpkrLeft IN", "SPK1 OUT",
 			"SpkrRight IN", "SPK2 OUT";
-
 		qcom,msm-mbhc-hphl-swh = <1>;
 		qcom,msm-mbhc-gnd-swh = <1>;
 		qcom,us-euro-gpios = <&us_euro_gpio>;
@@ -715,11 +728,12 @@
 				      "msm-pcm-routing", "msm-cpe-lsm",
 				      "msm-compr-dsp", "msm-pcm-dsp-noirq",
 				      "msm-cpe-lsm.3";
-		asoc-cpu = <&dai_dp>, <&dai_mi2s0>,
-				<&dai_mi2s1>,
-				<&dai_mi2s2>, <&dai_mi2s3>,
+		asoc-cpu =	<&dai_dp>,
+				<&dai_mi2s0>, <&dai_mi2s1>, <&dai_mi2s2>,
+				<&dai_mi2s3>, <&dai_mi2s4>,
 				<&dai_pri_auxpcm>, <&dai_sec_auxpcm>,
 				<&dai_tert_auxpcm>, <&dai_quat_auxpcm>,
+				<&dai_quin_auxpcm>,
 				<&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,
 				<&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>,
 				<&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>,
@@ -732,12 +746,16 @@
 				<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
 				<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
 				<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
-				<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>;
-		asoc-cpu-names = "msm-dai-q6-dp.24608", "msm-dai-q6-mi2s.0",
-				"msm-dai-q6-mi2s.1",
-				"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
+				<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
+				<&dai_quin_tdm_rx_0>, <&dai_quin_tdm_tx_0>,
+				<&proxy_rx>, <&proxy_tx>;
+
+		asoc-cpu-names = "msm-dai-q6-dp.0", "msm-dai-q6-mi2s.0",
+				"msm-dai-q6-mi2s.1", "msm-dai-q6-mi2s.2",
+				"msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.4",
 				"msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",
 				"msm-dai-q6-auxpcm.3", "msm-dai-q6-auxpcm.4",
+				"msm-dai-q6-auxpcm.5",
 				"msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",
 				"msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",
 				"msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389",
@@ -755,15 +773,17 @@
 				"msm-dai-q6-tdm.36865", "msm-dai-q6-tdm.36880",
 				"msm-dai-q6-tdm.36881", "msm-dai-q6-tdm.36896",
 				"msm-dai-q6-tdm.36897", "msm-dai-q6-tdm.36912",
-				"msm-dai-q6-tdm.36913";
+				"msm-dai-q6-tdm.36913", "msm-dai-q6-tdm.36928",
+				"msm-dai-q6-tdm.36929",
+				"msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195";
 		asoc-codec = <&stub_codec>, <&ext_disp_audio_codec>;
 		asoc-codec-names = "msm-stub-codec.1",
-					"msm-ext-disp-audio-codec-rx";
+				"msm-ext-disp-audio-codec-rx";
 		qcom,wsa-max-devs = <2>;
 		qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_212>,
 				<&wsa881x_213>, <&wsa881x_214>;
 		qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
-					  "SpkrLeft", "SpkrRight";
+					"SpkrLeft", "SpkrRight";
 	};
 
 	us_euro_gpio: msm_cdc_pinctrl@75 {
@@ -784,11 +804,23 @@
 	clock_audio: audio_ext_clk {
 		status = "disabled";
 		compatible = "qcom,audio-ref-clk";
+		qcom,codec-ext-clk-src = <13>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmi_clk_default>;
 		qcom,audio-ref-clk-gpio = <&pm660_gpios 3 0>;
 		clock-names = "osr_clk";
 		clocks = <&clock_rpmcc RPM_SMD_DIV_CLK1>;
 		qcom,node_has_rpm_clock;
 		#clock-cells = <1>;
+	};
+
+	clock_audio_native: audio_ext_clk_native {
+		status = "disabled";
+		compatible = "qcom,audio-ref-clk";
+		qcom,codec-ext-clk-src = <3>;
+		qcom,use-pinctrl = <1>;
+		clock-names = "osr_clk";
+		#clock-cells = <1>;
 		qcom,codec-mclk-clk-freq = <11289600>;
 		qcom,mclk-clk-reg = <0x15020018 0x0>;
 		pinctrl-names = "sleep", "active";
diff --git a/qcom/sdm660-audio.dtsi b/qcom/sdm660-audio.dtsi
index 204fb1488c78..cb2c01eeccf8 100644
--- a/qcom/sdm660-audio.dtsi
+++ b/qcom/sdm660-audio.dtsi
@@ -234,7 +234,6 @@
 		qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
 					"SpkrLeft", "SpkrRight";
 	};
-
 };
 
 &slim_aud {
@@ -245,6 +244,7 @@
 	};
 
 	wcd9335: tasha_codec {
+		status = "disabled";
 		compatible = "qcom,tasha-slim-pgd";
 		elemental-addr = [00 01 a0 01 17 02];
 
@@ -256,8 +256,8 @@
 		qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
 
 		clock-names = "wcd_clk", "wcd_native_clk";
-		clocks = <&clock_audio AUDIO_PMI_CLK>,
-			<&clock_audio AUDIO_LPASS_MCLK_2>;
+		clocks = <&clock_audio 0>,
+			<&clock_audio_native 0>;
 
 		cdc-vdd-mic-bias-supply = <&pm660l_bob>;
 		qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;
@@ -489,15 +489,3 @@
 		};
 	};
 };
-
-&pm660_gpios {
-	gpio@c200 {
-		status = "ok";
-		qcom,mode = <1>;
-		qcom,pull = <4>;
-		qcom,vin-sel = <0>;
-		qcom,src-sel = <2>;
-		qcom,master-en = <1>;
-		qcom,out-strength = <2>;
-	};
-};
diff --git a/qcom/sdm660-qrd-external-codec-overlay.dts b/qcom/sdm660-qrd-external-codec-overlay.dts
index bb16e6c491f2..aa01f257a622 100644
--- a/qcom/sdm660-qrd-external-codec-overlay.dts
+++ b/qcom/sdm660-qrd-external-codec-overlay.dts
@@ -7,7 +7,6 @@
 #include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
-#include "sdm660-wcd.dtsi"
 #include "sdm660-qrd.dtsi"
 
 / {
diff --git a/qcom/sdm660-qrd.dtsi b/qcom/sdm660-qrd.dtsi
index d81bff357ae6..fc292eee2c71 100644
--- a/qcom/sdm660-qrd.dtsi
+++ b/qcom/sdm660-qrd.dtsi
@@ -245,10 +245,32 @@
 	};
 };
 
-/delete-node/ &tasha_hph_en0;
-/delete-node/ &tasha_hph_en1;
+&wcd934x_cdc {
+	status = "disabled";
+};
+
+&tavil_snd {
+	status = "disabled";
+};
+
+&clock_audio_lnbb {
+	status = "disabled";
+};
+
+&clock_audio {
+	status = "ok";
+};
+
+&clock_audio_native {
+	status = "ok";
+};
+
+&wcd9335 {
+	status = "ok";
+};
 
 &tasha_snd {
+	status = "ok";
 	qcom,model = "sdm660-tasha-skus-snd-card";
 	qcom,audio-routing =
 		"AIF4 VI", "MCLK",
@@ -264,6 +286,7 @@
 		"MIC BIAS3", "Digital Mic5",
 		"SpkrLeft IN", "SPK1 OUT";
 	qcom,msm-mbhc-hphl-swh = <1>;
+	qcom,msm-mbhc-gnd-swh = <1>;
 	/delete-property/ qcom,us-euro-gpios;
 	/delete-property/ qcom,hph-en0-gpio;
 	/delete-property/ qcom,hph-en1-gpio;

From 5b5e00d71126403e3f2195eef19a9055137b8436 Mon Sep 17 00:00:00 2001
From: Hareesh Gundu <hareeshg@qti.qualcomm.com>
Date: Thu, 24 Sep 2020 17:30:22 +0530
Subject: [PATCH 35/38] ARM: dts: msm: Update bimc_gpu_clk clock handle for
 scuba GPU

Current bimc_gpu_clk allow set rate frequency through the
RPM_SMD_BIMC_GPU_CLK handle. Hence update the clock handle
name for bimc_gpu_clk.

Change-Id: I8c6b9acfb2b8232bab804ff3c1ab01d19e30a6a3
---
 qcom/scuba-gpu.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/scuba-gpu.dtsi b/qcom/scuba-gpu.dtsi
index e2450c05415c..e5df1e30c7e7 100644
--- a/qcom/scuba-gpu.dtsi
+++ b/qcom/scuba-gpu.dtsi
@@ -122,7 +122,7 @@
 			<&gcc GCC_GPU_MEMNOC_GFX_CLK>,
 			<&gpucc GPU_CC_CX_GMU_CLK>,
 			<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>,
-			<&gcc GCC_BIMC_GPU_AXI_CLK>;
+			<&rpmcc RPM_SMD_BIMC_GPU_CLK>;
 
 		clock-names = "core_clk", "rbbmtimer_clk", "mem_clk",
 				"iface_clk", "mem_iface_clk", "gmu_clk",

From 167c93879b2956fb854f8eea0557dae56175a80b Mon Sep 17 00:00:00 2001
From: Taniya Das <tdas@qti.qualcomm.com>
Date: Mon, 12 Oct 2020 16:34:07 +0530
Subject: [PATCH 36/38] ARM: dts: msm: Update RPMH for Orchid Target

Add support for LitoMagnus RPMH clock driver.

Change-Id: Ibc957cea45ddd2c6bcdc07b74f928d2bb87f8301
---
 qcom/orchid.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/qcom/orchid.dtsi b/qcom/orchid.dtsi
index d1f5f16b14d2..b393b51c79c0 100644
--- a/qcom/orchid.dtsi
+++ b/qcom/orchid.dtsi
@@ -46,3 +46,8 @@
 	qcom,sde-sspp-clk-ctrl = <0x2ac 0>, <0x2ac 8>, <0x2b4 8>,
 					 <0x2c4 8>;
 };
+
+&rpmhcc {
+	compatible = "qcom,litomagnus-rpmh-clk";
+	#clock-cells = <1>;
+};

From b96463e5f3c0269b9146482e6433abb1b48ec102 Mon Sep 17 00:00:00 2001
From: Raghavendra Kakarla <rkakarla@qti.qualcomm.com>
Date: Mon, 12 Oct 2020 19:21:37 +0530
Subject: [PATCH 37/38] ARM: dts: msm: Update gpio to mpm mapping for bengal

Update the wakeup gpio to mpm mapping with LPI_GPIO pins.

Change-Id: I04998b31e9db819323b2d25e60c56f07df57e2a9
---
 qcom/bengal-pinctrl.dtsi | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/qcom/bengal-pinctrl.dtsi b/qcom/bengal-pinctrl.dtsi
index 8f3ec92c6891..6b3126e23bce 100644
--- a/qcom/bengal-pinctrl.dtsi
+++ b/qcom/bengal-pinctrl.dtsi
@@ -56,7 +56,16 @@
 				<94 0 &wakegpio 47 0>,
 				<95 0 &wakegpio 48 0>,
 				<96 0 &wakegpio 49 0>,
-				<97 0 &wakegpio 50 0>;
+				<97 0 &wakegpio 50 0>,
+				<99 0 &wakegpio 64 0>,	/* LPI_GPIO 7 */
+				<102 0 &wakegpio 65 0>,	/* LPI_GPIO 10 */
+				<103 0 &wakegpio 66 0>,	/* LPI_GPIO 11 */
+				<104 0 &wakegpio 67 0>,	/* LPI_GPIO 12 */
+				<105 0 &wakegpio 69 0>,	/* LPI_GPIO 17 */
+				<106 0 &wakegpio 14 0>,	/* LPI_GPIO 16 */
+				<107 0 &wakegpio 7 0>,	/* LPI_GPIO 17 */
+				<109 0 &wakegpio 37 0>,	/* LPI_GPIO 19 */
+				<112 0 &wakegpio 25 0>;	/* LPI_GPIO 24 */
 		irqdomain-map-pass-thru = <0 0xff>;
 		irqdomain-map-mask = <0xff 0>;
 

From 2f88c67f03963e23bccbebe30a6ef308c4d06ba0 Mon Sep 17 00:00:00 2001
From: Hareesh Gundu <hareeshg@qti.qualcomm.com>
Date: Thu, 17 Sep 2020 12:00:04 +0530
Subject: [PATCH 38/38] ARM: dts: msm: Update GPU clock names for bengal

Update GPU clock names for bengal to match with
clock description. This will also fix the gfx
mem_clk force_mem_core_on resetting issue.

Change-Id: I55f5f95b077f3969aff8f357a841ff9003a250d1
---
 qcom/bengal-gpu.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/qcom/bengal-gpu.dtsi b/qcom/bengal-gpu.dtsi
index c751da6e300e..0797453a95da 100644
--- a/qcom/bengal-gpu.dtsi
+++ b/qcom/bengal-gpu.dtsi
@@ -128,8 +128,8 @@
 			<&gpucc GPU_CC_CX_GMU_CLK>,
 			<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
 
-		clock-names = "core_clk", "rbbmtimer_clk", "mem_clk",
-				"iface_clk", "mem_iface_clk", "gmu_clk",
+		clock-names = "core_clk", "rbbmtimer_clk", "iface_clk",
+				"ahb_clk", "mem_clk", "gmu_clk",
 				"smmu_vote";
 
 		/* Bus Scale Settings */