duff/android_kernel_motorola_sm6225
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UPSTREAM: arm64: bpf: optimize modulo operation

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Optimize modulo operation instruction generation by
using single MSUB instruction vs MUL followed by SUB
instruction scheme.

Change-Id: I5a088b0a98bd41ee80d1528950437182d93b2aca
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
This commit is contained in:
Jerin Jacob authored and Thomas Turner committed 2026-08-23 21:12:38 +00:00
1 parent 6af9f48e10
commit 6b317971fc
2 files changed
+5 -4
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arch/arm64/net/bpf_jit.h
+3
View File
@@ -182,6 +182,9 @@
/* Rd = Ra + Rn * Rm */ /* Rd = Ra + Rn * Rm */
#define A64_MADD(sf, Rd, Ra, Rn, Rm) aarch64_insn_gen_data3(Rd, Ra, Rn, Rm, \ #define A64_MADD(sf, Rd, Ra, Rn, Rm) aarch64_insn_gen_data3(Rd, Ra, Rn, Rm, \
A64_VARIANT(sf), AARCH64_INSN_DATA3_MADD) A64_VARIANT(sf), AARCH64_INSN_DATA3_MADD)
/* Rd = Ra - Rn * Rm */
#define A64_MSUB(sf, Rd, Ra, Rn, Rm) aarch64_insn_gen_data3(Rd, Ra, Rn, Rm, \
A64_VARIANT(sf), AARCH64_INSN_DATA3_MSUB)
/* Rd = Rn * Rm */ /* Rd = Rn * Rm */
#define A64_MUL(sf, Rd, Rn, Rm) A64_MADD(sf, Rd, A64_ZR, Rn, Rm) #define A64_MUL(sf, Rd, Rn, Rm) A64_MADD(sf, Rd, A64_ZR, Rn, Rm)
arch/arm64/net/bpf_jit_comp.c
+2 -4
View File
@@ -421,8 +421,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
break; break;
case BPF_MOD: case BPF_MOD:
emit(A64_UDIV(is64, tmp, dst, src), ctx); emit(A64_UDIV(is64, tmp, dst, src), ctx);
emit(A64_MUL(is64, tmp, tmp, src), ctx); emit(A64_MSUB(is64, dst, dst, tmp, src), ctx);
emit(A64_SUB(is64, dst, dst, tmp), ctx);
break; break;
} }
break; break;
@@ -528,8 +527,7 @@ emit_bswap_uxt:
case BPF_ALU64 | BPF_MOD | BPF_K: case BPF_ALU64 | BPF_MOD | BPF_K:
emit_a64_mov_i(is64, tmp2, imm, ctx); emit_a64_mov_i(is64, tmp2, imm, ctx);
emit(A64_UDIV(is64, tmp, dst, tmp2), ctx); emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
emit(A64_MUL(is64, tmp, tmp, tmp2), ctx); emit(A64_MSUB(is64, dst, dst, tmp, tmp2), ctx);
emit(A64_SUB(is64, dst, dst, tmp), ctx);
break; break;
case BPF_ALU | BPF_LSH | BPF_K: case BPF_ALU | BPF_LSH | BPF_K:
case BPF_ALU64 | BPF_LSH | BPF_K: case BPF_ALU64 | BPF_LSH | BPF_K: