2021-11-02 15:02:54 +08:00
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/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "khaje-moto-common-overlay.dtsi"
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#include "khaje-rhode-display.dtsi"
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2021-11-15 20:07:42 +08:00
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#include "khaje-rhode-fps-overlay.dtsi"
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2021-11-05 13:58:30 +08:00
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#include "khaje-rhode-touchscreen-overlay.dtsi"
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2021-11-08 16:50:32 +08:00
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#include "sgm7220.dtsi"
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#include "discrete_charging.dtsi"
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2021-11-22 16:32:02 +08:00
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#include "khaje-rhode-wl2868c.dtsi"
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2021-11-16 10:21:20 +08:00
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#include "camera/khaje-camera-sensor-mot-rhode-overlay.dtsi"
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2021-11-23 23:24:33 +08:00
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#include "khaje-rhode-wl2866d.dtsi"
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2021-11-02 15:02:54 +08:00
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&firmware {
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android {
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vbmeta {
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compatible = "android,vbmeta";
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parts = "vbmeta,boot,system,vendor,dtbo";
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};
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};
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};
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2021-11-22 14:50:48 +08:00
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&qupv3_se1_i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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sec-nfc@27 {
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compatible = "sec-nfc";
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reg = <0x27>;
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sec-nfc,ven-gpio = <&tlmm 69 0x00>;
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sec-nfc,firm-gpio = <&tlmm 31 0x00>;
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sec-nfc,irq-gpio = <&tlmm 70 0x00>;
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sec-nfc,clk_req-gpio = <&tlmm 112 0x00>;
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interrupt-parent = <&tlmm>;
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interrupts = <70 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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2021-11-04 14:28:04 +08:00
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&soc {
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qcom,tz_gpio {
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compatible = "qcom,tz_gpio";
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tlmm-tz = <14>,
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<15>,
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<16>,
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<17>;
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};
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2021-11-09 18:13:15 +08:00
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ldo_vib {
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compatible = "moto,vibrator-ldo";
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2021-11-23 14:30:41 +08:00
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moto,vib-ldo-gpio = <&tlmm 25 0x0>;
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2021-11-09 18:13:15 +08:00
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status = "ok"
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};
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2021-11-05 13:58:30 +08:00
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};
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2021-11-08 15:10:47 +08:00
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&tlmm{
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capsense_sar_gpio_pins: capsense_sar_gpio_pins {
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mux {
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pins = "gpio106";
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function = "gpio";
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};
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config {
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pins = "gpio106";
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drive-strength = <2>;
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bias-pull-up;
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input-enable;
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};
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};
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};
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2021-11-10 10:04:48 +08:00
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&sdhc_2 {
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vdd-supply = <&L22A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&L5A>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 22000>;
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vdd-io-bias-supply = <&L7A>;
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qcom,vdd-io-bias-voltage-level = <1256000 1256000>;
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qcom,vdd-io-bias-current-level = <0 6000>;
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pinctrl-names = "active", "sleep";
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pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
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pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
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cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
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status = "ok"
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};
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2021-11-08 15:10:47 +08:00
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&qupv3_se0_i2c {
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status = "ok"
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aw9610x_sar@12 {
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compatible = "awinic,aw9610x_sar_0";
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reg = <0x12>;
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2021-11-19 18:15:24 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <&capsense_sar_gpio_pins>;
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2021-11-08 15:10:47 +08:00
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interrupt-parent = <&tlmm>;
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2021-11-10 14:48:27 +08:00
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interrupts = <106 0x02>;
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irq-gpio = <&tlmm 106 0x02>;
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2021-11-08 15:10:47 +08:00
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chip_name = "AW96105";
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sar-num = <0>;
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2021-11-10 14:48:27 +08:00
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cap_vcc-supply = <&pm6125_l21>;
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2021-11-29 14:12:54 +08:00
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aw9610x,channel_number = <0x5>;
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ch0_name = "Moto CapSense Ch0";
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ch1_name = "Moto CapSense Ch1";
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ch2_name = "Moto CapSense Ch2";
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ch3_name = "Moto CapSense Ch3";
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ch4_name = "Moto CapSense Ch4";
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2021-11-08 15:10:47 +08:00
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aw9610x,using-firmware;
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aw9610x,firmware_name = "aw9610x_0";
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};
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2021-11-10 10:04:48 +08:00
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};
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